ARM: etm: Add sysfs entry to enable timestamps if supported
[linux-2.6.git] / arch / unicore32 / kernel / debug-macro.S
1 /*
2  * linux/arch/unicore32/kernel/debug-macro.S
3  *
4  * Code specific to PKUnity SoC and UniCore ISA
5  *
6  * Copyright (C) 2001-2010 GUAN Xue-tao
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * Debugging macro include header
13  */
14 #include <generated/asm-offsets.h>
15 #include <mach/hardware.h>
16
17                 .macro  put_word_ocd, rd, rx=r16
18 1001:           movc            \rx, p1.c0, #0
19                 cand.a  \rx, #2
20                 bne     1001b
21                 movc            p1.c1, \rd, #1
22                 .endm
23
24 #ifdef CONFIG_DEBUG_OCD
25                 /* debug using UniCore On-Chip-Debugger */
26                 .macro  addruart, rx
27                 .endm
28
29                 .macro  senduart, rd, rx
30                 put_word_ocd    \rd, \rx
31                 .endm
32
33                 .macro  busyuart, rd, rx
34                 .endm
35
36                 .macro  waituart, rd, rx
37                 .endm
38 #else
39 #define UART_CLK_DEFAULT        3686400 * 20
40         /* Uartclk = MCLK/ 2, The MCLK on my board is 3686400 * 40  */
41 #define BAUD_RATE_DEFAULT       115200
42         /* The baud rate of the serial port */
43
44 #define UART_DIVISOR_DEFAULT    (UART_CLK_DEFAULT \
45                                 / (16 * BAUD_RATE_DEFAULT) - 1)
46
47                 .macro  addruart,rx
48                 mrc     p0, #0, \rx, c1, c0
49                 tst     \rx, #1                 @ MMU enabled?
50                 moveq   \rx, #0xee000000        @ physical base address
51                 movne   \rx, #0x6e000000        @ virtual address
52
53                 @ We probe for the active serial port here
54                 @ However, now we assume UART0 is active:       epip4d
55                 @ We assume r1 and r2 can be clobbered.
56
57                 movl    r2, #UART_DIVISOR_DEFAULT
58                 mov     r1, #0x80
59                 str     r1, [\rx, #UART_LCR_OFFSET]
60                 and     r1, r2, #0xff00
61                 mov     r1, r1, lsr #8
62                 str     r1, [\rx, #UART_DLH_OFFSET]
63                 and     r1, r2, #0xff
64                 str     r1, [\rx, #UART_DLL_OFFSET]
65                 mov     r1, #0x7
66                 str     r1, [\rx, #UART_FCR_OFFSET]
67                 mov     r1, #0x3
68                 str     r1, [\rx, #UART_LCR_OFFSET]
69                 mov     r1, #0x0
70                 str     r1, [\rx, #UART_IER_OFFSET]
71                 .endm
72
73                 .macro  senduart,rd,rx
74                 str     \rd, [\rx, #UART_THR_OFFSET]
75                 .endm
76
77                 .macro  waituart,rd,rx
78 1001:           ldr     \rd, [\rx, #UART_LSR_OFFSET]
79                 tst     \rd, #UART_LSR_THRE
80                 beq     1001b
81                 .endm
82
83                 .macro  busyuart,rd,rx
84 1001:           ldr     \rd, [\rx, #UART_LSR_OFFSET]
85                 tst     \rd, #UART_LSR_TEMT
86                 bne     1001b
87                 .endm
88 #endif
89