Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6.git] / arch / sparc / kernel / sun4m_smp.c
1 /* sun4m_smp.c: Sparc SUN4M SMP support.
2  *
3  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4  */
5
6 #include <asm/head.h>
7
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/threads.h>
11 #include <linux/smp.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel_stat.h>
14 #include <linux/init.h>
15 #include <linux/spinlock.h>
16 #include <linux/mm.h>
17 #include <linux/swap.h>
18 #include <linux/profile.h>
19 #include <linux/delay.h>
20
21 #include <asm/cacheflush.h>
22 #include <asm/tlbflush.h>
23 #include <asm/irq_regs.h>
24
25 #include <asm/ptrace.h>
26 #include <asm/atomic.h>
27
28 #include <asm/irq.h>
29 #include <asm/page.h>
30 #include <asm/pgalloc.h>
31 #include <asm/pgtable.h>
32 #include <asm/oplib.h>
33 #include <asm/cpudata.h>
34
35 #include "irq.h"
36
37 #define IRQ_CROSS_CALL          15
38
39 extern ctxd_t *srmmu_ctx_table_phys;
40
41 extern volatile unsigned long cpu_callin_map[NR_CPUS];
42 extern unsigned char boot_cpu_id;
43
44 extern cpumask_t smp_commenced_mask;
45
46 extern int __smp4m_processor_id(void);
47
48 /*#define SMP_DEBUG*/
49
50 #ifdef SMP_DEBUG
51 #define SMP_PRINTK(x)   printk x
52 #else
53 #define SMP_PRINTK(x)
54 #endif
55
56 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
57 {
58         __asm__ __volatile__("swap [%1], %0\n\t" :
59                              "=&r" (val), "=&r" (ptr) :
60                              "0" (val), "1" (ptr));
61         return val;
62 }
63
64 static void smp_setup_percpu_timer(void);
65 extern void cpu_probe(void);
66
67 void __cpuinit smp4m_callin(void)
68 {
69         int cpuid = hard_smp_processor_id();
70
71         local_flush_cache_all();
72         local_flush_tlb_all();
73
74         notify_cpu_starting(cpuid);
75
76         /* Get our local ticker going. */
77         smp_setup_percpu_timer();
78
79         calibrate_delay();
80         smp_store_cpu_info(cpuid);
81
82         local_flush_cache_all();
83         local_flush_tlb_all();
84
85         /*
86          * Unblock the master CPU _only_ when the scheduler state
87          * of all secondary CPUs will be up-to-date, so after
88          * the SMP initialization the master will be just allowed
89          * to call the scheduler code.
90          */
91         /* Allow master to continue. */
92         swap(&cpu_callin_map[cpuid], 1);
93
94         /* XXX: What's up with all the flushes? */
95         local_flush_cache_all();
96         local_flush_tlb_all();
97         
98         cpu_probe();
99
100         /* Fix idle thread fields. */
101         __asm__ __volatile__("ld [%0], %%g6\n\t"
102                              : : "r" (&current_set[cpuid])
103                              : "memory" /* paranoid */);
104
105         /* Attach to the address space of init_task. */
106         atomic_inc(&init_mm.mm_count);
107         current->active_mm = &init_mm;
108
109         while (!cpu_isset(cpuid, smp_commenced_mask))
110                 mb();
111
112         local_irq_enable();
113
114         cpu_set(cpuid, cpu_online_map);
115 }
116
117 /*
118  *      Cycle through the processors asking the PROM to start each one.
119  */
120  
121 extern struct linux_prom_registers smp_penguin_ctable;
122 extern unsigned long trapbase_cpu1[];
123 extern unsigned long trapbase_cpu2[];
124 extern unsigned long trapbase_cpu3[];
125
126 void __init smp4m_boot_cpus(void)
127 {
128         smp_setup_percpu_timer();
129         local_flush_cache_all();
130 }
131
132 int __cpuinit smp4m_boot_one_cpu(int i)
133 {
134         extern unsigned long sun4m_cpu_startup;
135         unsigned long *entry = &sun4m_cpu_startup;
136         struct task_struct *p;
137         int timeout;
138         int cpu_node;
139
140         cpu_find_by_mid(i, &cpu_node);
141
142         /* Cook up an idler for this guy. */
143         p = fork_idle(i);
144         current_set[i] = task_thread_info(p);
145         /* See trampoline.S for details... */
146         entry += ((i-1) * 3);
147
148         /*
149          * Initialize the contexts table
150          * Since the call to prom_startcpu() trashes the structure,
151          * we need to re-initialize it for each cpu
152          */
153         smp_penguin_ctable.which_io = 0;
154         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
155         smp_penguin_ctable.reg_size = 0;
156
157         /* whirrr, whirrr, whirrrrrrrrr... */
158         printk("Starting CPU %d at %p\n", i, entry);
159         local_flush_cache_all();
160         prom_startcpu(cpu_node,
161                       &smp_penguin_ctable, 0, (char *)entry);
162
163         /* wheee... it's going... */
164         for(timeout = 0; timeout < 10000; timeout++) {
165                 if(cpu_callin_map[i])
166                         break;
167                 udelay(200);
168         }
169
170         if (!(cpu_callin_map[i])) {
171                 printk("Processor %d is stuck.\n", i);
172                 return -ENODEV;
173         }
174
175         local_flush_cache_all();
176         return 0;
177 }
178
179 void __init smp4m_smp_done(void)
180 {
181         int i, first;
182         int *prev;
183
184         /* setup cpu list for irq rotation */
185         first = 0;
186         prev = &first;
187         for (i = 0; i < NR_CPUS; i++) {
188                 if (cpu_online(i)) {
189                         *prev = i;
190                         prev = &cpu_data(i).next;
191                 }
192         }
193         *prev = first;
194         local_flush_cache_all();
195
196         /* Free unneeded trap tables */
197         if (!cpu_isset(1, cpu_present_map)) {
198                 ClearPageReserved(virt_to_page(trapbase_cpu1));
199                 init_page_count(virt_to_page(trapbase_cpu1));
200                 free_page((unsigned long)trapbase_cpu1);
201                 totalram_pages++;
202                 num_physpages++;
203         }
204         if (!cpu_isset(2, cpu_present_map)) {
205                 ClearPageReserved(virt_to_page(trapbase_cpu2));
206                 init_page_count(virt_to_page(trapbase_cpu2));
207                 free_page((unsigned long)trapbase_cpu2);
208                 totalram_pages++;
209                 num_physpages++;
210         }
211         if (!cpu_isset(3, cpu_present_map)) {
212                 ClearPageReserved(virt_to_page(trapbase_cpu3));
213                 init_page_count(virt_to_page(trapbase_cpu3));
214                 free_page((unsigned long)trapbase_cpu3);
215                 totalram_pages++;
216                 num_physpages++;
217         }
218
219         /* Ok, they are spinning and ready to go. */
220 }
221
222 /* At each hardware IRQ, we get this called to forward IRQ reception
223  * to the next processor.  The caller must disable the IRQ level being
224  * serviced globally so that there are no double interrupts received.
225  *
226  * XXX See sparc64 irq.c.
227  */
228 void smp4m_irq_rotate(int cpu)
229 {
230         int next = cpu_data(cpu).next;
231         if (next != cpu)
232                 set_irq_udt(next);
233 }
234
235 static struct smp_funcall {
236         smpfunc_t func;
237         unsigned long arg1;
238         unsigned long arg2;
239         unsigned long arg3;
240         unsigned long arg4;
241         unsigned long arg5;
242         unsigned long processors_in[SUN4M_NCPUS];  /* Set when ipi entered. */
243         unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
244 } ccall_info;
245
246 static DEFINE_SPINLOCK(cross_call_lock);
247
248 /* Cross calls must be serialized, at least currently. */
249 static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
250                              unsigned long arg2, unsigned long arg3,
251                              unsigned long arg4)
252 {
253                 register int ncpus = SUN4M_NCPUS;
254                 unsigned long flags;
255
256                 spin_lock_irqsave(&cross_call_lock, flags);
257
258                 /* Init function glue. */
259                 ccall_info.func = func;
260                 ccall_info.arg1 = arg1;
261                 ccall_info.arg2 = arg2;
262                 ccall_info.arg3 = arg3;
263                 ccall_info.arg4 = arg4;
264                 ccall_info.arg5 = 0;
265
266                 /* Init receive/complete mapping, plus fire the IPI's off. */
267                 {
268                         register int i;
269
270                         cpu_clear(smp_processor_id(), mask);
271                         cpus_and(mask, cpu_online_map, mask);
272                         for(i = 0; i < ncpus; i++) {
273                                 if (cpu_isset(i, mask)) {
274                                         ccall_info.processors_in[i] = 0;
275                                         ccall_info.processors_out[i] = 0;
276                                         set_cpu_int(i, IRQ_CROSS_CALL);
277                                 } else {
278                                         ccall_info.processors_in[i] = 1;
279                                         ccall_info.processors_out[i] = 1;
280                                 }
281                         }
282                 }
283
284                 {
285                         register int i;
286
287                         i = 0;
288                         do {
289                                 if (!cpu_isset(i, mask))
290                                         continue;
291                                 while(!ccall_info.processors_in[i])
292                                         barrier();
293                         } while(++i < ncpus);
294
295                         i = 0;
296                         do {
297                                 if (!cpu_isset(i, mask))
298                                         continue;
299                                 while(!ccall_info.processors_out[i])
300                                         barrier();
301                         } while(++i < ncpus);
302                 }
303
304                 spin_unlock_irqrestore(&cross_call_lock, flags);
305 }
306
307 /* Running cross calls. */
308 void smp4m_cross_call_irq(void)
309 {
310         int i = smp_processor_id();
311
312         ccall_info.processors_in[i] = 1;
313         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
314                         ccall_info.arg4, ccall_info.arg5);
315         ccall_info.processors_out[i] = 1;
316 }
317
318 extern void sun4m_clear_profile_irq(int cpu);
319
320 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
321 {
322         struct pt_regs *old_regs;
323         int cpu = smp_processor_id();
324
325         old_regs = set_irq_regs(regs);
326
327         sun4m_clear_profile_irq(cpu);
328
329         profile_tick(CPU_PROFILING);
330
331         if(!--prof_counter(cpu)) {
332                 int user = user_mode(regs);
333
334                 irq_enter();
335                 update_process_times(user);
336                 irq_exit();
337
338                 prof_counter(cpu) = prof_multiplier(cpu);
339         }
340         set_irq_regs(old_regs);
341 }
342
343 extern unsigned int lvl14_resolution;
344
345 static void __init smp_setup_percpu_timer(void)
346 {
347         int cpu = smp_processor_id();
348
349         prof_counter(cpu) = prof_multiplier(cpu) = 1;
350         load_profile_irq(cpu, lvl14_resolution);
351
352         if(cpu == boot_cpu_id)
353                 enable_pil_irq(14);
354 }
355
356 static void __init smp4m_blackbox_id(unsigned *addr)
357 {
358         int rd = *addr & 0x3e000000;
359         int rs1 = rd >> 11;
360         
361         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
362         addr[1] = 0x8130200c | rd | rs1;        /* srl reg, 0xc, reg */
363         addr[2] = 0x80082003 | rd | rs1;        /* and reg, 3, reg */
364 }
365
366 static void __init smp4m_blackbox_current(unsigned *addr)
367 {
368         int rd = *addr & 0x3e000000;
369         int rs1 = rd >> 11;
370         
371         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
372         addr[2] = 0x8130200a | rd | rs1;        /* srl reg, 0xa, reg */
373         addr[4] = 0x8008200c | rd | rs1;        /* and reg, 0xc, reg */
374 }
375
376 void __init sun4m_init_smp(void)
377 {
378         BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
379         BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
380         BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
381         BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
382 }