sh: shared mstp32 clock code
[linux-2.6.git] / arch / sh / kernel / cpu / clock-cpg.c
1 #include <linux/clk.h>
2 #include <linux/compiler.h>
3 #include <linux/io.h>
4 #include <asm/clock.h>
5
6 static int sh_clk_mstp32_enable(struct clk *clk)
7 {
8         __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit),
9                      clk->enable_reg);
10         return 0;
11 }
12
13 static void sh_clk_mstp32_disable(struct clk *clk)
14 {
15         __raw_writel(__raw_readl(clk->enable_reg) | (1 << clk->enable_bit),
16                      clk->enable_reg);
17 }
18
19 static struct clk_ops sh_clk_mstp32_clk_ops = {
20         .enable         = sh_clk_mstp32_enable,
21         .disable        = sh_clk_mstp32_disable,
22         .recalc         = followparent_recalc,
23 };
24
25 int __init sh_clk_mstp32_register(struct clk *clks, int nr)
26 {
27         struct clk *clkp;
28         int ret = 0;
29         int k;
30
31         for (k = 0; !ret && (k < nr); k++) {
32                 clkp = clks + k;
33                 clkp->ops = &sh_clk_mstp32_clk_ops;
34                 ret |= clk_register(clkp);
35         }
36
37         return ret;
38 }
39
40 #ifdef CONFIG_SH_CLK_CPG_LEGACY
41 static struct clk master_clk = {
42         .name           = "master_clk",
43         .flags          = CLK_ENABLE_ON_INIT,
44         .rate           = CONFIG_SH_PCLK_FREQ,
45 };
46
47 static struct clk peripheral_clk = {
48         .name           = "peripheral_clk",
49         .parent         = &master_clk,
50         .flags          = CLK_ENABLE_ON_INIT,
51 };
52
53 static struct clk bus_clk = {
54         .name           = "bus_clk",
55         .parent         = &master_clk,
56         .flags          = CLK_ENABLE_ON_INIT,
57 };
58
59 static struct clk cpu_clk = {
60         .name           = "cpu_clk",
61         .parent         = &master_clk,
62         .flags          = CLK_ENABLE_ON_INIT,
63 };
64
65 /*
66  * The ordering of these clocks matters, do not change it.
67  */
68 static struct clk *onchip_clocks[] = {
69         &master_clk,
70         &peripheral_clk,
71         &bus_clk,
72         &cpu_clk,
73 };
74
75 int __init __deprecated cpg_clk_init(void)
76 {
77         int i, ret = 0;
78
79         for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
80                 struct clk *clk = onchip_clocks[i];
81                 arch_init_clk_ops(&clk->ops, i);
82                 if (clk->ops)
83                         ret |= clk_register(clk);
84         }
85
86         return ret;
87 }
88
89 /*
90  * Placeholder for compatability, until the lazy CPUs do this
91  * on their own.
92  */
93 int __init __weak arch_clk_init(void)
94 {
95         return cpg_clk_init();
96 }
97 #endif /* CONFIG_SH_CPG_CLK_LEGACY */