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Merge remote branch 'alsa/devel' into topic/misc
[linux-2.6.git] / arch / s390 / include / asm / sigp.h
1 /*
2  *  include/asm-s390/sigp.h
3  *
4  *  S390 version
5  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7  *               Martin Schwidefsky (schwidefsky@de.ibm.com)
8  *               Heiko Carstens (heiko.carstens@de.ibm.com)
9  *
10  *  sigp.h by D.J. Barrow (c) IBM 1999
11  *  contains routines / structures for signalling other S/390 processors in an
12  *  SMP configuration.
13  */
14
15 #ifndef __SIGP__
16 #define __SIGP__
17
18 #include <asm/system.h>
19
20 /* get real cpu address from logical cpu number */
21 extern int __cpu_logical_map[];
22
23 static inline int cpu_logical_map(int cpu)
24 {
25 #ifdef CONFIG_SMP
26         return __cpu_logical_map[cpu];
27 #else
28         return stap();
29 #endif
30 }
31
32 typedef enum
33 {
34         sigp_unassigned=0x0,
35         sigp_sense,
36         sigp_external_call,
37         sigp_emergency_signal,
38         sigp_start,
39         sigp_stop,
40         sigp_restart,
41         sigp_unassigned1,
42         sigp_unassigned2,
43         sigp_stop_and_store_status,
44         sigp_unassigned3,
45         sigp_initial_cpu_reset,
46         sigp_cpu_reset,
47         sigp_set_prefix,
48         sigp_store_status_at_address,
49         sigp_store_extended_status_at_address
50 } sigp_order_code;
51
52 typedef __u32 sigp_status_word;
53
54 typedef enum
55 {
56         sigp_order_code_accepted=0,
57         sigp_status_stored,
58         sigp_busy,
59         sigp_not_operational
60 } sigp_ccode;
61
62
63 /*
64  * Definitions for the external call
65  */
66
67 /* 'Bit' signals, asynchronous */
68 typedef enum
69 {
70         ec_schedule=0,
71         ec_call_function,
72         ec_call_function_single,
73         ec_bit_last
74 } ec_bit_sig;
75
76 /*
77  * Signal processor
78  */
79 static inline sigp_ccode
80 signal_processor(__u16 cpu_addr, sigp_order_code order_code)
81 {
82         register unsigned long reg1 asm ("1") = 0;
83         sigp_ccode ccode;
84
85         asm volatile(
86                 "       sigp    %1,%2,0(%3)\n"
87                 "       ipm     %0\n"
88                 "       srl     %0,28\n"
89                 :       "=d"    (ccode)
90                 : "d" (reg1), "d" (cpu_logical_map(cpu_addr)),
91                   "a" (order_code) : "cc" , "memory");
92         return ccode;
93 }
94
95 /*
96  * Signal processor with parameter
97  */
98 static inline sigp_ccode
99 signal_processor_p(__u32 parameter, __u16 cpu_addr, sigp_order_code order_code)
100 {
101         register unsigned int reg1 asm ("1") = parameter;
102         sigp_ccode ccode;
103
104         asm volatile(
105                 "       sigp    %1,%2,0(%3)\n"
106                 "       ipm     %0\n"
107                 "       srl     %0,28\n"
108                 : "=d" (ccode)
109                 : "d" (reg1), "d" (cpu_logical_map(cpu_addr)),
110                   "a" (order_code) : "cc" , "memory");
111         return ccode;
112 }
113
114 /*
115  * Signal processor with parameter and return status
116  */
117 static inline sigp_ccode
118 signal_processor_ps(__u32 *statusptr, __u32 parameter, __u16 cpu_addr,
119                     sigp_order_code order_code)
120 {
121         register unsigned int reg1 asm ("1") = parameter;
122         sigp_ccode ccode;
123
124         asm volatile(
125                 "       sigp    %1,%2,0(%3)\n"
126                 "       ipm     %0\n"
127                 "       srl     %0,28\n"
128                 : "=d" (ccode), "+d" (reg1)
129                 : "d" (cpu_logical_map(cpu_addr)), "a" (order_code)
130                 : "cc" , "memory");
131         *statusptr = reg1;
132         return ccode;
133 }
134
135 #endif /* __SIGP__ */