Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
[linux-2.6.git] / arch / s390 / include / asm / lowcore.h
1 /*
2  *    Copyright IBM Corp. 1999,2010
3  *    Author(s): Hartmut Penner <hp@de.ibm.com>,
4  *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
5  *               Denis Joseph Barrow,
6  */
7
8 #ifndef _ASM_S390_LOWCORE_H
9 #define _ASM_S390_LOWCORE_H
10
11 #include <linux/types.h>
12 #include <asm/ptrace.h>
13 #include <asm/cpu.h>
14
15 void restart_int_handler(void);
16 void ext_int_handler(void);
17 void system_call(void);
18 void pgm_check_handler(void);
19 void mcck_int_handler(void);
20 void io_int_handler(void);
21
22 #ifdef CONFIG_32BIT
23
24 #define LC_ORDER 0
25 #define LC_PAGES 1
26
27 struct save_area {
28         u32     ext_save;
29         u64     timer;
30         u64     clk_cmp;
31         u8      pad1[24];
32         u8      psw[8];
33         u32     pref_reg;
34         u8      pad2[20];
35         u32     acc_regs[16];
36         u64     fp_regs[4];
37         u32     gp_regs[16];
38         u32     ctrl_regs[16];
39 } __packed;
40
41 struct _lowcore {
42         psw_t   restart_psw;                    /* 0x0000 */
43         psw_t   restart_old_psw;                /* 0x0008 */
44         __u8    pad_0x0010[0x0014-0x0010];      /* 0x0010 */
45         __u32   ipl_parmblock_ptr;              /* 0x0014 */
46         psw_t   external_old_psw;               /* 0x0018 */
47         psw_t   svc_old_psw;                    /* 0x0020 */
48         psw_t   program_old_psw;                /* 0x0028 */
49         psw_t   mcck_old_psw;                   /* 0x0030 */
50         psw_t   io_old_psw;                     /* 0x0038 */
51         __u8    pad_0x0040[0x0058-0x0040];      /* 0x0040 */
52         psw_t   external_new_psw;               /* 0x0058 */
53         psw_t   svc_new_psw;                    /* 0x0060 */
54         psw_t   program_new_psw;                /* 0x0068 */
55         psw_t   mcck_new_psw;                   /* 0x0070 */
56         psw_t   io_new_psw;                     /* 0x0078 */
57         __u32   ext_params;                     /* 0x0080 */
58         __u16   cpu_addr;                       /* 0x0084 */
59         __u16   ext_int_code;                   /* 0x0086 */
60         __u16   svc_ilc;                        /* 0x0088 */
61         __u16   svc_code;                       /* 0x008a */
62         __u16   pgm_ilc;                        /* 0x008c */
63         __u16   pgm_code;                       /* 0x008e */
64         __u32   trans_exc_code;                 /* 0x0090 */
65         __u16   mon_class_num;                  /* 0x0094 */
66         __u16   per_perc_atmid;                 /* 0x0096 */
67         __u32   per_address;                    /* 0x0098 */
68         __u32   monitor_code;                   /* 0x009c */
69         __u8    exc_access_id;                  /* 0x00a0 */
70         __u8    per_access_id;                  /* 0x00a1 */
71         __u8    op_access_id;                   /* 0x00a2 */
72         __u8    ar_access_id;                   /* 0x00a3 */
73         __u8    pad_0x00a4[0x00b8-0x00a4];      /* 0x00a4 */
74         __u16   subchannel_id;                  /* 0x00b8 */
75         __u16   subchannel_nr;                  /* 0x00ba */
76         __u32   io_int_parm;                    /* 0x00bc */
77         __u32   io_int_word;                    /* 0x00c0 */
78         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
79         __u32   stfl_fac_list;                  /* 0x00c8 */
80         __u8    pad_0x00cc[0x00d4-0x00cc];      /* 0x00cc */
81         __u32   extended_save_area_addr;        /* 0x00d4 */
82         __u32   cpu_timer_save_area[2];         /* 0x00d8 */
83         __u32   clock_comp_save_area[2];        /* 0x00e0 */
84         __u32   mcck_interruption_code[2];      /* 0x00e8 */
85         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
86         __u32   external_damage_code;           /* 0x00f4 */
87         __u32   failing_storage_address;        /* 0x00f8 */
88         __u8    pad_0x00fc[0x0100-0x00fc];      /* 0x00fc */
89         psw_t   psw_save_area;                  /* 0x0100 */
90         __u32   prefixreg_save_area;            /* 0x0108 */
91         __u8    pad_0x010c[0x0120-0x010c];      /* 0x010c */
92
93         /* CPU register save area: defined by architecture */
94         __u32   access_regs_save_area[16];      /* 0x0120 */
95         __u32   floating_pt_save_area[8];       /* 0x0160 */
96         __u32   gpregs_save_area[16];           /* 0x0180 */
97         __u32   cregs_save_area[16];            /* 0x01c0 */
98
99         /* Return psws. */
100         __u32   save_area[16];                  /* 0x0200 */
101         psw_t   return_psw;                     /* 0x0240 */
102         psw_t   return_mcck_psw;                /* 0x0248 */
103
104         /* CPU time accounting values */
105         __u64   sync_enter_timer;               /* 0x0250 */
106         __u64   async_enter_timer;              /* 0x0258 */
107         __u64   exit_timer;                     /* 0x0260 */
108         __u64   user_timer;                     /* 0x0268 */
109         __u64   system_timer;                   /* 0x0270 */
110         __u64   steal_timer;                    /* 0x0278 */
111         __u64   last_update_timer;              /* 0x0280 */
112         __u64   last_update_clock;              /* 0x0288 */
113
114         /* Current process. */
115         __u32   current_task;                   /* 0x0290 */
116         __u32   thread_info;                    /* 0x0294 */
117         __u32   kernel_stack;                   /* 0x0298 */
118
119         /* Interrupt and panic stack. */
120         __u32   async_stack;                    /* 0x029c */
121         __u32   panic_stack;                    /* 0x02a0 */
122
123         /* Address space pointer. */
124         __u32   kernel_asce;                    /* 0x02a4 */
125         __u32   user_asce;                      /* 0x02a8 */
126         __u32   user_exec_asce;                 /* 0x02ac */
127
128         /* SMP info area */
129         struct cpuid cpu_id;                    /* 0x02b0 */
130         __u32   cpu_nr;                         /* 0x02b8 */
131         __u32   softirq_pending;                /* 0x02bc */
132         __u32   percpu_offset;                  /* 0x02c0 */
133         __u32   ext_call_fast;                  /* 0x02c4 */
134         __u64   int_clock;                      /* 0x02c8 */
135         __u64   clock_comparator;               /* 0x02d0 */
136         __u32   machine_flags;                  /* 0x02d8 */
137         __u32   ftrace_func;                    /* 0x02dc */
138         __u8    pad_0x02e0[0x0300-0x02e0];      /* 0x02e0 */
139
140         /* Interrupt response block */
141         __u8    irb[64];                        /* 0x0300 */
142
143         __u8    pad_0x0340[0x0e00-0x0340];      /* 0x0340 */
144
145         /*
146          * 0xe00 contains the address of the IPL Parameter Information
147          * block. Dump tools need IPIB for IPL after dump.
148          * Note: do not change the position of any fields in 0x0e00-0x0f00
149          */
150         __u32   ipib;                           /* 0x0e00 */
151         __u32   ipib_checksum;                  /* 0x0e04 */
152
153         /* Align to the top 1k of prefix area */
154         __u8    pad_0x0e08[0x1000-0x0e08];      /* 0x0e08 */
155 } __packed;
156
157 #else /* CONFIG_32BIT */
158
159 #define LC_ORDER 1
160 #define LC_PAGES 2
161
162 struct save_area {
163         u64     fp_regs[16];
164         u64     gp_regs[16];
165         u8      psw[16];
166         u8      pad1[8];
167         u32     pref_reg;
168         u32     fp_ctrl_reg;
169         u8      pad2[4];
170         u32     tod_reg;
171         u64     timer;
172         u64     clk_cmp;
173         u8      pad3[8];
174         u32     acc_regs[16];
175         u64     ctrl_regs[16];
176 } __packed;
177
178 struct _lowcore {
179         __u8    pad_0x0000[0x0014-0x0000];      /* 0x0000 */
180         __u32   ipl_parmblock_ptr;              /* 0x0014 */
181         __u8    pad_0x0018[0x0080-0x0018];      /* 0x0018 */
182         __u32   ext_params;                     /* 0x0080 */
183         __u16   cpu_addr;                       /* 0x0084 */
184         __u16   ext_int_code;                   /* 0x0086 */
185         __u16   svc_ilc;                        /* 0x0088 */
186         __u16   svc_code;                       /* 0x008a */
187         __u16   pgm_ilc;                        /* 0x008c */
188         __u16   pgm_code;                       /* 0x008e */
189         __u32   data_exc_code;                  /* 0x0090 */
190         __u16   mon_class_num;                  /* 0x0094 */
191         __u16   per_perc_atmid;                 /* 0x0096 */
192         addr_t  per_address;                    /* 0x0098 */
193         __u8    exc_access_id;                  /* 0x00a0 */
194         __u8    per_access_id;                  /* 0x00a1 */
195         __u8    op_access_id;                   /* 0x00a2 */
196         __u8    ar_access_id;                   /* 0x00a3 */
197         __u8    pad_0x00a4[0x00a8-0x00a4];      /* 0x00a4 */
198         addr_t  trans_exc_code;                 /* 0x00a8 */
199         addr_t  monitor_code;                   /* 0x00b0 */
200         __u16   subchannel_id;                  /* 0x00b8 */
201         __u16   subchannel_nr;                  /* 0x00ba */
202         __u32   io_int_parm;                    /* 0x00bc */
203         __u32   io_int_word;                    /* 0x00c0 */
204         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
205         __u32   stfl_fac_list;                  /* 0x00c8 */
206         __u8    pad_0x00cc[0x00e8-0x00cc];      /* 0x00cc */
207         __u32   mcck_interruption_code[2];      /* 0x00e8 */
208         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
209         __u32   external_damage_code;           /* 0x00f4 */
210         addr_t  failing_storage_address;        /* 0x00f8 */
211         __u8    pad_0x0100[0x0110-0x0100];      /* 0x0100 */
212         __u64   breaking_event_addr;            /* 0x0110 */
213         __u8    pad_0x0118[0x0120-0x0118];      /* 0x0118 */
214         psw_t   restart_old_psw;                /* 0x0120 */
215         psw_t   external_old_psw;               /* 0x0130 */
216         psw_t   svc_old_psw;                    /* 0x0140 */
217         psw_t   program_old_psw;                /* 0x0150 */
218         psw_t   mcck_old_psw;                   /* 0x0160 */
219         psw_t   io_old_psw;                     /* 0x0170 */
220         __u8    pad_0x0180[0x01a0-0x0180];      /* 0x0180 */
221         psw_t   restart_psw;                    /* 0x01a0 */
222         psw_t   external_new_psw;               /* 0x01b0 */
223         psw_t   svc_new_psw;                    /* 0x01c0 */
224         psw_t   program_new_psw;                /* 0x01d0 */
225         psw_t   mcck_new_psw;                   /* 0x01e0 */
226         psw_t   io_new_psw;                     /* 0x01f0 */
227
228         /* Entry/exit save area & return psws. */
229         __u64   save_area[16];                  /* 0x0200 */
230         psw_t   return_psw;                     /* 0x0280 */
231         psw_t   return_mcck_psw;                /* 0x0290 */
232
233         /* CPU accounting and timing values. */
234         __u64   sync_enter_timer;               /* 0x02a0 */
235         __u64   async_enter_timer;              /* 0x02a8 */
236         __u64   exit_timer;                     /* 0x02b0 */
237         __u64   user_timer;                     /* 0x02b8 */
238         __u64   system_timer;                   /* 0x02c0 */
239         __u64   steal_timer;                    /* 0x02c8 */
240         __u64   last_update_timer;              /* 0x02d0 */
241         __u64   last_update_clock;              /* 0x02d8 */
242
243         /* Current process. */
244         __u64   current_task;                   /* 0x02e0 */
245         __u64   thread_info;                    /* 0x02e8 */
246         __u64   kernel_stack;                   /* 0x02f0 */
247
248         /* Interrupt and panic stack. */
249         __u64   async_stack;                    /* 0x02f8 */
250         __u64   panic_stack;                    /* 0x0300 */
251
252         /* Address space pointer. */
253         __u64   kernel_asce;                    /* 0x0308 */
254         __u64   user_asce;                      /* 0x0310 */
255         __u64   user_exec_asce;                 /* 0x0318 */
256
257         /* SMP info area */
258         struct cpuid cpu_id;                    /* 0x0320 */
259         __u32   cpu_nr;                         /* 0x0328 */
260         __u32   softirq_pending;                /* 0x032c */
261         __u64   percpu_offset;                  /* 0x0330 */
262         __u64   ext_call_fast;                  /* 0x0338 */
263         __u64   int_clock;                      /* 0x0340 */
264         __u64   clock_comparator;               /* 0x0348 */
265         __u64   vdso_per_cpu_data;              /* 0x0350 */
266         __u64   machine_flags;                  /* 0x0358 */
267         __u64   ftrace_func;                    /* 0x0360 */
268         __u8    pad_0x0368[0x0380-0x0368];      /* 0x0368 */
269
270         /* Interrupt response block. */
271         __u8    irb[64];                        /* 0x0380 */
272
273         /* Per cpu primary space access list */
274         __u32   paste[16];                      /* 0x03c0 */
275
276         __u8    pad_0x0400[0x0e00-0x0400];      /* 0x0400 */
277
278         /*
279          * 0xe00 contains the address of the IPL Parameter Information
280          * block. Dump tools need IPIB for IPL after dump.
281          * Note: do not change the position of any fields in 0x0e00-0x0f00
282          */
283         __u64   ipib;                           /* 0x0e00 */
284         __u32   ipib_checksum;                  /* 0x0e08 */
285         __u8    pad_0x0e0c[0x11b8-0x0e0c];      /* 0x0e0c */
286
287         /* 64 bit extparam used for pfault/diag 250: defined by architecture */
288         __u64   ext_params2;                    /* 0x11B8 */
289         __u8    pad_0x11c0[0x1200-0x11C0];      /* 0x11C0 */
290
291         /* CPU register save area: defined by architecture */
292         __u64   floating_pt_save_area[16];      /* 0x1200 */
293         __u64   gpregs_save_area[16];           /* 0x1280 */
294         psw_t   psw_save_area;                  /* 0x1300 */
295         __u8    pad_0x1310[0x1318-0x1310];      /* 0x1310 */
296         __u32   prefixreg_save_area;            /* 0x1318 */
297         __u32   fpt_creg_save_area;             /* 0x131c */
298         __u8    pad_0x1320[0x1324-0x1320];      /* 0x1320 */
299         __u32   tod_progreg_save_area;          /* 0x1324 */
300         __u32   cpu_timer_save_area[2];         /* 0x1328 */
301         __u32   clock_comp_save_area[2];        /* 0x1330 */
302         __u8    pad_0x1338[0x1340-0x1338];      /* 0x1338 */
303         __u32   access_regs_save_area[16];      /* 0x1340 */
304         __u64   cregs_save_area[16];            /* 0x1380 */
305
306         /* align to the top of the prefix area */
307         __u8    pad_0x1400[0x2000-0x1400];      /* 0x1400 */
308 } __packed;
309
310 #endif /* CONFIG_32BIT */
311
312 #define S390_lowcore (*((struct _lowcore *) 0))
313
314 extern struct _lowcore *lowcore_ptr[];
315
316 static inline void set_prefix(__u32 address)
317 {
318         asm volatile("spx %0" : : "m" (address) : "memory");
319 }
320
321 static inline __u32 store_prefix(void)
322 {
323         __u32 address;
324
325         asm volatile("stpx %0" : "=m" (address));
326         return address;
327 }
328
329 #endif /* _ASM_S390_LOWCORE_H */