713fe9fb1fcc50e3d5774a493ed8e72d8bc045e3
[linux-2.6.git] / arch / s390 / include / asm / lowcore.h
1 /*
2  *  include/asm-s390/lowcore.h
3  *
4  *  S390 version
5  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
7  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9  */
10
11 #ifndef _ASM_S390_LOWCORE_H
12 #define _ASM_S390_LOWCORE_H
13
14 #define __LC_IPL_PARMBLOCK_PTR          0x0014
15 #define __LC_EXT_PARAMS                 0x0080
16 #define __LC_CPU_ADDRESS                0x0084
17 #define __LC_EXT_INT_CODE               0x0086
18
19 #define __LC_SVC_ILC                    0x0088
20 #define __LC_SVC_INT_CODE               0x008a
21 #define __LC_PGM_ILC                    0x008c
22 #define __LC_PGM_INT_CODE               0x008e
23
24 #define __LC_PER_ATMID                  0x0096
25 #define __LC_PER_ADDRESS                0x0098
26 #define __LC_PER_ACCESS_ID              0x00a1
27 #define __LC_AR_MODE_ID                 0x00a3
28
29 #define __LC_SUBCHANNEL_ID              0x00b8
30 #define __LC_SUBCHANNEL_NR              0x00ba
31 #define __LC_IO_INT_PARM                0x00bc
32 #define __LC_IO_INT_WORD                0x00c0
33 #define __LC_STFL_FAC_LIST              0x00c8
34 #define __LC_MCCK_CODE                  0x00e8
35
36 #define __LC_DUMP_REIPL                 0x0e00
37
38 #ifndef __s390x__
39 #define __LC_EXT_OLD_PSW                0x0018
40 #define __LC_SVC_OLD_PSW                0x0020
41 #define __LC_PGM_OLD_PSW                0x0028
42 #define __LC_MCK_OLD_PSW                0x0030
43 #define __LC_IO_OLD_PSW                 0x0038
44 #define __LC_EXT_NEW_PSW                0x0058
45 #define __LC_SVC_NEW_PSW                0x0060
46 #define __LC_PGM_NEW_PSW                0x0068
47 #define __LC_MCK_NEW_PSW                0x0070
48 #define __LC_IO_NEW_PSW                 0x0078
49 #define __LC_SAVE_AREA                  0x0200
50 #define __LC_RETURN_PSW                 0x0240
51 #define __LC_RETURN_MCCK_PSW            0x0248
52 #define __LC_SYNC_ENTER_TIMER           0x0250
53 #define __LC_ASYNC_ENTER_TIMER          0x0258
54 #define __LC_EXIT_TIMER                 0x0260
55 #define __LC_USER_TIMER                 0x0268
56 #define __LC_SYSTEM_TIMER               0x0270
57 #define __LC_STEAL_TIMER                0x0278
58 #define __LC_LAST_UPDATE_TIMER          0x0280
59 #define __LC_LAST_UPDATE_CLOCK          0x0288
60 #define __LC_CURRENT                    0x0290
61 #define __LC_THREAD_INFO                0x0294
62 #define __LC_KERNEL_STACK               0x0298
63 #define __LC_ASYNC_STACK                0x029c
64 #define __LC_PANIC_STACK                0x02a0
65 #define __LC_KERNEL_ASCE                0x02a4
66 #define __LC_USER_ASCE                  0x02a8
67 #define __LC_USER_EXEC_ASCE             0x02ac
68 #define __LC_CPUID                      0x02b0
69 #define __LC_INT_CLOCK                  0x02c8
70 #define __LC_MACHINE_FLAGS              0x02d8
71 #define __LC_IRB                        0x0300
72 #define __LC_PFAULT_INTPARM             0x0080
73 #define __LC_CPU_TIMER_SAVE_AREA        0x00d8
74 #define __LC_CLOCK_COMP_SAVE_AREA       0x00e0
75 #define __LC_PSW_SAVE_AREA              0x0100
76 #define __LC_PREFIX_SAVE_AREA           0x0108
77 #define __LC_AREGS_SAVE_AREA            0x0120
78 #define __LC_FPREGS_SAVE_AREA           0x0160
79 #define __LC_GPREGS_SAVE_AREA           0x0180
80 #define __LC_CREGS_SAVE_AREA            0x01c0
81 #else /* __s390x__ */
82 #define __LC_LAST_BREAK                 0x0110
83 #define __LC_EXT_OLD_PSW                0x0130
84 #define __LC_SVC_OLD_PSW                0x0140
85 #define __LC_PGM_OLD_PSW                0x0150
86 #define __LC_MCK_OLD_PSW                0x0160
87 #define __LC_IO_OLD_PSW                 0x0170
88 #define __LC_EXT_NEW_PSW                0x01b0
89 #define __LC_SVC_NEW_PSW                0x01c0
90 #define __LC_PGM_NEW_PSW                0x01d0
91 #define __LC_MCK_NEW_PSW                0x01e0
92 #define __LC_IO_NEW_PSW                 0x01f0
93 #define __LC_SAVE_AREA                  0x0200
94 #define __LC_RETURN_PSW                 0x0280
95 #define __LC_RETURN_MCCK_PSW            0x0290
96 #define __LC_SYNC_ENTER_TIMER           0x02a0
97 #define __LC_ASYNC_ENTER_TIMER          0x02a8
98 #define __LC_EXIT_TIMER                 0x02b0
99 #define __LC_USER_TIMER                 0x02b8
100 #define __LC_SYSTEM_TIMER               0x02c0
101 #define __LC_STEAL_TIMER                0x02c8
102 #define __LC_LAST_UPDATE_TIMER          0x02d0
103 #define __LC_LAST_UPDATE_CLOCK          0x02d8
104 #define __LC_CURRENT                    0x02e0
105 #define __LC_THREAD_INFO                0x02e8
106 #define __LC_KERNEL_STACK               0x02f0
107 #define __LC_ASYNC_STACK                0x02f8
108 #define __LC_PANIC_STACK                0x0300
109 #define __LC_KERNEL_ASCE                0x0308
110 #define __LC_USER_ASCE                  0x0310
111 #define __LC_USER_EXEC_ASCE             0x0318
112 #define __LC_CPUID                      0x0320
113 #define __LC_INT_CLOCK                  0x0340
114 #define __LC_VDSO_PER_CPU               0x0350
115 #define __LC_MACHINE_FLAGS              0x0358
116 #define __LC_IRB                        0x0380
117 #define __LC_PASTE                      0x03c0
118 #define __LC_PFAULT_INTPARM             0x11b8
119 #define __LC_FPREGS_SAVE_AREA           0x1200
120 #define __LC_GPREGS_SAVE_AREA           0x1280
121 #define __LC_PSW_SAVE_AREA              0x1300
122 #define __LC_PREFIX_SAVE_AREA           0x1318
123 #define __LC_FP_CREG_SAVE_AREA          0x131c
124 #define __LC_TODREG_SAVE_AREA           0x1324
125 #define __LC_CPU_TIMER_SAVE_AREA        0x1328
126 #define __LC_CLOCK_COMP_SAVE_AREA       0x1331
127 #define __LC_AREGS_SAVE_AREA            0x1340
128 #define __LC_CREGS_SAVE_AREA            0x1380
129 #endif /* __s390x__ */
130
131 #ifndef __ASSEMBLY__
132
133 #include <asm/cpuid.h>
134 #include <asm/ptrace.h>
135 #include <linux/types.h>
136
137 void restart_int_handler(void);
138 void ext_int_handler(void);
139 void system_call(void);
140 void pgm_check_handler(void);
141 void mcck_int_handler(void);
142 void io_int_handler(void);
143
144 struct save_area_s390 {
145         u32     ext_save;
146         u64     timer;
147         u64     clk_cmp;
148         u8      pad1[24];
149         u8      psw[8];
150         u32     pref_reg;
151         u8      pad2[20];
152         u32     acc_regs[16];
153         u64     fp_regs[4];
154         u32     gp_regs[16];
155         u32     ctrl_regs[16];
156 }  __attribute__((packed));
157
158 struct save_area_s390x {
159         u64     fp_regs[16];
160         u64     gp_regs[16];
161         u8      psw[16];
162         u8      pad1[8];
163         u32     pref_reg;
164         u32     fp_ctrl_reg;
165         u8      pad2[4];
166         u32     tod_reg;
167         u64     timer;
168         u64     clk_cmp;
169         u8      pad3[8];
170         u32     acc_regs[16];
171         u64     ctrl_regs[16];
172 }  __attribute__((packed));
173
174 union save_area {
175         struct save_area_s390   s390;
176         struct save_area_s390x  s390x;
177 };
178
179 #define SAVE_AREA_BASE_S390     0xd4
180 #define SAVE_AREA_BASE_S390X    0x1200
181
182 #ifndef __s390x__
183 #define SAVE_AREA_SIZE sizeof(struct save_area_s390)
184 #define SAVE_AREA_BASE SAVE_AREA_BASE_S390
185 #else
186 #define SAVE_AREA_SIZE sizeof(struct save_area_s390x)
187 #define SAVE_AREA_BASE SAVE_AREA_BASE_S390X
188 #endif
189
190 struct _lowcore
191 {
192 #ifndef __s390x__
193         /* 0x0000 - 0x01ff: defined by architecture */
194         psw_t   restart_psw;                    /* 0x0000 */
195         __u32   ccw2[4];                        /* 0x0008 */
196         psw_t   external_old_psw;               /* 0x0018 */
197         psw_t   svc_old_psw;                    /* 0x0020 */
198         psw_t   program_old_psw;                /* 0x0028 */
199         psw_t   mcck_old_psw;                   /* 0x0030 */
200         psw_t   io_old_psw;                     /* 0x0038 */
201         __u8    pad_0x0040[0x0058-0x0040];      /* 0x0040 */
202         psw_t   external_new_psw;               /* 0x0058 */
203         psw_t   svc_new_psw;                    /* 0x0060 */
204         psw_t   program_new_psw;                /* 0x0068 */
205         psw_t   mcck_new_psw;                   /* 0x0070 */
206         psw_t   io_new_psw;                     /* 0x0078 */
207         __u32   ext_params;                     /* 0x0080 */
208         __u16   cpu_addr;                       /* 0x0084 */
209         __u16   ext_int_code;                   /* 0x0086 */
210         __u16   svc_ilc;                        /* 0x0088 */
211         __u16   svc_code;                       /* 0x008a */
212         __u16   pgm_ilc;                        /* 0x008c */
213         __u16   pgm_code;                       /* 0x008e */
214         __u32   trans_exc_code;                 /* 0x0090 */
215         __u16   mon_class_num;                  /* 0x0094 */
216         __u16   per_perc_atmid;                 /* 0x0096 */
217         __u32   per_address;                    /* 0x0098 */
218         __u32   monitor_code;                   /* 0x009c */
219         __u8    exc_access_id;                  /* 0x00a0 */
220         __u8    per_access_id;                  /* 0x00a1 */
221         __u8    pad_0x00a2[0x00b8-0x00a2];      /* 0x00a2 */
222         __u16   subchannel_id;                  /* 0x00b8 */
223         __u16   subchannel_nr;                  /* 0x00ba */
224         __u32   io_int_parm;                    /* 0x00bc */
225         __u32   io_int_word;                    /* 0x00c0 */
226         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
227         __u32   stfl_fac_list;                  /* 0x00c8 */
228         __u8    pad_0x00cc[0x00d4-0x00cc];      /* 0x00cc */
229         __u32   extended_save_area_addr;        /* 0x00d4 */
230         __u32   cpu_timer_save_area[2];         /* 0x00d8 */
231         __u32   clock_comp_save_area[2];        /* 0x00e0 */
232         __u32   mcck_interruption_code[2];      /* 0x00e8 */
233         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
234         __u32   external_damage_code;           /* 0x00f4 */
235         __u32   failing_storage_address;        /* 0x00f8 */
236         __u8    pad_0x00fc[0x0100-0x00fc];      /* 0x00fc */
237         __u32   st_status_fixed_logout[4];      /* 0x0100 */
238         __u8    pad_0x0110[0x0120-0x0110];      /* 0x0110 */
239
240         /* CPU register save area: defined by architecture */
241         __u32   access_regs_save_area[16];      /* 0x0120 */
242         __u32   floating_pt_save_area[8];       /* 0x0160 */
243         __u32   gpregs_save_area[16];           /* 0x0180 */
244         __u32   cregs_save_area[16];            /* 0x01c0 */
245
246         /* Return psws. */
247         __u32   save_area[16];                  /* 0x0200 */
248         psw_t   return_psw;                     /* 0x0240 */
249         psw_t   return_mcck_psw;                /* 0x0248 */
250
251         /* CPU time accounting values */
252         __u64   sync_enter_timer;               /* 0x0250 */
253         __u64   async_enter_timer;              /* 0x0258 */
254         __u64   exit_timer;                     /* 0x0260 */
255         __u64   user_timer;                     /* 0x0268 */
256         __u64   system_timer;                   /* 0x0270 */
257         __u64   steal_timer;                    /* 0x0278 */
258         __u64   last_update_timer;              /* 0x0280 */
259         __u64   last_update_clock;              /* 0x0288 */
260
261         /* Current process. */
262         __u32   current_task;                   /* 0x0290 */
263         __u32   thread_info;                    /* 0x0294 */
264         __u32   kernel_stack;                   /* 0x0298 */
265
266         /* Interrupt and panic stack. */
267         __u32   async_stack;                    /* 0x029c */
268         __u32   panic_stack;                    /* 0x02a0 */
269
270         /* Address space pointer. */
271         __u32   kernel_asce;                    /* 0x02a4 */
272         __u32   user_asce;                      /* 0x02a8 */
273         __u32   user_exec_asce;                 /* 0x02ac */
274
275         /* SMP info area */
276         cpuid_t cpu_id;                         /* 0x02b0 */
277         __u32   cpu_nr;                         /* 0x02b8 */
278         __u32   softirq_pending;                /* 0x02bc */
279         __u32   percpu_offset;                  /* 0x02c0 */
280         __u32   ext_call_fast;                  /* 0x02c4 */
281         __u64   int_clock;                      /* 0x02c8 */
282         __u64   clock_comparator;               /* 0x02d0 */
283         __u32   machine_flags;                  /* 0x02d8 */
284         __u8    pad_0x02dc[0x0300-0x02dc];      /* 0x02dc */
285
286         /* Interrupt response block */
287         __u8    irb[64];                        /* 0x0300 */
288
289         __u8    pad_0x0400[0x0e00-0x0400];      /* 0x0400 */
290
291         /*
292          * 0xe00 contains the address of the IPL Parameter Information
293          * block. Dump tools need IPIB for IPL after dump.
294          * Note: do not change the position of any fields in 0x0e00-0x0f00
295          */
296         __u32   ipib;                           /* 0x0e00 */
297         __u32   ipib_checksum;                  /* 0x0e04 */
298
299         /* Align to the top 1k of prefix area */
300         __u8    pad_0x0e08[0x1000-0x0e08];      /* 0x0e08 */
301 #else /* !__s390x__ */
302         /* 0x0000 - 0x01ff: defined by architecture */
303         __u32   ccw1[2];                        /* 0x0000 */
304         __u32   ccw2[4];                        /* 0x0008 */
305         __u8    pad_0x0018[0x0080-0x0018];      /* 0x0018 */
306         __u32   ext_params;                     /* 0x0080 */
307         __u16   cpu_addr;                       /* 0x0084 */
308         __u16   ext_int_code;                   /* 0x0086 */
309         __u16   svc_ilc;                        /* 0x0088 */
310         __u16   svc_code;                       /* 0x008a */
311         __u16   pgm_ilc;                        /* 0x008c */
312         __u16   pgm_code;                       /* 0x008e */
313         __u32   data_exc_code;                  /* 0x0090 */
314         __u16   mon_class_num;                  /* 0x0094 */
315         __u16   per_perc_atmid;                 /* 0x0096 */
316         addr_t  per_address;                    /* 0x0098 */
317         __u8    exc_access_id;                  /* 0x00a0 */
318         __u8    per_access_id;                  /* 0x00a1 */
319         __u8    op_access_id;                   /* 0x00a2 */
320         __u8    ar_access_id;                   /* 0x00a3 */
321         __u8    pad_0x00a4[0x00a8-0x00a4];      /* 0x00a4 */
322         addr_t  trans_exc_code;                 /* 0x00a8 */
323         addr_t  monitor_code;                   /* 0x00b0 */
324         __u16   subchannel_id;                  /* 0x00b8 */
325         __u16   subchannel_nr;                  /* 0x00ba */
326         __u32   io_int_parm;                    /* 0x00bc */
327         __u32   io_int_word;                    /* 0x00c0 */
328         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
329         __u32   stfl_fac_list;                  /* 0x00c8 */
330         __u8    pad_0x00cc[0x00e8-0x00cc];      /* 0x00cc */
331         __u32   mcck_interruption_code[2];      /* 0x00e8 */
332         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
333         __u32   external_damage_code;           /* 0x00f4 */
334         addr_t  failing_storage_address;        /* 0x00f8 */
335         __u8    pad_0x0100[0x0120-0x0100];      /* 0x0100 */
336         psw_t   restart_old_psw;                /* 0x0120 */
337         psw_t   external_old_psw;               /* 0x0130 */
338         psw_t   svc_old_psw;                    /* 0x0140 */
339         psw_t   program_old_psw;                /* 0x0150 */
340         psw_t   mcck_old_psw;                   /* 0x0160 */
341         psw_t   io_old_psw;                     /* 0x0170 */
342         __u8    pad_0x0180[0x01a0-0x0180];      /* 0x0180 */
343         psw_t   restart_psw;                    /* 0x01a0 */
344         psw_t   external_new_psw;               /* 0x01b0 */
345         psw_t   svc_new_psw;                    /* 0x01c0 */
346         psw_t   program_new_psw;                /* 0x01d0 */
347         psw_t   mcck_new_psw;                   /* 0x01e0 */
348         psw_t   io_new_psw;                     /* 0x01f0 */
349
350         /* Entry/exit save area & return psws. */
351         __u64   save_area[16];                  /* 0x0200 */
352         psw_t   return_psw;                     /* 0x0280 */
353         psw_t   return_mcck_psw;                /* 0x0290 */
354
355         /* CPU accounting and timing values. */
356         __u64   sync_enter_timer;               /* 0x02a0 */
357         __u64   async_enter_timer;              /* 0x02a8 */
358         __u64   exit_timer;                     /* 0x02b0 */
359         __u64   user_timer;                     /* 0x02b8 */
360         __u64   system_timer;                   /* 0x02c0 */
361         __u64   steal_timer;                    /* 0x02c8 */
362         __u64   last_update_timer;              /* 0x02d0 */
363         __u64   last_update_clock;              /* 0x02d8 */
364
365         /* Current process. */
366         __u64   current_task;                   /* 0x02e0 */
367         __u64   thread_info;                    /* 0x02e8 */
368         __u64   kernel_stack;                   /* 0x02f0 */
369
370         /* Interrupt and panic stack. */
371         __u64   async_stack;                    /* 0x02f8 */
372         __u64   panic_stack;                    /* 0x0300 */
373
374         /* Address space pointer. */
375         __u64   kernel_asce;                    /* 0x0308 */
376         __u64   user_asce;                      /* 0x0310 */
377         __u64   user_exec_asce;                 /* 0x0318 */
378
379         /* SMP info area */
380         cpuid_t cpu_id;                         /* 0x0320 */
381         __u32   cpu_nr;                         /* 0x0328 */
382         __u32   softirq_pending;                /* 0x032c */
383         __u64   percpu_offset;                  /* 0x0330 */
384         __u64   ext_call_fast;                  /* 0x0338 */
385         __u64   int_clock;                      /* 0x0340 */
386         __u64   clock_comparator;               /* 0x0348 */
387         __u64   vdso_per_cpu_data;              /* 0x0350 */
388         __u64   machine_flags;                  /* 0x0358 */
389         __u8    pad_0x0360[0x0380-0x0360];      /* 0x0360 */
390
391         /* Interrupt response block. */
392         __u8    irb[64];                        /* 0x0380 */
393
394         /* Per cpu primary space access list */
395         __u32   paste[16];                      /* 0x03c0 */
396
397         __u8    pad_0x0400[0x0e00-0x0400];      /* 0x0400 */
398
399         /*
400          * 0xe00 contains the address of the IPL Parameter Information
401          * block. Dump tools need IPIB for IPL after dump.
402          * Note: do not change the position of any fields in 0x0e00-0x0f00
403          */
404         __u64   ipib;                           /* 0x0e00 */
405         __u32   ipib_checksum;                  /* 0x0e08 */
406         __u8    pad_0x0e0c[0x11b8-0x0e0c];      /* 0x0e0c */
407
408         /* 64 bit extparam used for pfault/diag 250: defined by architecture */
409         __u64   ext_params2;                    /* 0x11B8 */
410         __u8    pad_0x11c0[0x1200-0x11C0];      /* 0x11C0 */
411
412         /* CPU register save area: defined by architecture */
413         __u64   floating_pt_save_area[16];      /* 0x1200 */
414         __u64   gpregs_save_area[16];           /* 0x1280 */
415         __u32   st_status_fixed_logout[4];      /* 0x1300 */
416         __u8    pad_0x1310[0x1318-0x1310];      /* 0x1310 */
417         __u32   prefixreg_save_area;            /* 0x1318 */
418         __u32   fpt_creg_save_area;             /* 0x131c */
419         __u8    pad_0x1320[0x1324-0x1320];      /* 0x1320 */
420         __u32   tod_progreg_save_area;          /* 0x1324 */
421         __u32   cpu_timer_save_area[2];         /* 0x1328 */
422         __u32   clock_comp_save_area[2];        /* 0x1330 */
423         __u8    pad_0x1338[0x1340-0x1338];      /* 0x1338 */
424         __u32   access_regs_save_area[16];      /* 0x1340 */
425         __u64   cregs_save_area[16];            /* 0x1380 */
426
427         /* align to the top of the prefix area */
428         __u8    pad_0x1400[0x2000-0x1400];      /* 0x1400 */
429 #endif /* !__s390x__ */
430 } __attribute__((packed)); /* End structure*/
431
432 #define S390_lowcore (*((struct _lowcore *) 0))
433 extern struct _lowcore *lowcore_ptr[];
434
435 static inline void set_prefix(__u32 address)
436 {
437         asm volatile("spx %0" : : "m" (address) : "memory");
438 }
439
440 static inline __u32 store_prefix(void)
441 {
442         __u32 address;
443
444         asm volatile("stpx %0" : "=m" (address));
445         return address;
446 }
447
448 #endif
449
450 #endif