[PATCH] 1/5 powerpc: Rework PowerMac i2c part 1
[linux-2.6.git] / arch / powerpc / platforms / powermac / low_i2c.c
1 /*
2  * arch/powerpc/platforms/powermac/low_i2c.c
3  *
4  *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
5  *
6  *  This program is free software; you can redistribute it and/or
7  *  modify it under the terms of the GNU General Public License
8  *  as published by the Free Software Foundation; either version
9  *  2 of the License, or (at your option) any later version.
10  *
11  * The linux i2c layer isn't completely suitable for our needs for various
12  * reasons ranging from too late initialisation to semantics not perfectly
13  * matching some requirements of the apple platform functions etc...
14  *
15  * This file thus provides a simple low level unified i2c interface for
16  * powermac that covers the various types of i2c busses used in Apple machines.
17  * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18  * banging busses found on older chipstes in earlier machines if we ever need
19  * one of them.
20  *
21  * The drivers in this file are synchronous/blocking. In addition, the
22  * keywest one is fairly slow due to the use of msleep instead of interrupts
23  * as the interrupt is currently used by i2c-keywest. In the long run, we
24  * might want to get rid of those high-level interfaces to linux i2c layer
25  * either completely (converting all drivers) or replacing them all with a
26  * single stub driver on top of this one. Once done, the interrupt will be
27  * available for our use.
28  */
29
30 #undef DEBUG
31 #undef DEBUG_LOW
32
33 #include <linux/config.h>
34 #include <linux/types.h>
35 #include <linux/sched.h>
36 #include <linux/init.h>
37 #include <linux/module.h>
38 #include <linux/adb.h>
39 #include <linux/pmu.h>
40 #include <linux/delay.h>
41 #include <linux/completion.h>
42 #include <asm/keylargo.h>
43 #include <asm/uninorth.h>
44 #include <asm/io.h>
45 #include <asm/prom.h>
46 #include <asm/machdep.h>
47 #include <asm/smu.h>
48 #include <asm/pmac_low_i2c.h>
49
50 #ifdef DEBUG
51 #define DBG(x...) do {\
52                 printk(KERN_DEBUG "low_i2c:" x);        \
53         } while(0)
54 #else
55 #define DBG(x...)
56 #endif
57
58 #ifdef DEBUG_LOW
59 #define DBG_LOW(x...) do {\
60                 printk(KERN_DEBUG "low_i2c:" x);        \
61         } while(0)
62 #else
63 #define DBG_LOW(x...)
64 #endif
65
66 /*
67  * A bus structure. Each bus in the system has such a structure associated.
68  */
69 struct pmac_i2c_bus
70 {
71         struct list_head        link;
72         struct device_node      *controller;
73         struct device_node      *busnode;
74         int                     type;
75         int                     flags;
76         struct i2c_adapter      *adapter;
77         void                    *hostdata;
78         int                     channel;        /* some hosts have multiple */
79         int                     mode;           /* current mode */
80         struct semaphore        sem;
81         int                     opened;
82         int                     polled;         /* open mode */
83
84         /* ops */
85         int (*open)(struct pmac_i2c_bus *bus);
86         void (*close)(struct pmac_i2c_bus *bus);
87         int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
88                     u32 subaddr, u8 *data, int len);
89 };
90
91 static LIST_HEAD(pmac_i2c_busses);
92
93 /*
94  * Keywest implementation
95  */
96
97 struct pmac_i2c_host_kw
98 {
99         struct semaphore        mutex;          /* Access mutex for use by
100                                                  * i2c-keywest */
101         void __iomem            *base;          /* register base address */
102         int                     bsteps;         /* register stepping */
103         int                     speed;          /* speed */
104 };
105
106 /* Register indices */
107 typedef enum {
108         reg_mode = 0,
109         reg_control,
110         reg_status,
111         reg_isr,
112         reg_ier,
113         reg_addr,
114         reg_subaddr,
115         reg_data
116 } reg_t;
117
118
119 /* Mode register */
120 #define KW_I2C_MODE_100KHZ      0x00
121 #define KW_I2C_MODE_50KHZ       0x01
122 #define KW_I2C_MODE_25KHZ       0x02
123 #define KW_I2C_MODE_DUMB        0x00
124 #define KW_I2C_MODE_STANDARD    0x04
125 #define KW_I2C_MODE_STANDARDSUB 0x08
126 #define KW_I2C_MODE_COMBINED    0x0C
127 #define KW_I2C_MODE_MODE_MASK   0x0C
128 #define KW_I2C_MODE_CHAN_MASK   0xF0
129
130 /* Control register */
131 #define KW_I2C_CTL_AAK          0x01
132 #define KW_I2C_CTL_XADDR        0x02
133 #define KW_I2C_CTL_STOP         0x04
134 #define KW_I2C_CTL_START        0x08
135
136 /* Status register */
137 #define KW_I2C_STAT_BUSY        0x01
138 #define KW_I2C_STAT_LAST_AAK    0x02
139 #define KW_I2C_STAT_LAST_RW     0x04
140 #define KW_I2C_STAT_SDA         0x08
141 #define KW_I2C_STAT_SCL         0x10
142
143 /* IER & ISR registers */
144 #define KW_I2C_IRQ_DATA         0x01
145 #define KW_I2C_IRQ_ADDR         0x02
146 #define KW_I2C_IRQ_STOP         0x04
147 #define KW_I2C_IRQ_START        0x08
148 #define KW_I2C_IRQ_MASK         0x0F
149
150 /* State machine states */
151 enum {
152         state_idle,
153         state_addr,
154         state_read,
155         state_write,
156         state_stop,
157         state_dead
158 };
159
160 #define WRONG_STATE(name) do {\
161                 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s (isr: %02x)\n", \
162                        name, __kw_state_names[state], isr); \
163         } while(0)
164
165 static const char *__kw_state_names[] = {
166         "state_idle",
167         "state_addr",
168         "state_read",
169         "state_write",
170         "state_stop",
171         "state_dead"
172 };
173
174 static inline u8 __kw_read_reg(struct pmac_i2c_bus *bus, reg_t reg)
175 {
176         struct pmac_i2c_host_kw *host = bus->hostdata;
177         return readb(host->base + (((unsigned int)reg) << host->bsteps));
178 }
179
180 static inline void __kw_write_reg(struct pmac_i2c_bus *bus, reg_t reg, u8 val)
181 {
182         struct pmac_i2c_host_kw *host = bus->hostdata;
183         writeb(val, host->base + (((unsigned)reg) << host->bsteps));
184         (void)__kw_read_reg(bus, reg_subaddr);
185 }
186
187 #define kw_write_reg(reg, val)  __kw_write_reg(bus, reg, val)
188 #define kw_read_reg(reg)        __kw_read_reg(bus, reg)
189
190 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_bus* bus)
191 {
192         int i, j;
193         u8 isr;
194         
195         for (i = 0; i < 1000; i++) {
196                 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
197                 if (isr != 0)
198                         return isr;
199
200                 /* This code is used with the timebase frozen, we cannot rely
201                  * on udelay nor schedule when in polled mode !
202                  * For now, just use a bogus loop....
203                  */
204                 if (bus->polled) {
205                         for (j = 1; j < 1000000; j++)
206                                 mb();
207                 } else
208                         msleep(1);
209         }
210         return isr;
211 }
212
213 static int kw_i2c_handle_interrupt(struct pmac_i2c_bus *bus, int state, int rw,
214                                    int *rc, u8 **data, int *len, u8 isr)
215 {
216         u8 ack;
217
218         DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
219                 __kw_state_names[state], isr);
220
221         if (isr == 0) {
222                 if (state != state_stop) {
223                         DBG_LOW("KW: Timeout !\n");
224                         *rc = -EIO;
225                         goto stop;
226                 }
227                 if (state == state_stop) {
228                         ack = kw_read_reg(reg_status);
229                         if (!(ack & KW_I2C_STAT_BUSY)) {
230                                 state = state_idle;
231                                 kw_write_reg(reg_ier, 0x00);
232                         }
233                 }
234                 return state;
235         }
236
237         if (isr & KW_I2C_IRQ_ADDR) {
238                 ack = kw_read_reg(reg_status);
239                 if (state != state_addr) {
240                         kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
241                         WRONG_STATE("KW_I2C_IRQ_ADDR"); 
242                         *rc = -EIO;
243                         goto stop;
244                 }
245                 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
246                         *rc = -ENODEV;
247                         DBG_LOW("KW: NAK on address\n");
248                         return state_stop;                   
249                 } else {
250                         if (rw) {
251                                 state = state_read;
252                                 if (*len > 1)
253                                         kw_write_reg(reg_control,
254                                                      KW_I2C_CTL_AAK);
255                         } else {
256                                 state = state_write;
257                                 kw_write_reg(reg_data, **data);
258                                 (*data)++; (*len)--;
259                         }
260                 }
261                 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
262         }
263
264         if (isr & KW_I2C_IRQ_DATA) {
265                 if (state == state_read) {
266                         **data = kw_read_reg(reg_data);
267                         (*data)++; (*len)--;
268                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
269                         if ((*len) == 0)
270                                 state = state_stop;
271                         else if ((*len) == 1)
272                                 kw_write_reg(reg_control, 0);
273                 } else if (state == state_write) {
274                         ack = kw_read_reg(reg_status);
275                         if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
276                                 DBG_LOW("KW: nack on data write\n");
277                                 *rc = -EIO;
278                                 goto stop;
279                         } else if (*len) {
280                                 kw_write_reg(reg_data, **data);
281                                 (*data)++; (*len)--;
282                         } else {
283                                 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
284                                 state = state_stop;
285                                 *rc = 0;
286                         }
287                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
288                 } else {
289                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
290                         WRONG_STATE("KW_I2C_IRQ_DATA"); 
291                         if (state != state_stop) {
292                                 *rc = -EIO;
293                                 goto stop;
294                         }
295                 }
296         }
297
298         if (isr & KW_I2C_IRQ_STOP) {
299                 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
300                 if (state != state_stop) {
301                         WRONG_STATE("KW_I2C_IRQ_STOP");
302                         *rc = -EIO;
303                 }
304                 return state_idle;
305         }
306
307         if (isr & KW_I2C_IRQ_START)
308                 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
309
310         return state;
311
312  stop:
313         kw_write_reg(reg_control, KW_I2C_CTL_STOP);     
314         return state_stop;
315 }
316
317 static int kw_i2c_open(struct pmac_i2c_bus *bus)
318 {
319         struct pmac_i2c_host_kw *host = bus->hostdata;
320         down(&host->mutex);
321         return 0;
322 }
323
324 static void kw_i2c_close(struct pmac_i2c_bus *bus)
325 {
326         struct pmac_i2c_host_kw *host = bus->hostdata;
327         up(&host->mutex);
328 }
329
330 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
331                        u32 subaddr, u8 *data, int len)
332 {
333         struct pmac_i2c_host_kw *host = bus->hostdata;
334         u8 mode_reg = host->speed;
335         int state = state_addr;
336         int rc = 0;
337
338         /* Setup mode & subaddress if any */
339         switch(bus->mode) {
340         case pmac_i2c_mode_dumb:
341                 return -EINVAL;
342         case pmac_i2c_mode_std:
343                 mode_reg |= KW_I2C_MODE_STANDARD;
344                 if (subsize != 0)
345                         return -EINVAL;
346                 break;
347         case pmac_i2c_mode_stdsub:
348                 mode_reg |= KW_I2C_MODE_STANDARDSUB;
349                 if (subsize != 1)
350                         return -EINVAL;
351                 break;
352         case pmac_i2c_mode_combined:
353                 mode_reg |= KW_I2C_MODE_COMBINED;
354                 if (subsize != 1)
355                         return -EINVAL;
356                 break;
357         }
358
359         /* Setup channel & clear pending irqs */
360         kw_write_reg(reg_isr, kw_read_reg(reg_isr));
361         kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
362         kw_write_reg(reg_status, 0);
363
364         /* Set up address and r/w bit, strip possible stale bus number from
365          * address top bits
366          */
367         kw_write_reg(reg_addr, addrdir & 0xff);
368
369         /* Set up the sub address */
370         if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
371             || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
372                 kw_write_reg(reg_subaddr, subaddr);
373
374         /* Start sending address & disable interrupt*/
375         kw_write_reg(reg_ier, 0 /*KW_I2C_IRQ_MASK*/);
376         kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
377
378         /* State machine, to turn into an interrupt handler in the future */
379         while(state != state_idle) {
380                 u8 isr = kw_i2c_wait_interrupt(bus);
381                 state = kw_i2c_handle_interrupt(bus, state, addrdir & 1, &rc,
382                                                 &data, &len, isr);
383         }
384
385         return rc;
386 }
387
388 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
389 {
390         struct pmac_i2c_host_kw *host;
391         u32                     *psteps, *prate, *addrp, steps;
392
393         host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
394         if (host == NULL) {
395                 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
396                        np->full_name);
397                 return NULL;
398         }
399
400         /* Apple is kind enough to provide a valid AAPL,address property
401          * on all i2c keywest nodes so far ... we would have to fallback
402          * to macio parsing if that wasn't the case
403          */
404         addrp = (u32 *)get_property(np, "AAPL,address", NULL);
405         if (addrp == NULL) {
406                 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
407                        np->full_name);
408                 kfree(host);
409                 return NULL;
410         }
411         init_MUTEX(&host->mutex);
412         psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
413         steps = psteps ? (*psteps) : 0x10;
414         for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
415                 steps >>= 1;
416         /* Select interface rate */
417         host->speed = KW_I2C_MODE_25KHZ;
418         prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
419         if (prate) switch(*prate) {
420         case 100:
421                 host->speed = KW_I2C_MODE_100KHZ;
422                 break;
423         case 50:
424                 host->speed = KW_I2C_MODE_50KHZ;
425                 break;
426         case 25:
427                 host->speed = KW_I2C_MODE_25KHZ;
428                 break;
429         }       
430
431         printk(KERN_INFO "KeyWest i2c @0x%08x %s\n", *addrp, np->full_name);
432         host->base = ioremap((*addrp), 0x1000);
433
434         return host;
435 }
436
437
438 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
439                               struct device_node *controller,
440                               struct device_node *busnode,
441                               int channel)
442 {
443         struct pmac_i2c_bus *bus;
444
445         bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
446         if (bus == NULL)
447                 return;
448
449         bus->controller = of_node_get(controller);
450         bus->busnode = of_node_get(busnode);
451         bus->type = pmac_i2c_bus_keywest;
452         bus->hostdata = host;
453         bus->channel = channel;
454         bus->mode = pmac_i2c_mode_std;
455         bus->open = kw_i2c_open;
456         bus->close = kw_i2c_close;
457         bus->xfer = kw_i2c_xfer;
458         init_MUTEX(&bus->sem);
459         if (controller == busnode)
460                 bus->flags = pmac_i2c_multibus;
461         list_add(&bus->link, &pmac_i2c_busses);
462
463         printk(KERN_INFO " channel %d bus %s\n", channel,
464                (controller == busnode) ? "<multibus>" : busnode->full_name);
465 }
466
467 static void __init kw_i2c_probe(void)
468 {
469         struct device_node *np, *child, *parent;
470
471         /* Probe keywest-i2c busses */
472         for (np = NULL;
473              (np = of_find_compatible_node(np, "i2c","keywest-i2c")) != NULL;){
474                 struct pmac_i2c_host_kw *host;
475                 int multibus, chans, i;
476
477                 /* Found one, init a host structure */
478                 host = kw_i2c_host_init(np);
479                 if (host == NULL)
480                         continue;
481
482                 /* Now check if we have a multibus setup (old style) or if we
483                  * have proper bus nodes. Note that the "new" way (proper bus
484                  * nodes) might cause us to not create some busses that are
485                  * kept hidden in the device-tree. In the future, we might
486                  * want to work around that by creating busses without a node
487                  * but not for now
488                  */
489                 child = of_get_next_child(np, NULL);
490                 multibus = !child || strcmp(child->name, "i2c-bus");
491                 of_node_put(child);
492
493                 /* For a multibus setup, we get the bus count based on the
494                  * parent type
495                  */
496                 if (multibus) {
497                         parent = of_get_parent(np);
498                         if (parent == NULL)
499                                 continue;
500                         chans = parent->name[0] == 'u' ? 2 : 1;
501                         for (i = 0; i < chans; i++)
502                                 kw_i2c_add(host, np, np, i);
503                 } else {
504                         for (child = NULL;
505                              (child = of_get_next_child(np, child)) != NULL;) {
506                                 u32 *reg =
507                                         (u32 *)get_property(child, "reg", NULL);
508                                 if (reg == NULL)
509                                         continue;
510                                 kw_i2c_add(host, np, child, *reg);
511                         }
512                 }
513         }
514 }
515
516
517 /*
518  *
519  * PMU implementation
520  *
521  */
522
523 #ifdef CONFIG_ADB_PMU
524
525 /*
526  * i2c command block to the PMU
527  */
528 struct pmu_i2c_hdr {
529         u8      bus;
530         u8      mode;
531         u8      bus2;
532         u8      address;
533         u8      sub_addr;
534         u8      comb_addr;
535         u8      count;
536         u8      data[];
537 };
538
539 static void pmu_i2c_complete(struct adb_request *req)
540 {
541         complete(req->arg);
542 }
543
544 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
545                         u32 subaddr, u8 *data, int len)
546 {
547         struct adb_request *req = bus->hostdata;
548         struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
549         struct completion comp;
550         int read = addrdir & 1;
551         int retry;
552         int rc = 0;
553
554         /* For now, limit ourselves to 16 bytes transfers */
555         if (len > 16)
556                 return -EINVAL;
557
558         init_completion(&comp);
559
560         for (retry = 0; retry < 16; retry++) {
561                 memset(req, 0, sizeof(struct adb_request));
562                 hdr->bus = bus->channel;
563                 hdr->count = len;
564
565                 switch(bus->mode) {
566                 case pmac_i2c_mode_std:
567                         if (subsize != 0)
568                                 return -EINVAL;
569                         hdr->address = addrdir;
570                         hdr->mode = PMU_I2C_MODE_SIMPLE;
571                         break;
572                 case pmac_i2c_mode_stdsub:
573                 case pmac_i2c_mode_combined:
574                         if (subsize != 1)
575                                 return -EINVAL;
576                         hdr->address = addrdir & 0xfe;
577                         hdr->comb_addr = addrdir;
578                         hdr->sub_addr = subaddr;
579                         if (bus->mode == pmac_i2c_mode_stdsub)
580                                 hdr->mode = PMU_I2C_MODE_STDSUB;
581                         else
582                                 hdr->mode = PMU_I2C_MODE_COMBINED;
583                         break;
584                 default:
585                         return -EINVAL;
586                 }
587
588                 INIT_COMPLETION(comp);
589                 req->data[0] = PMU_I2C_CMD;
590                 req->reply[0] = 0xff;
591                 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
592                 req->done = pmu_i2c_complete;
593                 req->arg = &comp;
594                 if (!read) {
595                         memcpy(hdr->data, data, len);
596                         req->nbytes += len;
597                 }
598                 rc = pmu_queue_request(req);
599                 if (rc)
600                         return rc;
601                 wait_for_completion(&comp);
602                 if (req->reply[0] == PMU_I2C_STATUS_OK)
603                         break;
604                 msleep(15);
605         }
606         if (req->reply[0] != PMU_I2C_STATUS_OK)
607                 return -EIO;
608
609         for (retry = 0; retry < 16; retry++) {
610                 memset(req, 0, sizeof(struct adb_request));
611
612                 /* I know that looks like a lot, slow as hell, but darwin
613                  * does it so let's be on the safe side for now
614                  */
615                 msleep(15);
616
617                 hdr->bus = PMU_I2C_BUS_STATUS;
618
619                 INIT_COMPLETION(comp);
620                 req->data[0] = PMU_I2C_CMD;
621                 req->reply[0] = 0xff;
622                 req->nbytes = 2;
623                 req->done = pmu_i2c_complete;
624                 req->arg = &comp;
625                 rc = pmu_queue_request(req);
626                 if (rc)
627                         return rc;
628                 wait_for_completion(&comp);
629
630                 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
631                         return 0;
632                 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
633                         int rlen = req->reply_len - 1;
634
635                         if (rlen != len) {
636                                 printk(KERN_WARNING "low_i2c: PMU returned %d"
637                                        " bytes, expected %d !\n", rlen, len);
638                                 return -EIO;
639                         }
640                         memcpy(data, &req->reply[1], len);
641                         return 0;
642                 }
643         }
644         return -EIO;
645 }
646
647 static void __init pmu_i2c_probe(void)
648 {
649         struct pmac_i2c_bus *bus;
650         struct device_node *busnode;
651         int channel, sz;
652
653         if (!pmu_present())
654                 return;
655
656         /* There might or might not be a "pmu-i2c" node, we use that
657          * or via-pmu itself, whatever we find. I haven't seen a machine
658          * with separate bus nodes, so we assume a multibus setup
659          */
660         busnode = of_find_node_by_name(NULL, "pmu-i2c");
661         if (busnode == NULL)
662                 busnode = of_find_node_by_name(NULL, "via-pmu");
663         if (busnode == NULL)
664                 return;
665
666         printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
667
668         /*
669          * We add bus 1 and 2 only for now, bus 0 is "special"
670          */
671         for (channel = 1; channel <= 2; channel++) {
672                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
673                 bus = kzalloc(sz, GFP_KERNEL);
674                 if (bus == NULL)
675                         return;
676
677                 bus->controller = busnode;
678                 bus->busnode = busnode;
679                 bus->type = pmac_i2c_bus_pmu;
680                 bus->channel = channel;
681                 bus->mode = pmac_i2c_mode_std;
682                 bus->hostdata = bus + 1;
683                 bus->xfer = pmu_i2c_xfer;
684                 init_MUTEX(&bus->sem);
685                 bus->flags = pmac_i2c_multibus;
686                 list_add(&bus->link, &pmac_i2c_busses);
687
688                 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
689         }
690 }
691
692 #endif /* CONFIG_ADB_PMU */
693
694
695 /*
696  *
697  * SMU implementation
698  *
699  */
700
701 #ifdef CONFIG_PMAC_SMU
702
703 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
704 {
705         complete(misc);
706 }
707
708 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
709                         u32 subaddr, u8 *data, int len)
710 {
711         struct smu_i2c_cmd *cmd = bus->hostdata;
712         struct completion comp;
713         int read = addrdir & 1;
714         int rc = 0;
715
716         memset(cmd, 0, sizeof(struct smu_i2c_cmd));
717         cmd->info.bus = bus->channel;
718         cmd->info.devaddr = addrdir;
719         cmd->info.datalen = len;
720
721         switch(bus->mode) {
722         case pmac_i2c_mode_std:
723                 if (subsize != 0)
724                         return -EINVAL;
725                 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
726                 break;
727         case pmac_i2c_mode_stdsub:
728         case pmac_i2c_mode_combined:
729                 if (subsize > 3 || subsize < 1)
730                         return -EINVAL;
731                 cmd->info.sublen = subsize;
732                 /* that's big-endian only but heh ! */
733                 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
734                        subsize);
735                 if (bus->mode == pmac_i2c_mode_stdsub)
736                         cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
737                 else
738                         cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
739                 break;
740         default:
741                 return -EINVAL;
742         }
743         if (!read)
744                 memcpy(cmd->info.data, data, len);
745
746         init_completion(&comp);
747         cmd->done = smu_i2c_complete;
748         cmd->misc = &comp;
749         rc = smu_queue_i2c(cmd);
750         if (rc < 0)
751                 return rc;
752         wait_for_completion(&comp);
753         rc = cmd->status;
754
755         if (read)
756                 memcpy(data, cmd->info.data, len);
757         return rc < 0 ? rc : 0;
758 }
759
760 static void __init smu_i2c_probe(void)
761 {
762         struct device_node *controller, *busnode;
763         struct pmac_i2c_bus *bus;
764         u32 *reg;
765         int sz;
766
767         if (!smu_present())
768                 return;
769
770         controller = of_find_node_by_name(NULL, "smu_i2c_control");
771         if (controller == NULL)
772                 controller = of_find_node_by_name(NULL, "smu");
773         if (controller == NULL)
774                 return;
775
776         printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
777
778         /* Look for childs, note that they might not be of the right
779          * type as older device trees mix i2c busses and other thigns
780          * at the same level
781          */
782         for (busnode = NULL;
783              (busnode = of_get_next_child(controller, busnode)) != NULL;) {
784                 if (strcmp(busnode->type, "i2c") &&
785                     strcmp(busnode->type, "i2c-bus"))
786                         continue;
787                 reg = (u32 *)get_property(busnode, "reg", NULL);
788                 if (reg == NULL)
789                         continue;
790
791                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
792                 bus = kzalloc(sz, GFP_KERNEL);
793                 if (bus == NULL)
794                         return;
795
796                 bus->controller = controller;
797                 bus->busnode = of_node_get(busnode);
798                 bus->type = pmac_i2c_bus_smu;
799                 bus->channel = *reg;
800                 bus->mode = pmac_i2c_mode_std;
801                 bus->hostdata = bus + 1;
802                 bus->xfer = smu_i2c_xfer;
803                 init_MUTEX(&bus->sem);
804                 bus->flags = 0;
805                 list_add(&bus->link, &pmac_i2c_busses);
806
807                 printk(KERN_INFO " channel %x bus %s\n",
808                        bus->channel, busnode->full_name);
809         }
810 }
811
812 #endif /* CONFIG_PMAC_SMU */
813
814 /*
815  *
816  * Core code
817  *
818  */
819
820
821 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
822 {
823         struct device_node *p = of_node_get(node);
824         struct device_node *prev = NULL;
825         struct pmac_i2c_bus *bus;
826
827         while(p) {
828                 list_for_each_entry(bus, &pmac_i2c_busses, link) {
829                         if (p == bus->busnode) {
830                                 if (prev && bus->flags & pmac_i2c_multibus) {
831                                         u32 *reg;
832                                         reg = (u32 *)get_property(prev, "reg",
833                                                                   NULL);
834                                         if (!reg)
835                                                 continue;
836                                         if (((*reg) >> 8) != bus->channel)
837                                                 continue;
838                                 }
839                                 of_node_put(p);
840                                 of_node_put(prev);
841                                 return bus;
842                         }
843                 }
844                 of_node_put(prev);
845                 prev = p;
846                 p = of_get_parent(p);
847         }
848         return NULL;
849 }
850 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
851
852 u8 pmac_i2c_get_dev_addr(struct device_node *device)
853 {
854         u32 *reg = (u32 *)get_property(device, "reg", NULL);
855
856         if (reg == NULL)
857                 return 0;
858
859         return (*reg) & 0xff;
860 }
861 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
862
863 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
864 {
865         return bus->controller;
866 }
867 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
868
869 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
870 {
871         return bus->busnode;
872 }
873 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
874
875 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
876 {
877         return bus->type;
878 }
879 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
880
881 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
882 {
883         return bus->flags;
884 }
885 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
886
887 void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
888                              struct i2c_adapter *adapter)
889 {
890         WARN_ON(bus->adapter != NULL);
891         bus->adapter = adapter;
892 }
893 EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter);
894
895 void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
896                              struct i2c_adapter *adapter)
897 {
898         WARN_ON(bus->adapter != adapter);
899         bus->adapter = NULL;
900 }
901 EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter);
902
903 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
904 {
905         return bus->adapter;
906 }
907 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
908
909 extern int pmac_i2c_match_adapter(struct device_node *dev,
910                                   struct i2c_adapter *adapter)
911 {
912         struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
913
914         if (bus == NULL)
915                 return 0;
916         return (bus->adapter == adapter);
917 }
918 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
919
920 int pmac_low_i2c_lock(struct device_node *np)
921 {
922         struct pmac_i2c_bus *bus, *found = NULL;
923
924         list_for_each_entry(bus, &pmac_i2c_busses, link) {
925                 if (np == bus->controller) {
926                         found = bus;
927                         break;
928                 }
929         }
930         if (!found)
931                 return -ENODEV;
932         return pmac_i2c_open(bus, 0);
933 }
934 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
935
936 int pmac_low_i2c_unlock(struct device_node *np)
937 {
938         struct pmac_i2c_bus *bus, *found = NULL;
939
940         list_for_each_entry(bus, &pmac_i2c_busses, link) {
941                 if (np == bus->controller) {
942                         found = bus;
943                         break;
944                 }
945         }
946         if (!found)
947                 return -ENODEV;
948         pmac_i2c_close(bus);
949         return 0;
950 }
951 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
952
953
954 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
955 {
956         int rc;
957
958         down(&bus->sem);
959         bus->polled = polled;
960         bus->opened = 1;
961         bus->mode = pmac_i2c_mode_std;
962         if (bus->open && (rc = bus->open(bus)) != 0) {
963                 bus->opened = 0;
964                 up(&bus->sem);
965                 return rc;
966         }
967         return 0;
968 }
969 EXPORT_SYMBOL_GPL(pmac_i2c_open);
970
971 void pmac_i2c_close(struct pmac_i2c_bus *bus)
972 {
973         WARN_ON(!bus->opened);
974         if (bus->close)
975                 bus->close(bus);
976         bus->opened = 0;
977         up(&bus->sem);
978 }
979 EXPORT_SYMBOL_GPL(pmac_i2c_close);
980
981 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
982 {
983         WARN_ON(!bus->opened);
984
985         /* Report me if you see the error below as there might be a new
986          * "combined4" mode that I need to implement for the SMU bus
987          */
988         if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
989                 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
990                        " bus %s !\n", mode, bus->busnode->full_name);
991                 return -EINVAL;
992         }
993         bus->mode = mode;
994
995         return 0;
996 }
997 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
998
999 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1000                   u32 subaddr, u8 *data, int len)
1001 {
1002         int rc;
1003
1004         WARN_ON(!bus->opened);
1005
1006         DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1007             " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1008             subaddr, len, bus->busnode->full_name);
1009
1010         rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1011
1012 #ifdef DEBUG
1013         if (rc)
1014                 DBG("xfer error %d\n", rc);
1015 #endif
1016         return rc;
1017 }
1018 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1019
1020 /*
1021  * Initialize us: probe all i2c busses on the machine and instantiate
1022  * busses.
1023  */
1024 /* This is non-static as it might be called early by smp code */
1025 int __init pmac_i2c_init(void)
1026 {
1027         static int i2c_inited;
1028
1029         if (i2c_inited)
1030                 return 0;
1031         i2c_inited = 1;
1032
1033         /* Probe keywest-i2c busses */
1034         kw_i2c_probe();
1035
1036 #ifdef CONFIG_ADB_PMU
1037         pmu_i2c_probe();
1038 #endif
1039
1040 #ifdef CONFIG_PMAC_SMU
1041         smu_i2c_probe();
1042 #endif
1043
1044         return 0;
1045 }
1046 arch_initcall(pmac_i2c_init);
1047