[PATCH] 1/5 powerpc: Rework PowerMac i2c part 1
[linux-2.6.git] / arch / powerpc / platforms / powermac / feature.c
1 /*
2  *  arch/ppc/platforms/pmac_feature.c
3  *
4  *  Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
5  *                          Ben. Herrenschmidt (benh@kernel.crashing.org)
6  *
7  *  This program is free software; you can redistribute it and/or
8  *  modify it under the terms of the GNU General Public License
9  *  as published by the Free Software Foundation; either version
10  *  2 of the License, or (at your option) any later version.
11  *
12  *  TODO:
13  *
14  *   - Replace mdelay with some schedule loop if possible
15  *   - Shorten some obfuscated delays on some routines (like modem
16  *     power)
17  *   - Refcount some clocks (see darwin)
18  *   - Split split split...
19  *
20  */
21 #include <linux/config.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/spinlock.h>
28 #include <linux/adb.h>
29 #include <linux/pmu.h>
30 #include <linux/ioport.h>
31 #include <linux/pci.h>
32 #include <asm/sections.h>
33 #include <asm/errno.h>
34 #include <asm/ohare.h>
35 #include <asm/heathrow.h>
36 #include <asm/keylargo.h>
37 #include <asm/uninorth.h>
38 #include <asm/io.h>
39 #include <asm/prom.h>
40 #include <asm/machdep.h>
41 #include <asm/pmac_feature.h>
42 #include <asm/dbdma.h>
43 #include <asm/pci-bridge.h>
44 #include <asm/pmac_low_i2c.h>
45
46 #undef DEBUG_FEATURE
47
48 #ifdef DEBUG_FEATURE
49 #define DBG(fmt...) printk(KERN_DEBUG fmt)
50 #else
51 #define DBG(fmt...)
52 #endif
53
54 #ifdef CONFIG_6xx
55 extern int powersave_lowspeed;
56 #endif
57
58 extern int powersave_nap;
59 extern struct device_node *k2_skiplist[2];
60
61
62 /*
63  * We use a single global lock to protect accesses. Each driver has
64  * to take care of its own locking
65  */
66 static DEFINE_SPINLOCK(feature_lock);
67
68 #define LOCK(flags)     spin_lock_irqsave(&feature_lock, flags);
69 #define UNLOCK(flags)   spin_unlock_irqrestore(&feature_lock, flags);
70
71
72 /*
73  * Instance of some macio stuffs
74  */
75 struct macio_chip macio_chips[MAX_MACIO_CHIPS];
76
77 struct macio_chip *macio_find(struct device_node *child, int type)
78 {
79         while(child) {
80                 int     i;
81
82                 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
83                         if (child == macio_chips[i].of_node &&
84                             (!type || macio_chips[i].type == type))
85                                 return &macio_chips[i];
86                 child = child->parent;
87         }
88         return NULL;
89 }
90 EXPORT_SYMBOL_GPL(macio_find);
91
92 static const char *macio_names[] =
93 {
94         "Unknown",
95         "Grand Central",
96         "OHare",
97         "OHareII",
98         "Heathrow",
99         "Gatwick",
100         "Paddington",
101         "Keylargo",
102         "Pangea",
103         "Intrepid",
104         "K2",
105         "Shasta",
106 };
107
108
109
110 /*
111  * Uninorth reg. access. Note that Uni-N regs are big endian
112  */
113
114 #define UN_REG(r)       (uninorth_base + ((r) >> 2))
115 #define UN_IN(r)        (in_be32(UN_REG(r)))
116 #define UN_OUT(r,v)     (out_be32(UN_REG(r), (v)))
117 #define UN_BIS(r,v)     (UN_OUT((r), UN_IN(r) | (v)))
118 #define UN_BIC(r,v)     (UN_OUT((r), UN_IN(r) & ~(v)))
119
120 static struct device_node *uninorth_node;
121 static u32 __iomem *uninorth_base;
122 static u32 uninorth_rev;
123 static int uninorth_maj;
124 static void __iomem *u3_ht;
125
126 /*
127  * For each motherboard family, we have a table of functions pointers
128  * that handle the various features.
129  */
130
131 typedef long (*feature_call)(struct device_node *node, long param, long value);
132
133 struct feature_table_entry {
134         unsigned int    selector;
135         feature_call    function;
136 };
137
138 struct pmac_mb_def
139 {
140         const char*                     model_string;
141         const char*                     model_name;
142         int                             model_id;
143         struct feature_table_entry*     features;
144         unsigned long                   board_flags;
145 };
146 static struct pmac_mb_def pmac_mb;
147
148 /*
149  * Here are the chip specific feature functions
150  */
151
152 static inline int simple_feature_tweak(struct device_node *node, int type,
153                                        int reg, u32 mask, int value)
154 {
155         struct macio_chip*      macio;
156         unsigned long           flags;
157
158         macio = macio_find(node, type);
159         if (!macio)
160                 return -ENODEV;
161         LOCK(flags);
162         if (value)
163                 MACIO_BIS(reg, mask);
164         else
165                 MACIO_BIC(reg, mask);
166         (void)MACIO_IN32(reg);
167         UNLOCK(flags);
168
169         return 0;
170 }
171
172 #ifndef CONFIG_POWER4
173
174 static long ohare_htw_scc_enable(struct device_node *node, long param,
175                                  long value)
176 {
177         struct macio_chip*      macio;
178         unsigned long           chan_mask;
179         unsigned long           fcr;
180         unsigned long           flags;
181         int                     htw, trans;
182         unsigned long           rmask;
183
184         macio = macio_find(node, 0);
185         if (!macio)
186                 return -ENODEV;
187         if (!strcmp(node->name, "ch-a"))
188                 chan_mask = MACIO_FLAG_SCCA_ON;
189         else if (!strcmp(node->name, "ch-b"))
190                 chan_mask = MACIO_FLAG_SCCB_ON;
191         else
192                 return -ENODEV;
193
194         htw = (macio->type == macio_heathrow || macio->type == macio_paddington
195                 || macio->type == macio_gatwick);
196         /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
197         trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
198                  pmac_mb.model_id != PMAC_TYPE_YIKES);
199         if (value) {
200 #ifdef CONFIG_ADB_PMU
201                 if ((param & 0xfff) == PMAC_SCC_IRDA)
202                         pmu_enable_irled(1);
203 #endif /* CONFIG_ADB_PMU */
204                 LOCK(flags);
205                 fcr = MACIO_IN32(OHARE_FCR);
206                 /* Check if scc cell need enabling */
207                 if (!(fcr & OH_SCC_ENABLE)) {
208                         fcr |= OH_SCC_ENABLE;
209                         if (htw) {
210                                 /* Side effect: this will also power up the
211                                  * modem, but it's too messy to figure out on which
212                                  * ports this controls the tranceiver and on which
213                                  * it controls the modem
214                                  */
215                                 if (trans)
216                                         fcr &= ~HRW_SCC_TRANS_EN_N;
217                                 MACIO_OUT32(OHARE_FCR, fcr);
218                                 fcr |= (rmask = HRW_RESET_SCC);
219                                 MACIO_OUT32(OHARE_FCR, fcr);
220                         } else {
221                                 fcr |= (rmask = OH_SCC_RESET);
222                                 MACIO_OUT32(OHARE_FCR, fcr);
223                         }
224                         UNLOCK(flags);
225                         (void)MACIO_IN32(OHARE_FCR);
226                         mdelay(15);
227                         LOCK(flags);
228                         fcr &= ~rmask;
229                         MACIO_OUT32(OHARE_FCR, fcr);
230                 }
231                 if (chan_mask & MACIO_FLAG_SCCA_ON)
232                         fcr |= OH_SCCA_IO;
233                 if (chan_mask & MACIO_FLAG_SCCB_ON)
234                         fcr |= OH_SCCB_IO;
235                 MACIO_OUT32(OHARE_FCR, fcr);
236                 macio->flags |= chan_mask;
237                 UNLOCK(flags);
238                 if (param & PMAC_SCC_FLAG_XMON)
239                         macio->flags |= MACIO_FLAG_SCC_LOCKED;
240         } else {
241                 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
242                         return -EPERM;
243                 LOCK(flags);
244                 fcr = MACIO_IN32(OHARE_FCR);
245                 if (chan_mask & MACIO_FLAG_SCCA_ON)
246                         fcr &= ~OH_SCCA_IO;
247                 if (chan_mask & MACIO_FLAG_SCCB_ON)
248                         fcr &= ~OH_SCCB_IO;
249                 MACIO_OUT32(OHARE_FCR, fcr);
250                 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
251                         fcr &= ~OH_SCC_ENABLE;
252                         if (htw && trans)
253                                 fcr |= HRW_SCC_TRANS_EN_N;
254                         MACIO_OUT32(OHARE_FCR, fcr);
255                 }
256                 macio->flags &= ~(chan_mask);
257                 UNLOCK(flags);
258                 mdelay(10);
259 #ifdef CONFIG_ADB_PMU
260                 if ((param & 0xfff) == PMAC_SCC_IRDA)
261                         pmu_enable_irled(0);
262 #endif /* CONFIG_ADB_PMU */
263         }
264         return 0;
265 }
266
267 static long ohare_floppy_enable(struct device_node *node, long param,
268                                 long value)
269 {
270         return simple_feature_tweak(node, macio_ohare,
271                 OHARE_FCR, OH_FLOPPY_ENABLE, value);
272 }
273
274 static long ohare_mesh_enable(struct device_node *node, long param, long value)
275 {
276         return simple_feature_tweak(node, macio_ohare,
277                 OHARE_FCR, OH_MESH_ENABLE, value);
278 }
279
280 static long ohare_ide_enable(struct device_node *node, long param, long value)
281 {
282         switch(param) {
283         case 0:
284                 /* For some reason, setting the bit in set_initial_features()
285                  * doesn't stick. I'm still investigating... --BenH.
286                  */
287                 if (value)
288                         simple_feature_tweak(node, macio_ohare,
289                                 OHARE_FCR, OH_IOBUS_ENABLE, 1);
290                 return simple_feature_tweak(node, macio_ohare,
291                         OHARE_FCR, OH_IDE0_ENABLE, value);
292         case 1:
293                 return simple_feature_tweak(node, macio_ohare,
294                         OHARE_FCR, OH_BAY_IDE_ENABLE, value);
295         default:
296                 return -ENODEV;
297         }
298 }
299
300 static long ohare_ide_reset(struct device_node *node, long param, long value)
301 {
302         switch(param) {
303         case 0:
304                 return simple_feature_tweak(node, macio_ohare,
305                         OHARE_FCR, OH_IDE0_RESET_N, !value);
306         case 1:
307                 return simple_feature_tweak(node, macio_ohare,
308                         OHARE_FCR, OH_IDE1_RESET_N, !value);
309         default:
310                 return -ENODEV;
311         }
312 }
313
314 static long ohare_sleep_state(struct device_node *node, long param, long value)
315 {
316         struct macio_chip*      macio = &macio_chips[0];
317
318         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
319                 return -EPERM;
320         if (value == 1) {
321                 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
322         } else if (value == 0) {
323                 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
324         }
325
326         return 0;
327 }
328
329 static long heathrow_modem_enable(struct device_node *node, long param,
330                                   long value)
331 {
332         struct macio_chip*      macio;
333         u8                      gpio;
334         unsigned long           flags;
335
336         macio = macio_find(node, macio_unknown);
337         if (!macio)
338                 return -ENODEV;
339         gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
340         if (!value) {
341                 LOCK(flags);
342                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
343                 UNLOCK(flags);
344                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
345                 mdelay(250);
346         }
347         if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
348             pmac_mb.model_id != PMAC_TYPE_YIKES) {
349                 LOCK(flags);
350                 if (value)
351                         MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
352                 else
353                         MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
354                 UNLOCK(flags);
355                 (void)MACIO_IN32(HEATHROW_FCR);
356                 mdelay(250);
357         }
358         if (value) {
359                 LOCK(flags);
360                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
361                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
362                 UNLOCK(flags); mdelay(250); LOCK(flags);
363                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
364                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
365                 UNLOCK(flags); mdelay(250); LOCK(flags);
366                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
367                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
368                 UNLOCK(flags); mdelay(250);
369         }
370         return 0;
371 }
372
373 static long heathrow_floppy_enable(struct device_node *node, long param,
374                                    long value)
375 {
376         return simple_feature_tweak(node, macio_unknown,
377                 HEATHROW_FCR,
378                 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
379                 value);
380 }
381
382 static long heathrow_mesh_enable(struct device_node *node, long param,
383                                  long value)
384 {
385         struct macio_chip*      macio;
386         unsigned long           flags;
387
388         macio = macio_find(node, macio_unknown);
389         if (!macio)
390                 return -ENODEV;
391         LOCK(flags);
392         /* Set clear mesh cell enable */
393         if (value)
394                 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
395         else
396                 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
397         (void)MACIO_IN32(HEATHROW_FCR);
398         udelay(10);
399         /* Set/Clear termination power */
400         if (value)
401                 MACIO_BIC(HEATHROW_MBCR, 0x04000000);
402         else
403                 MACIO_BIS(HEATHROW_MBCR, 0x04000000);
404         (void)MACIO_IN32(HEATHROW_MBCR);
405         udelay(10);
406         UNLOCK(flags);
407
408         return 0;
409 }
410
411 static long heathrow_ide_enable(struct device_node *node, long param,
412                                 long value)
413 {
414         switch(param) {
415         case 0:
416                 return simple_feature_tweak(node, macio_unknown,
417                         HEATHROW_FCR, HRW_IDE0_ENABLE, value);
418         case 1:
419                 return simple_feature_tweak(node, macio_unknown,
420                         HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
421         default:
422                 return -ENODEV;
423         }
424 }
425
426 static long heathrow_ide_reset(struct device_node *node, long param,
427                                long value)
428 {
429         switch(param) {
430         case 0:
431                 return simple_feature_tweak(node, macio_unknown,
432                         HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
433         case 1:
434                 return simple_feature_tweak(node, macio_unknown,
435                         HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
436         default:
437                 return -ENODEV;
438         }
439 }
440
441 static long heathrow_bmac_enable(struct device_node *node, long param,
442                                  long value)
443 {
444         struct macio_chip*      macio;
445         unsigned long           flags;
446
447         macio = macio_find(node, 0);
448         if (!macio)
449                 return -ENODEV;
450         if (value) {
451                 LOCK(flags);
452                 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
453                 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
454                 UNLOCK(flags);
455                 (void)MACIO_IN32(HEATHROW_FCR);
456                 mdelay(10);
457                 LOCK(flags);
458                 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
459                 UNLOCK(flags);
460                 (void)MACIO_IN32(HEATHROW_FCR);
461                 mdelay(10);
462         } else {
463                 LOCK(flags);
464                 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
465                 UNLOCK(flags);
466         }
467         return 0;
468 }
469
470 static long heathrow_sound_enable(struct device_node *node, long param,
471                                   long value)
472 {
473         struct macio_chip*      macio;
474         unsigned long           flags;
475
476         /* B&W G3 and Yikes don't support that properly (the
477          * sound appear to never come back after beeing shut down).
478          */
479         if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
480             pmac_mb.model_id == PMAC_TYPE_YIKES)
481                 return 0;
482
483         macio = macio_find(node, 0);
484         if (!macio)
485                 return -ENODEV;
486         if (value) {
487                 LOCK(flags);
488                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
489                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
490                 UNLOCK(flags);
491                 (void)MACIO_IN32(HEATHROW_FCR);
492         } else {
493                 LOCK(flags);
494                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
495                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
496                 UNLOCK(flags);
497         }
498         return 0;
499 }
500
501 static u32 save_fcr[6];
502 static u32 save_mbcr;
503 static u32 save_gpio_levels[2];
504 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
505 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
506 static u32 save_unin_clock_ctl;
507 static struct dbdma_regs save_dbdma[13];
508 static struct dbdma_regs save_alt_dbdma[13];
509
510 static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save)
511 {
512         int i;
513
514         /* Save state & config of DBDMA channels */
515         for (i = 0; i < 13; i++) {
516                 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
517                         (macio->base + ((0x8000+i*0x100)>>2));
518                 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
519                 save[i].cmdptr = in_le32(&chan->cmdptr);
520                 save[i].intr_sel = in_le32(&chan->intr_sel);
521                 save[i].br_sel = in_le32(&chan->br_sel);
522                 save[i].wait_sel = in_le32(&chan->wait_sel);
523         }
524 }
525
526 static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save)
527 {
528         int i;
529
530         /* Save state & config of DBDMA channels */
531         for (i = 0; i < 13; i++) {
532                 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
533                         (macio->base + ((0x8000+i*0x100)>>2));
534                 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
535                 while (in_le32(&chan->status) & ACTIVE)
536                         mb();
537                 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
538                 out_le32(&chan->cmdptr, save[i].cmdptr);
539                 out_le32(&chan->intr_sel, save[i].intr_sel);
540                 out_le32(&chan->br_sel, save[i].br_sel);
541                 out_le32(&chan->wait_sel, save[i].wait_sel);
542         }
543 }
544
545 static void heathrow_sleep(struct macio_chip *macio, int secondary)
546 {
547         if (secondary) {
548                 dbdma_save(macio, save_alt_dbdma);
549                 save_fcr[2] = MACIO_IN32(0x38);
550                 save_fcr[3] = MACIO_IN32(0x3c);
551         } else {
552                 dbdma_save(macio, save_dbdma);
553                 save_fcr[0] = MACIO_IN32(0x38);
554                 save_fcr[1] = MACIO_IN32(0x3c);
555                 save_mbcr = MACIO_IN32(0x34);
556                 /* Make sure sound is shut down */
557                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
558                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
559                 /* This seems to be necessary as well or the fan
560                  * keeps coming up and battery drains fast */
561                 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
562                 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
563                 /* Make sure eth is down even if module or sleep
564                  * won't work properly */
565                 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
566         }
567         /* Make sure modem is shut down */
568         MACIO_OUT8(HRW_GPIO_MODEM_RESET,
569                 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
570         MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
571         MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
572
573         /* Let things settle */
574         (void)MACIO_IN32(HEATHROW_FCR);
575 }
576
577 static void heathrow_wakeup(struct macio_chip *macio, int secondary)
578 {
579         if (secondary) {
580                 MACIO_OUT32(0x38, save_fcr[2]);
581                 (void)MACIO_IN32(0x38);
582                 mdelay(1);
583                 MACIO_OUT32(0x3c, save_fcr[3]);
584                 (void)MACIO_IN32(0x38);
585                 mdelay(10);
586                 dbdma_restore(macio, save_alt_dbdma);
587         } else {
588                 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
589                 (void)MACIO_IN32(0x38);
590                 mdelay(1);
591                 MACIO_OUT32(0x3c, save_fcr[1]);
592                 (void)MACIO_IN32(0x38);
593                 mdelay(1);
594                 MACIO_OUT32(0x34, save_mbcr);
595                 (void)MACIO_IN32(0x38);
596                 mdelay(10);
597                 dbdma_restore(macio, save_dbdma);
598         }
599 }
600
601 static long heathrow_sleep_state(struct device_node *node, long param,
602                                  long value)
603 {
604         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
605                 return -EPERM;
606         if (value == 1) {
607                 if (macio_chips[1].type == macio_gatwick)
608                         heathrow_sleep(&macio_chips[0], 1);
609                 heathrow_sleep(&macio_chips[0], 0);
610         } else if (value == 0) {
611                 heathrow_wakeup(&macio_chips[0], 0);
612                 if (macio_chips[1].type == macio_gatwick)
613                         heathrow_wakeup(&macio_chips[0], 1);
614         }
615         return 0;
616 }
617
618 static long core99_scc_enable(struct device_node *node, long param, long value)
619 {
620         struct macio_chip*      macio;
621         unsigned long           flags;
622         unsigned long           chan_mask;
623         u32                     fcr;
624
625         macio = macio_find(node, 0);
626         if (!macio)
627                 return -ENODEV;
628         if (!strcmp(node->name, "ch-a"))
629                 chan_mask = MACIO_FLAG_SCCA_ON;
630         else if (!strcmp(node->name, "ch-b"))
631                 chan_mask = MACIO_FLAG_SCCB_ON;
632         else
633                 return -ENODEV;
634
635         if (value) {
636                 int need_reset_scc = 0;
637                 int need_reset_irda = 0;
638
639                 LOCK(flags);
640                 fcr = MACIO_IN32(KEYLARGO_FCR0);
641                 /* Check if scc cell need enabling */
642                 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
643                         fcr |= KL0_SCC_CELL_ENABLE;
644                         need_reset_scc = 1;
645                 }
646                 if (chan_mask & MACIO_FLAG_SCCA_ON) {
647                         fcr |= KL0_SCCA_ENABLE;
648                         /* Don't enable line drivers for I2S modem */
649                         if ((param & 0xfff) == PMAC_SCC_I2S1)
650                                 fcr &= ~KL0_SCC_A_INTF_ENABLE;
651                         else
652                                 fcr |= KL0_SCC_A_INTF_ENABLE;
653                 }
654                 if (chan_mask & MACIO_FLAG_SCCB_ON) {
655                         fcr |= KL0_SCCB_ENABLE;
656                         /* Perform irda specific inits */
657                         if ((param & 0xfff) == PMAC_SCC_IRDA) {
658                                 fcr &= ~KL0_SCC_B_INTF_ENABLE;
659                                 fcr |= KL0_IRDA_ENABLE;
660                                 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
661                                 fcr |= KL0_IRDA_SOURCE1_SEL;
662                                 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
663                                 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
664                                 need_reset_irda = 1;
665                         } else
666                                 fcr |= KL0_SCC_B_INTF_ENABLE;
667                 }
668                 MACIO_OUT32(KEYLARGO_FCR0, fcr);
669                 macio->flags |= chan_mask;
670                 if (need_reset_scc)  {
671                         MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
672                         (void)MACIO_IN32(KEYLARGO_FCR0);
673                         UNLOCK(flags);
674                         mdelay(15);
675                         LOCK(flags);
676                         MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
677                 }
678                 if (need_reset_irda)  {
679                         MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
680                         (void)MACIO_IN32(KEYLARGO_FCR0);
681                         UNLOCK(flags);
682                         mdelay(15);
683                         LOCK(flags);
684                         MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
685                 }
686                 UNLOCK(flags);
687                 if (param & PMAC_SCC_FLAG_XMON)
688                         macio->flags |= MACIO_FLAG_SCC_LOCKED;
689         } else {
690                 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
691                         return -EPERM;
692                 LOCK(flags);
693                 fcr = MACIO_IN32(KEYLARGO_FCR0);
694                 if (chan_mask & MACIO_FLAG_SCCA_ON)
695                         fcr &= ~KL0_SCCA_ENABLE;
696                 if (chan_mask & MACIO_FLAG_SCCB_ON) {
697                         fcr &= ~KL0_SCCB_ENABLE;
698                         /* Perform irda specific clears */
699                         if ((param & 0xfff) == PMAC_SCC_IRDA) {
700                                 fcr &= ~KL0_IRDA_ENABLE;
701                                 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
702                                 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
703                                 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
704                         }
705                 }
706                 MACIO_OUT32(KEYLARGO_FCR0, fcr);
707                 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
708                         fcr &= ~KL0_SCC_CELL_ENABLE;
709                         MACIO_OUT32(KEYLARGO_FCR0, fcr);
710                 }
711                 macio->flags &= ~(chan_mask);
712                 UNLOCK(flags);
713                 mdelay(10);
714         }
715         return 0;
716 }
717
718 static long
719 core99_modem_enable(struct device_node *node, long param, long value)
720 {
721         struct macio_chip*      macio;
722         u8                      gpio;
723         unsigned long           flags;
724
725         /* Hack for internal USB modem */
726         if (node == NULL) {
727                 if (macio_chips[0].type != macio_keylargo)
728                         return -ENODEV;
729                 node = macio_chips[0].of_node;
730         }
731         macio = macio_find(node, 0);
732         if (!macio)
733                 return -ENODEV;
734         gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
735         gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
736         gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
737
738         if (!value) {
739                 LOCK(flags);
740                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
741                 UNLOCK(flags);
742                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
743                 mdelay(250);
744         }
745         LOCK(flags);
746         if (value) {
747                 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
748                 UNLOCK(flags);
749                 (void)MACIO_IN32(KEYLARGO_FCR2);
750                 mdelay(250);
751         } else {
752                 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
753                 UNLOCK(flags);
754         }
755         if (value) {
756                 LOCK(flags);
757                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
758                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
759                 UNLOCK(flags); mdelay(250); LOCK(flags);
760                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
761                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
762                 UNLOCK(flags); mdelay(250); LOCK(flags);
763                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
764                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
765                 UNLOCK(flags); mdelay(250);
766         }
767         return 0;
768 }
769
770 static long
771 pangea_modem_enable(struct device_node *node, long param, long value)
772 {
773         struct macio_chip*      macio;
774         u8                      gpio;
775         unsigned long           flags;
776
777         /* Hack for internal USB modem */
778         if (node == NULL) {
779                 if (macio_chips[0].type != macio_pangea &&
780                     macio_chips[0].type != macio_intrepid)
781                         return -ENODEV;
782                 node = macio_chips[0].of_node;
783         }
784         macio = macio_find(node, 0);
785         if (!macio)
786                 return -ENODEV;
787         gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
788         gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
789         gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
790
791         if (!value) {
792                 LOCK(flags);
793                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
794                 UNLOCK(flags);
795                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
796                 mdelay(250);
797         }
798         LOCK(flags);
799         if (value) {
800                 MACIO_OUT8(KL_GPIO_MODEM_POWER,
801                         KEYLARGO_GPIO_OUTPUT_ENABLE);
802                 UNLOCK(flags);
803                 (void)MACIO_IN32(KEYLARGO_FCR2);
804                 mdelay(250);
805         } else {
806                 MACIO_OUT8(KL_GPIO_MODEM_POWER,
807                         KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
808                 UNLOCK(flags);
809         }
810         if (value) {
811                 LOCK(flags);
812                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
813                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
814                 UNLOCK(flags); mdelay(250); LOCK(flags);
815                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
816                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
817                 UNLOCK(flags); mdelay(250); LOCK(flags);
818                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
819                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
820                 UNLOCK(flags); mdelay(250);
821         }
822         return 0;
823 }
824
825 static long
826 core99_ata100_enable(struct device_node *node, long value)
827 {
828         unsigned long flags;
829         struct pci_dev *pdev = NULL;
830         u8 pbus, pid;
831
832         if (uninorth_rev < 0x24)
833                 return -ENODEV;
834
835         LOCK(flags);
836         if (value)
837                 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
838         else
839                 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
840         (void)UN_IN(UNI_N_CLOCK_CNTL);
841         UNLOCK(flags);
842         udelay(20);
843
844         if (value) {
845                 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
846                         pdev = pci_find_slot(pbus, pid);
847                 if (pdev == NULL)
848                         return 0;
849                 pci_enable_device(pdev);
850                 pci_set_master(pdev);
851         }
852         return 0;
853 }
854
855 static long
856 core99_ide_enable(struct device_node *node, long param, long value)
857 {
858         /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
859          * based ata-100
860          */
861         switch(param) {
862             case 0:
863                 return simple_feature_tweak(node, macio_unknown,
864                         KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
865             case 1:
866                 return simple_feature_tweak(node, macio_unknown,
867                         KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
868             case 2:
869                 return simple_feature_tweak(node, macio_unknown,
870                         KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
871             case 3:
872                 return core99_ata100_enable(node, value);
873             default:
874                 return -ENODEV;
875         }
876 }
877
878 static long
879 core99_ide_reset(struct device_node *node, long param, long value)
880 {
881         switch(param) {
882             case 0:
883                 return simple_feature_tweak(node, macio_unknown,
884                         KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
885             case 1:
886                 return simple_feature_tweak(node, macio_unknown,
887                         KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
888             case 2:
889                 return simple_feature_tweak(node, macio_unknown,
890                         KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
891             default:
892                 return -ENODEV;
893         }
894 }
895
896 static long
897 core99_gmac_enable(struct device_node *node, long param, long value)
898 {
899         unsigned long flags;
900
901         LOCK(flags);
902         if (value)
903                 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
904         else
905                 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
906         (void)UN_IN(UNI_N_CLOCK_CNTL);
907         UNLOCK(flags);
908         udelay(20);
909
910         return 0;
911 }
912
913 static long
914 core99_gmac_phy_reset(struct device_node *node, long param, long value)
915 {
916         unsigned long flags;
917         struct macio_chip *macio;
918
919         macio = &macio_chips[0];
920         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
921             macio->type != macio_intrepid)
922                 return -ENODEV;
923
924         LOCK(flags);
925         MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
926         (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
927         UNLOCK(flags);
928         mdelay(10);
929         LOCK(flags);
930         MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
931                 KEYLARGO_GPIO_OUTOUT_DATA);
932         UNLOCK(flags);
933         mdelay(10);
934
935         return 0;
936 }
937
938 static long
939 core99_sound_chip_enable(struct device_node *node, long param, long value)
940 {
941         struct macio_chip*      macio;
942         unsigned long           flags;
943
944         macio = macio_find(node, 0);
945         if (!macio)
946                 return -ENODEV;
947
948         /* Do a better probe code, screamer G4 desktops &
949          * iMacs can do that too, add a recalibrate  in
950          * the driver as well
951          */
952         if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
953             pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
954                 LOCK(flags);
955                 if (value)
956                         MACIO_OUT8(KL_GPIO_SOUND_POWER,
957                                 KEYLARGO_GPIO_OUTPUT_ENABLE |
958                                 KEYLARGO_GPIO_OUTOUT_DATA);
959                 else
960                         MACIO_OUT8(KL_GPIO_SOUND_POWER,
961                                 KEYLARGO_GPIO_OUTPUT_ENABLE);
962                 (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
963                 UNLOCK(flags);
964         }
965         return 0;
966 }
967
968 static long
969 core99_airport_enable(struct device_node *node, long param, long value)
970 {
971         struct macio_chip*      macio;
972         unsigned long           flags;
973         int                     state;
974
975         macio = macio_find(node, 0);
976         if (!macio)
977                 return -ENODEV;
978
979         /* Hint: we allow passing of macio itself for the sake of the
980          * sleep code
981          */
982         if (node != macio->of_node &&
983             (!node->parent || node->parent != macio->of_node))
984                 return -ENODEV;
985         state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
986         if (value == state)
987                 return 0;
988         if (value) {
989                 /* This code is a reproduction of OF enable-cardslot
990                  * and init-wireless methods, slightly hacked until
991                  * I got it working.
992                  */
993                 LOCK(flags);
994                 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
995                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
996                 UNLOCK(flags);
997                 mdelay(10);
998                 LOCK(flags);
999                 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
1000                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
1001                 UNLOCK(flags);
1002
1003                 mdelay(10);
1004
1005                 LOCK(flags);
1006                 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1007                 (void)MACIO_IN32(KEYLARGO_FCR2);
1008                 udelay(10);
1009                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
1010                 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
1011                 udelay(10);
1012                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
1013                 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
1014                 udelay(10);
1015                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
1016                 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
1017                 udelay(10);
1018                 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
1019                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
1020                 udelay(10);
1021                 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
1022                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
1023                 UNLOCK(flags);
1024                 udelay(10);
1025                 MACIO_OUT32(0x1c000, 0);
1026                 mdelay(1);
1027                 MACIO_OUT8(0x1a3e0, 0x41);
1028                 (void)MACIO_IN8(0x1a3e0);
1029                 udelay(10);
1030                 LOCK(flags);
1031                 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
1032                 (void)MACIO_IN32(KEYLARGO_FCR2);
1033                 UNLOCK(flags);
1034                 mdelay(100);
1035
1036                 macio->flags |= MACIO_FLAG_AIRPORT_ON;
1037         } else {
1038                 LOCK(flags);
1039                 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1040                 (void)MACIO_IN32(KEYLARGO_FCR2);
1041                 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
1042                 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
1043                 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
1044                 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
1045                 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
1046                 (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
1047                 UNLOCK(flags);
1048
1049                 macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
1050         }
1051         return 0;
1052 }
1053
1054 #ifdef CONFIG_SMP
1055 static long
1056 core99_reset_cpu(struct device_node *node, long param, long value)
1057 {
1058         unsigned int reset_io = 0;
1059         unsigned long flags;
1060         struct macio_chip *macio;
1061         struct device_node *np;
1062         const int dflt_reset_lines[] = {        KL_GPIO_RESET_CPU0,
1063                                                 KL_GPIO_RESET_CPU1,
1064                                                 KL_GPIO_RESET_CPU2,
1065                                                 KL_GPIO_RESET_CPU3 };
1066
1067         macio = &macio_chips[0];
1068         if (macio->type != macio_keylargo)
1069                 return -ENODEV;
1070
1071         np = find_path_device("/cpus");
1072         if (np == NULL)
1073                 return -ENODEV;
1074         for (np = np->child; np != NULL; np = np->sibling) {
1075                 u32 *num = (u32 *)get_property(np, "reg", NULL);
1076                 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL);
1077                 if (num == NULL || rst == NULL)
1078                         continue;
1079                 if (param == *num) {
1080                         reset_io = *rst;
1081                         break;
1082                 }
1083         }
1084         if (np == NULL || reset_io == 0)
1085                 reset_io = dflt_reset_lines[param];
1086
1087         LOCK(flags);
1088         MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1089         (void)MACIO_IN8(reset_io);
1090         udelay(1);
1091         MACIO_OUT8(reset_io, 0);
1092         (void)MACIO_IN8(reset_io);
1093         UNLOCK(flags);
1094
1095         return 0;
1096 }
1097 #endif /* CONFIG_SMP */
1098
1099 static long
1100 core99_usb_enable(struct device_node *node, long param, long value)
1101 {
1102         struct macio_chip *macio;
1103         unsigned long flags;
1104         char *prop;
1105         int number;
1106         u32 reg;
1107
1108         macio = &macio_chips[0];
1109         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1110             macio->type != macio_intrepid)
1111                 return -ENODEV;
1112
1113         prop = (char *)get_property(node, "AAPL,clock-id", NULL);
1114         if (!prop)
1115                 return -ENODEV;
1116         if (strncmp(prop, "usb0u048", 8) == 0)
1117                 number = 0;
1118         else if (strncmp(prop, "usb1u148", 8) == 0)
1119                 number = 2;
1120         else if (strncmp(prop, "usb2u248", 8) == 0)
1121                 number = 4;
1122         else
1123                 return -ENODEV;
1124
1125         /* Sorry for the brute-force locking, but this is only used during
1126          * sleep and the timing seem to be critical
1127          */
1128         LOCK(flags);
1129         if (value) {
1130                 /* Turn ON */
1131                 if (number == 0) {
1132                         MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1133                         (void)MACIO_IN32(KEYLARGO_FCR0);
1134                         UNLOCK(flags);
1135                         mdelay(1);
1136                         LOCK(flags);
1137                         MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1138                 } else if (number == 2) {
1139                         MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1140                         UNLOCK(flags);
1141                         (void)MACIO_IN32(KEYLARGO_FCR0);
1142                         mdelay(1);
1143                         LOCK(flags);
1144                         MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1145                 } else if (number == 4) {
1146                         MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1147                         UNLOCK(flags);
1148                         (void)MACIO_IN32(KEYLARGO_FCR1);
1149                         mdelay(1);
1150                         LOCK(flags);
1151                         MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
1152                 }
1153                 if (number < 4) {
1154                         reg = MACIO_IN32(KEYLARGO_FCR4);
1155                         reg &=  ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1156                                 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
1157                         reg &=  ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1158                                 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
1159                         MACIO_OUT32(KEYLARGO_FCR4, reg);
1160                         (void)MACIO_IN32(KEYLARGO_FCR4);
1161                         udelay(10);
1162                 } else {
1163                         reg = MACIO_IN32(KEYLARGO_FCR3);
1164                         reg &=  ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1165                                 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
1166                         reg &=  ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1167                                 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
1168                         MACIO_OUT32(KEYLARGO_FCR3, reg);
1169                         (void)MACIO_IN32(KEYLARGO_FCR3);
1170                         udelay(10);
1171                 }
1172                 if (macio->type == macio_intrepid) {
1173                         /* wait for clock stopped bits to clear */
1174                         u32 test0 = 0, test1 = 0;
1175                         u32 status0, status1;
1176                         int timeout = 1000;
1177
1178                         UNLOCK(flags);
1179                         switch (number) {
1180                         case 0:
1181                                 test0 = UNI_N_CLOCK_STOPPED_USB0;
1182                                 test1 = UNI_N_CLOCK_STOPPED_USB0PCI;
1183                                 break;
1184                         case 2:
1185                                 test0 = UNI_N_CLOCK_STOPPED_USB1;
1186                                 test1 = UNI_N_CLOCK_STOPPED_USB1PCI;
1187                                 break;
1188                         case 4:
1189                                 test0 = UNI_N_CLOCK_STOPPED_USB2;
1190                                 test1 = UNI_N_CLOCK_STOPPED_USB2PCI;
1191                                 break;
1192                         }
1193                         do {
1194                                 if (--timeout <= 0) {
1195                                         printk(KERN_ERR "core99_usb_enable: "
1196                                                "Timeout waiting for clocks\n");
1197                                         break;
1198                                 }
1199                                 mdelay(1);
1200                                 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0);
1201                                 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1);
1202                         } while ((status0 & test0) | (status1 & test1));
1203                         LOCK(flags);
1204                 }
1205         } else {
1206                 /* Turn OFF */
1207                 if (number < 4) {
1208                         reg = MACIO_IN32(KEYLARGO_FCR4);
1209                         reg |=  KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1210                                 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
1211                         reg |=  KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1212                                 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
1213                         MACIO_OUT32(KEYLARGO_FCR4, reg);
1214                         (void)MACIO_IN32(KEYLARGO_FCR4);
1215                         udelay(1);
1216                 } else {
1217                         reg = MACIO_IN32(KEYLARGO_FCR3);
1218                         reg |=  KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1219                                 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
1220                         reg |=  KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1221                                 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
1222                         MACIO_OUT32(KEYLARGO_FCR3, reg);
1223                         (void)MACIO_IN32(KEYLARGO_FCR3);
1224                         udelay(1);
1225                 }
1226                 if (number == 0) {
1227                         if (macio->type != macio_intrepid)
1228                                 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1229                         (void)MACIO_IN32(KEYLARGO_FCR0);
1230                         udelay(1);
1231                         MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1232                         (void)MACIO_IN32(KEYLARGO_FCR0);
1233                 } else if (number == 2) {
1234                         if (macio->type != macio_intrepid)
1235                                 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1236                         (void)MACIO_IN32(KEYLARGO_FCR0);
1237                         udelay(1);
1238                         MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1239                         (void)MACIO_IN32(KEYLARGO_FCR0);
1240                 } else if (number == 4) {
1241                         udelay(1);
1242                         MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1243                         (void)MACIO_IN32(KEYLARGO_FCR1);
1244                 }
1245                 udelay(1);
1246         }
1247         UNLOCK(flags);
1248
1249         return 0;
1250 }
1251
1252 static long
1253 core99_firewire_enable(struct device_node *node, long param, long value)
1254 {
1255         unsigned long flags;
1256         struct macio_chip *macio;
1257
1258         macio = &macio_chips[0];
1259         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1260             macio->type != macio_intrepid)
1261                 return -ENODEV;
1262         if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1263                 return -ENODEV;
1264
1265         LOCK(flags);
1266         if (value) {
1267                 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1268                 (void)UN_IN(UNI_N_CLOCK_CNTL);
1269         } else {
1270                 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1271                 (void)UN_IN(UNI_N_CLOCK_CNTL);
1272         }
1273         UNLOCK(flags);
1274         mdelay(1);
1275
1276         return 0;
1277 }
1278
1279 static long
1280 core99_firewire_cable_power(struct device_node *node, long param, long value)
1281 {
1282         unsigned long flags;
1283         struct macio_chip *macio;
1284
1285         /* Trick: we allow NULL node */
1286         if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
1287                 return -ENODEV;
1288         macio = &macio_chips[0];
1289         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1290             macio->type != macio_intrepid)
1291                 return -ENODEV;
1292         if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1293                 return -ENODEV;
1294
1295         LOCK(flags);
1296         if (value) {
1297                 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
1298                 MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
1299                 udelay(10);
1300         } else {
1301                 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
1302                 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
1303         }
1304         UNLOCK(flags);
1305         mdelay(1);
1306
1307         return 0;
1308 }
1309
1310 static long
1311 intrepid_aack_delay_enable(struct device_node *node, long param, long value)
1312 {
1313         unsigned long flags;
1314
1315         if (uninorth_rev < 0xd2)
1316                 return -ENODEV;
1317
1318         LOCK(flags);
1319         if (param)
1320                 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1321         else
1322                 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1323         UNLOCK(flags);
1324
1325         return 0;
1326 }
1327
1328
1329 #endif /* CONFIG_POWER4 */
1330
1331 static long
1332 core99_read_gpio(struct device_node *node, long param, long value)
1333 {
1334         struct macio_chip *macio = &macio_chips[0];
1335
1336         return MACIO_IN8(param);
1337 }
1338
1339
1340 static long
1341 core99_write_gpio(struct device_node *node, long param, long value)
1342 {
1343         struct macio_chip *macio = &macio_chips[0];
1344
1345         MACIO_OUT8(param, (u8)(value & 0xff));
1346         return 0;
1347 }
1348
1349 #ifdef CONFIG_POWER4
1350 static long g5_gmac_enable(struct device_node *node, long param, long value)
1351 {
1352         struct macio_chip *macio = &macio_chips[0];
1353         unsigned long flags;
1354
1355         if (node == NULL)
1356                 return -ENODEV;
1357
1358         LOCK(flags);
1359         if (value) {
1360                 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1361                 mb();
1362                 k2_skiplist[0] = NULL;
1363         } else {
1364                 k2_skiplist[0] = node;
1365                 mb();
1366                 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1367         }
1368         
1369         UNLOCK(flags);
1370         mdelay(1);
1371
1372         return 0;
1373 }
1374
1375 static long g5_fw_enable(struct device_node *node, long param, long value)
1376 {
1377         struct macio_chip *macio = &macio_chips[0];
1378         unsigned long flags;
1379
1380         if (node == NULL)
1381                 return -ENODEV;
1382
1383         LOCK(flags);
1384         if (value) {
1385                 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1386                 mb();
1387                 k2_skiplist[1] = NULL;
1388         } else {
1389                 k2_skiplist[1] = node;
1390                 mb();
1391                 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1392         }
1393         
1394         UNLOCK(flags);
1395         mdelay(1);
1396
1397         return 0;
1398 }
1399
1400 static long g5_mpic_enable(struct device_node *node, long param, long value)
1401 {
1402         unsigned long flags;
1403         struct device_node *parent = of_get_parent(node);
1404         int is_u3;
1405
1406         if (parent == NULL)
1407                 return 0;
1408         is_u3 = strcmp(parent->name, "u3") == 0 ||
1409                 strcmp(parent->name, "u4") == 0;
1410         of_node_put(parent);
1411         if (!is_u3)
1412                 return 0;
1413
1414         LOCK(flags);
1415         UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
1416         UNLOCK(flags);
1417
1418         return 0;
1419 }
1420
1421 static long g5_eth_phy_reset(struct device_node *node, long param, long value)
1422 {
1423         struct macio_chip *macio = &macio_chips[0];
1424         struct device_node *phy;
1425         int need_reset;
1426
1427         /*
1428          * We must not reset the combo PHYs, only the BCM5221 found in
1429          * the iMac G5.
1430          */
1431         phy = of_get_next_child(node, NULL);
1432         if (!phy)
1433                 return -ENODEV;
1434         need_reset = device_is_compatible(phy, "B5221");
1435         of_node_put(phy);
1436         if (!need_reset)
1437                 return 0;
1438
1439         /* PHY reset is GPIO 29, not in device-tree unfortunately */
1440         MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
1441                    KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
1442         /* Thankfully, this is now always called at a time when we can
1443          * schedule by sungem.
1444          */
1445         msleep(10);
1446         MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
1447
1448         return 0;
1449 }
1450
1451 static long g5_i2s_enable(struct device_node *node, long param, long value)
1452 {
1453         /* Very crude implementation for now */
1454         struct macio_chip *macio = &macio_chips[0];
1455         unsigned long flags;
1456         int cell;
1457         u32 fcrs[3][3] = {
1458                 { 0,
1459                   K2_FCR1_I2S0_CELL_ENABLE |
1460                   K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE,
1461                   KL3_I2S0_CLK18_ENABLE
1462                 },
1463                 { KL0_SCC_A_INTF_ENABLE,
1464                   K2_FCR1_I2S1_CELL_ENABLE |
1465                   K2_FCR1_I2S1_CLK_ENABLE_BIT | K2_FCR1_I2S1_ENABLE,
1466                   KL3_I2S1_CLK18_ENABLE
1467                 },
1468                 { KL0_SCC_B_INTF_ENABLE,
1469                   SH_FCR1_I2S2_CELL_ENABLE |
1470                   SH_FCR1_I2S2_CLK_ENABLE_BIT | SH_FCR1_I2S2_ENABLE,
1471                   SH_FCR3_I2S2_CLK18_ENABLE
1472                 },
1473         };
1474
1475         if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1476                 return -ENODEV;
1477         if (strncmp(node->name, "i2s-", 4))
1478                 return -ENODEV;
1479         cell = node->name[4] - 'a';
1480         switch(cell) {
1481         case 0:
1482         case 1:
1483                 break;
1484         case 2:
1485                 if (macio->type == macio_shasta)
1486                         break;
1487         default:
1488                 return -ENODEV;
1489         }
1490
1491         LOCK(flags);
1492         if (value) {
1493                 MACIO_BIC(KEYLARGO_FCR0, fcrs[cell][0]);
1494                 MACIO_BIS(KEYLARGO_FCR1, fcrs[cell][1]);
1495                 MACIO_BIS(KEYLARGO_FCR3, fcrs[cell][2]);
1496         } else {
1497                 MACIO_BIC(KEYLARGO_FCR3, fcrs[cell][2]);
1498                 MACIO_BIC(KEYLARGO_FCR1, fcrs[cell][1]);
1499                 MACIO_BIS(KEYLARGO_FCR0, fcrs[cell][0]);
1500         }
1501         udelay(10);
1502         UNLOCK(flags);
1503
1504         return 0;
1505 }
1506
1507
1508 #ifdef CONFIG_SMP
1509 static long g5_reset_cpu(struct device_node *node, long param, long value)
1510 {
1511         unsigned int reset_io = 0;
1512         unsigned long flags;
1513         struct macio_chip *macio;
1514         struct device_node *np;
1515
1516         macio = &macio_chips[0];
1517         if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1518                 return -ENODEV;
1519
1520         np = find_path_device("/cpus");
1521         if (np == NULL)
1522                 return -ENODEV;
1523         for (np = np->child; np != NULL; np = np->sibling) {
1524                 u32 *num = (u32 *)get_property(np, "reg", NULL);
1525                 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL);
1526                 if (num == NULL || rst == NULL)
1527                         continue;
1528                 if (param == *num) {
1529                         reset_io = *rst;
1530                         break;
1531                 }
1532         }
1533         if (np == NULL || reset_io == 0)
1534                 return -ENODEV;
1535
1536         LOCK(flags);
1537         MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1538         (void)MACIO_IN8(reset_io);
1539         udelay(1);
1540         MACIO_OUT8(reset_io, 0);
1541         (void)MACIO_IN8(reset_io);
1542         UNLOCK(flags);
1543
1544         return 0;
1545 }
1546 #endif /* CONFIG_SMP */
1547
1548 /*
1549  * This can be called from pmac_smp so isn't static
1550  *
1551  * This takes the second CPU off the bus on dual CPU machines
1552  * running UP
1553  */
1554 void g5_phy_disable_cpu1(void)
1555 {
1556         if (uninorth_maj == 3)
1557                 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1558 }
1559 #endif /* CONFIG_POWER4 */
1560
1561 #ifndef CONFIG_POWER4
1562
1563 static void
1564 keylargo_shutdown(struct macio_chip *macio, int sleep_mode)
1565 {
1566         u32 temp;
1567
1568         if (sleep_mode) {
1569                 mdelay(1);
1570                 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
1571                 (void)MACIO_IN32(KEYLARGO_FCR0);
1572                 mdelay(1);
1573         }
1574
1575         MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1576                                 KL0_SCC_CELL_ENABLE |
1577                                 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
1578                                 KL0_IRDA_CLK19_ENABLE);
1579
1580         MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
1581         MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
1582
1583         MACIO_BIC(KEYLARGO_FCR1,
1584                 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1585                 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1586                 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1587                 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1588                 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1589                 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
1590                 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
1591                 KL1_UIDE_ENABLE);
1592
1593         MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1594         MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
1595
1596         temp = MACIO_IN32(KEYLARGO_FCR3);
1597         if (macio->rev >= 2) {
1598                 temp |= KL3_SHUTDOWN_PLL2X;
1599                 if (sleep_mode)
1600                         temp |= KL3_SHUTDOWN_PLL_TOTAL;
1601         }
1602
1603         temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1604                 KL3_SHUTDOWN_PLLKW35;
1605         if (sleep_mode)
1606                 temp |= KL3_SHUTDOWN_PLLKW12;
1607         temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
1608                 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1609         if (sleep_mode)
1610                 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
1611         MACIO_OUT32(KEYLARGO_FCR3, temp);
1612
1613         /* Flush posted writes & wait a bit */
1614         (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1615 }
1616
1617 static void
1618 pangea_shutdown(struct macio_chip *macio, int sleep_mode)
1619 {
1620         u32 temp;
1621
1622         MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1623                                 KL0_SCC_CELL_ENABLE |
1624                                 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1625
1626         MACIO_BIC(KEYLARGO_FCR1,
1627                 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1628                 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1629                 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1630                 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1631                 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1632                 KL1_UIDE_ENABLE);
1633         if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1634                 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1635
1636         MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1637
1638         temp = MACIO_IN32(KEYLARGO_FCR3);
1639         temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1640                 KL3_SHUTDOWN_PLLKW35;
1641         temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
1642                 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
1643         if (sleep_mode)
1644                 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
1645         MACIO_OUT32(KEYLARGO_FCR3, temp);
1646
1647         /* Flush posted writes & wait a bit */
1648         (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1649 }
1650
1651 static void
1652 intrepid_shutdown(struct macio_chip *macio, int sleep_mode)
1653 {
1654         u32 temp;
1655
1656         MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1657                   KL0_SCC_CELL_ENABLE);
1658
1659         MACIO_BIC(KEYLARGO_FCR1,
1660                   /*KL1_USB2_CELL_ENABLE |*/
1661                 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1662                 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1663                 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE);
1664         if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1665                 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1666
1667         temp = MACIO_IN32(KEYLARGO_FCR3);
1668         temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
1669                   KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1670         if (sleep_mode)
1671                 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
1672         MACIO_OUT32(KEYLARGO_FCR3, temp);
1673
1674         /* Flush posted writes & wait a bit */
1675         (void)MACIO_IN32(KEYLARGO_FCR0);
1676         mdelay(10);
1677 }
1678
1679
1680 static int
1681 core99_sleep(void)
1682 {
1683         struct macio_chip *macio;
1684         int i;
1685
1686         macio = &macio_chips[0];
1687         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1688             macio->type != macio_intrepid)
1689                 return -ENODEV;
1690
1691         /* We power off the wireless slot in case it was not done
1692          * by the driver. We don't power it on automatically however
1693          */
1694         if (macio->flags & MACIO_FLAG_AIRPORT_ON)
1695                 core99_airport_enable(macio->of_node, 0, 0);
1696
1697         /* We power off the FW cable. Should be done by the driver... */
1698         if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
1699                 core99_firewire_enable(NULL, 0, 0);
1700                 core99_firewire_cable_power(NULL, 0, 0);
1701         }
1702
1703         /* We make sure int. modem is off (in case driver lost it) */
1704         if (macio->type == macio_keylargo)
1705                 core99_modem_enable(macio->of_node, 0, 0);
1706         else
1707                 pangea_modem_enable(macio->of_node, 0, 0);
1708
1709         /* We make sure the sound is off as well */
1710         core99_sound_chip_enable(macio->of_node, 0, 0);
1711
1712         /*
1713          * Save various bits of KeyLargo
1714          */
1715
1716         /* Save the state of the various GPIOs */
1717         save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
1718         save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
1719         for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1720                 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
1721         for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1722                 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
1723
1724         /* Save the FCRs */
1725         if (macio->type == macio_keylargo)
1726                 save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
1727         save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
1728         save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
1729         save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
1730         save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
1731         save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
1732         if (macio->type == macio_pangea || macio->type == macio_intrepid)
1733                 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
1734
1735         /* Save state & config of DBDMA channels */
1736         dbdma_save(macio, save_dbdma);
1737
1738         /*
1739          * Turn off as much as we can
1740          */
1741         if (macio->type == macio_pangea)
1742                 pangea_shutdown(macio, 1);
1743         else if (macio->type == macio_intrepid)
1744                 intrepid_shutdown(macio, 1);
1745         else if (macio->type == macio_keylargo)
1746                 keylargo_shutdown(macio, 1);
1747
1748         /*
1749          * Put the host bridge to sleep
1750          */
1751
1752         save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
1753         /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it
1754          * enabled !
1755          */
1756         UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
1757                ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
1758         udelay(100);
1759         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1760         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
1761         mdelay(10);
1762
1763         /*
1764          * FIXME: A bit of black magic with OpenPIC (don't ask me why)
1765          */
1766         if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1767                 MACIO_BIS(0x506e0, 0x00400000);
1768                 MACIO_BIS(0x506e0, 0x80000000);
1769         }
1770         return 0;
1771 }
1772
1773 static int
1774 core99_wake_up(void)
1775 {
1776         struct macio_chip *macio;
1777         int i;
1778
1779         macio = &macio_chips[0];
1780         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1781             macio->type != macio_intrepid)
1782                 return -ENODEV;
1783
1784         /*
1785          * Wakeup the host bridge
1786          */
1787         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1788         udelay(10);
1789         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1790         udelay(10);
1791
1792         /*
1793          * Restore KeyLargo
1794          */
1795
1796         if (macio->type == macio_keylargo) {
1797                 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
1798                 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
1799         }
1800         MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
1801         (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
1802         MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
1803         (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
1804         MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
1805         (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
1806         MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
1807         (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
1808         MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
1809         (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
1810         if (macio->type == macio_pangea || macio->type == macio_intrepid) {
1811                 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
1812                 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
1813         }
1814
1815         dbdma_restore(macio, save_dbdma);
1816
1817         MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
1818         MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
1819         for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1820                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
1821         for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1822                 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
1823
1824         /* FIXME more black magic with OpenPIC ... */
1825         if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1826                 MACIO_BIC(0x506e0, 0x00400000);
1827                 MACIO_BIC(0x506e0, 0x80000000);
1828         }
1829
1830         UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
1831         udelay(100);
1832
1833         return 0;
1834 }
1835
1836 static long
1837 core99_sleep_state(struct device_node *node, long param, long value)
1838 {
1839         /* Param == 1 means to enter the "fake sleep" mode that is
1840          * used for CPU speed switch
1841          */
1842         if (param == 1) {
1843                 if (value == 1) {
1844                         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1845                         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
1846                 } else {
1847                         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1848                         udelay(10);
1849                         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1850                         udelay(10);
1851                 }
1852                 return 0;
1853         }
1854         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
1855                 return -EPERM;
1856
1857         if (value == 1)
1858                 return core99_sleep();
1859         else if (value == 0)
1860                 return core99_wake_up();
1861         return 0;
1862 }
1863
1864 #endif /* CONFIG_POWER4 */
1865
1866 static long
1867 generic_dev_can_wake(struct device_node *node, long param, long value)
1868 {
1869         /* Todo: eventually check we are really dealing with on-board
1870          * video device ...
1871          */
1872
1873         if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP)
1874                 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP;
1875         return 0;
1876 }
1877
1878 static long generic_get_mb_info(struct device_node *node, long param, long value)
1879 {
1880         switch(param) {
1881                 case PMAC_MB_INFO_MODEL:
1882                         return pmac_mb.model_id;
1883                 case PMAC_MB_INFO_FLAGS:
1884                         return pmac_mb.board_flags;
1885                 case PMAC_MB_INFO_NAME:
1886                         /* hack hack hack... but should work */
1887                         *((const char **)value) = pmac_mb.model_name;
1888                         return 0;
1889         }
1890         return -EINVAL;
1891 }
1892
1893
1894 /*
1895  * Table definitions
1896  */
1897
1898 /* Used on any machine
1899  */
1900 static struct feature_table_entry any_features[] = {
1901         { PMAC_FTR_GET_MB_INFO,         generic_get_mb_info },
1902         { PMAC_FTR_DEVICE_CAN_WAKE,     generic_dev_can_wake },
1903         { 0, NULL }
1904 };
1905
1906 #ifndef CONFIG_POWER4
1907
1908 /* OHare based motherboards. Currently, we only use these on the
1909  * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1910  * to have issues with turning on/off those asic cells
1911  */
1912 static struct feature_table_entry ohare_features[] = {
1913         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
1914         { PMAC_FTR_SWIM3_ENABLE,        ohare_floppy_enable },
1915         { PMAC_FTR_MESH_ENABLE,         ohare_mesh_enable },
1916         { PMAC_FTR_IDE_ENABLE,          ohare_ide_enable},
1917         { PMAC_FTR_IDE_RESET,           ohare_ide_reset},
1918         { PMAC_FTR_SLEEP_STATE,         ohare_sleep_state },
1919         { 0, NULL }
1920 };
1921
1922 /* Heathrow desktop machines (Beige G3).
1923  * Separated as some features couldn't be properly tested
1924  * and the serial port control bits appear to confuse it.
1925  */
1926 static struct feature_table_entry heathrow_desktop_features[] = {
1927         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
1928         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
1929         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
1930         { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
1931         { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
1932         { 0, NULL }
1933 };
1934
1935 /* Heathrow based laptop, that is the Wallstreet and mainstreet
1936  * powerbooks.
1937  */
1938 static struct feature_table_entry heathrow_laptop_features[] = {
1939         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
1940         { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
1941         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
1942         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
1943         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
1944         { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
1945         { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
1946         { PMAC_FTR_SOUND_CHIP_ENABLE,   heathrow_sound_enable },
1947         { PMAC_FTR_SLEEP_STATE,         heathrow_sleep_state },
1948         { 0, NULL }
1949 };
1950
1951 /* Paddington based machines
1952  * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1953  */
1954 static struct feature_table_entry paddington_features[] = {
1955         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
1956         { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
1957         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
1958         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
1959         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
1960         { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
1961         { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
1962         { PMAC_FTR_SOUND_CHIP_ENABLE,   heathrow_sound_enable },
1963         { PMAC_FTR_SLEEP_STATE,         heathrow_sleep_state },
1964         { 0, NULL }
1965 };
1966
1967 /* Core99 & MacRISC 2 machines (all machines released since the
1968  * iBook (included), that is all AGP machines, except pangea
1969  * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1970  * used on iBook2 & iMac "flow power".
1971  */
1972 static struct feature_table_entry core99_features[] = {
1973         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
1974         { PMAC_FTR_MODEM_ENABLE,        core99_modem_enable },
1975         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
1976         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
1977         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
1978         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
1979         { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
1980         { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
1981         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
1982         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
1983         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
1984         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
1985 #ifdef CONFIG_SMP
1986         { PMAC_FTR_RESET_CPU,           core99_reset_cpu },
1987 #endif /* CONFIG_SMP */
1988         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
1989         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
1990         { 0, NULL }
1991 };
1992
1993 /* RackMac
1994  */
1995 static struct feature_table_entry rackmac_features[] = {
1996         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
1997         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
1998         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
1999         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
2000         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
2001         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
2002         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
2003         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
2004         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
2005 #ifdef CONFIG_SMP
2006         { PMAC_FTR_RESET_CPU,           core99_reset_cpu },
2007 #endif /* CONFIG_SMP */
2008         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2009         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2010         { 0, NULL }
2011 };
2012
2013 /* Pangea features
2014  */
2015 static struct feature_table_entry pangea_features[] = {
2016         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
2017         { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
2018         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
2019         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
2020         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
2021         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
2022         { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
2023         { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
2024         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
2025         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
2026         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
2027         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
2028         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2029         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2030         { 0, NULL }
2031 };
2032
2033 /* Intrepid features
2034  */
2035 static struct feature_table_entry intrepid_features[] = {
2036         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
2037         { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
2038         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
2039         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
2040         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
2041         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
2042         { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
2043         { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
2044         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
2045         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
2046         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
2047         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
2048         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2049         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2050         { PMAC_FTR_AACK_DELAY_ENABLE,   intrepid_aack_delay_enable },
2051         { 0, NULL }
2052 };
2053
2054 #else /* CONFIG_POWER4 */
2055
2056 /* G5 features
2057  */
2058 static struct feature_table_entry g5_features[] = {
2059         { PMAC_FTR_GMAC_ENABLE,         g5_gmac_enable },
2060         { PMAC_FTR_1394_ENABLE,         g5_fw_enable },
2061         { PMAC_FTR_ENABLE_MPIC,         g5_mpic_enable },
2062         { PMAC_FTR_GMAC_PHY_RESET,      g5_eth_phy_reset },
2063         { PMAC_FTR_SOUND_CHIP_ENABLE,   g5_i2s_enable },
2064 #ifdef CONFIG_SMP
2065         { PMAC_FTR_RESET_CPU,           g5_reset_cpu },
2066 #endif /* CONFIG_SMP */
2067         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2068         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2069         { 0, NULL }
2070 };
2071
2072 #endif /* CONFIG_POWER4 */
2073
2074 static struct pmac_mb_def pmac_mb_defs[] = {
2075 #ifndef CONFIG_POWER4
2076         /*
2077          * Desktops
2078          */
2079
2080         {       "AAPL,8500",                    "PowerMac 8500/8600",
2081                 PMAC_TYPE_PSURGE,               NULL,
2082                 0
2083         },
2084         {       "AAPL,9500",                    "PowerMac 9500/9600",
2085                 PMAC_TYPE_PSURGE,               NULL,
2086                 0
2087         },
2088         {       "AAPL,7200",                    "PowerMac 7200",
2089                 PMAC_TYPE_PSURGE,               NULL,
2090                 0
2091         },
2092         {       "AAPL,7300",                    "PowerMac 7200/7300",
2093                 PMAC_TYPE_PSURGE,               NULL,
2094                 0
2095         },
2096         {       "AAPL,7500",                    "PowerMac 7500",
2097                 PMAC_TYPE_PSURGE,               NULL,
2098                 0
2099         },
2100         {       "AAPL,ShinerESB",               "Apple Network Server",
2101                 PMAC_TYPE_ANS,                  NULL,
2102                 0
2103         },
2104         {       "AAPL,e407",                    "Alchemy",
2105                 PMAC_TYPE_ALCHEMY,              NULL,
2106                 0
2107         },
2108         {       "AAPL,e411",                    "Gazelle",
2109                 PMAC_TYPE_GAZELLE,              NULL,
2110                 0
2111         },
2112         {       "AAPL,Gossamer",                "PowerMac G3 (Gossamer)",
2113                 PMAC_TYPE_GOSSAMER,             heathrow_desktop_features,
2114                 0
2115         },
2116         {       "AAPL,PowerMac G3",             "PowerMac G3 (Silk)",
2117                 PMAC_TYPE_SILK,                 heathrow_desktop_features,
2118                 0
2119         },
2120         {       "PowerMac1,1",                  "Blue&White G3",
2121                 PMAC_TYPE_YOSEMITE,             paddington_features,
2122                 0
2123         },
2124         {       "PowerMac1,2",                  "PowerMac G4 PCI Graphics",
2125                 PMAC_TYPE_YIKES,                paddington_features,
2126                 0
2127         },
2128         {       "PowerMac2,1",                  "iMac FireWire",
2129                 PMAC_TYPE_FW_IMAC,              core99_features,
2130                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2131         },
2132         {       "PowerMac2,2",                  "iMac FireWire",
2133                 PMAC_TYPE_FW_IMAC,              core99_features,
2134                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2135         },
2136         {       "PowerMac3,1",                  "PowerMac G4 AGP Graphics",
2137                 PMAC_TYPE_SAWTOOTH,             core99_features,
2138                 PMAC_MB_OLD_CORE99
2139         },
2140         {       "PowerMac3,2",                  "PowerMac G4 AGP Graphics",
2141                 PMAC_TYPE_SAWTOOTH,             core99_features,
2142                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2143         },
2144         {       "PowerMac3,3",                  "PowerMac G4 AGP Graphics",
2145                 PMAC_TYPE_SAWTOOTH,             core99_features,
2146                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2147         },
2148         {       "PowerMac3,4",                  "PowerMac G4 Silver",
2149                 PMAC_TYPE_QUICKSILVER,          core99_features,
2150                 PMAC_MB_MAY_SLEEP
2151         },
2152         {       "PowerMac3,5",                  "PowerMac G4 Silver",
2153                 PMAC_TYPE_QUICKSILVER,          core99_features,
2154                 PMAC_MB_MAY_SLEEP
2155         },
2156         {       "PowerMac3,6",                  "PowerMac G4 Windtunnel",
2157                 PMAC_TYPE_WINDTUNNEL,           core99_features,
2158                 PMAC_MB_MAY_SLEEP,
2159         },
2160         {       "PowerMac4,1",                  "iMac \"Flower Power\"",
2161                 PMAC_TYPE_PANGEA_IMAC,          pangea_features,
2162                 PMAC_MB_MAY_SLEEP
2163         },
2164         {       "PowerMac4,2",                  "Flat panel iMac",
2165                 PMAC_TYPE_FLAT_PANEL_IMAC,      pangea_features,
2166                 PMAC_MB_CAN_SLEEP
2167         },
2168         {       "PowerMac4,4",                  "eMac",
2169                 PMAC_TYPE_EMAC,                 core99_features,
2170                 PMAC_MB_MAY_SLEEP
2171         },
2172         {       "PowerMac5,1",                  "PowerMac G4 Cube",
2173                 PMAC_TYPE_CUBE,                 core99_features,
2174                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2175         },
2176         {       "PowerMac6,1",                  "Flat panel iMac",
2177                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2178                 PMAC_MB_MAY_SLEEP,
2179         },
2180         {       "PowerMac6,3",                  "Flat panel iMac",
2181                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2182                 PMAC_MB_MAY_SLEEP,
2183         },
2184         {       "PowerMac6,4",                  "eMac",
2185                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2186                 PMAC_MB_MAY_SLEEP,
2187         },
2188         {       "PowerMac10,1",                 "Mac mini",
2189                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2190                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER,
2191         },
2192         {       "iMac,1",                       "iMac (first generation)",
2193                 PMAC_TYPE_ORIG_IMAC,            paddington_features,
2194                 0
2195         },
2196
2197         /*
2198          * Xserve's
2199          */
2200
2201         {       "RackMac1,1",                   "XServe",
2202                 PMAC_TYPE_RACKMAC,              rackmac_features,
2203                 0,
2204         },
2205         {       "RackMac1,2",                   "XServe rev. 2",
2206                 PMAC_TYPE_RACKMAC,              rackmac_features,
2207                 0,
2208         },
2209
2210         /*
2211          * Laptops
2212          */
2213
2214         {       "AAPL,3400/2400",               "PowerBook 3400",
2215                 PMAC_TYPE_HOOPER,               ohare_features,
2216                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2217         },
2218         {       "AAPL,3500",                    "PowerBook 3500",
2219                 PMAC_TYPE_KANGA,                ohare_features,
2220                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2221         },
2222         {       "AAPL,PowerBook1998",           "PowerBook Wallstreet",
2223                 PMAC_TYPE_WALLSTREET,           heathrow_laptop_features,
2224                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2225         },
2226         {       "PowerBook1,1",                 "PowerBook 101 (Lombard)",
2227                 PMAC_TYPE_101_PBOOK,            paddington_features,
2228                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2229         },
2230         {       "PowerBook2,1",                 "iBook (first generation)",
2231                 PMAC_TYPE_ORIG_IBOOK,           core99_features,
2232                 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2233         },
2234         {       "PowerBook2,2",                 "iBook FireWire",
2235                 PMAC_TYPE_FW_IBOOK,             core99_features,
2236                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2237                 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2238         },
2239         {       "PowerBook3,1",                 "PowerBook Pismo",
2240                 PMAC_TYPE_PISMO,                core99_features,
2241                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2242                 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2243         },
2244         {       "PowerBook3,2",                 "PowerBook Titanium",
2245                 PMAC_TYPE_TITANIUM,             core99_features,
2246                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2247         },
2248         {       "PowerBook3,3",                 "PowerBook Titanium II",
2249                 PMAC_TYPE_TITANIUM2,            core99_features,
2250                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2251         },
2252         {       "PowerBook3,4",                 "PowerBook Titanium III",
2253                 PMAC_TYPE_TITANIUM3,            core99_features,
2254                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2255         },
2256         {       "PowerBook3,5",                 "PowerBook Titanium IV",
2257                 PMAC_TYPE_TITANIUM4,            core99_features,
2258                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2259         },
2260         {       "PowerBook4,1",                 "iBook 2",
2261                 PMAC_TYPE_IBOOK2,               pangea_features,
2262                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2263         },
2264         {       "PowerBook4,2",                 "iBook 2",
2265                 PMAC_TYPE_IBOOK2,               pangea_features,
2266                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2267         },
2268         {       "PowerBook4,3",                 "iBook 2 rev. 2",
2269                 PMAC_TYPE_IBOOK2,               pangea_features,
2270                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2271         },
2272         {       "PowerBook5,1",                 "PowerBook G4 17\"",
2273                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2274                 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2275         },
2276         {       "PowerBook5,2",                 "PowerBook G4 15\"",
2277                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2278                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2279         },
2280         {       "PowerBook5,3",                 "PowerBook G4 17\"",
2281                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2282                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2283         },
2284         {       "PowerBook5,4",                 "PowerBook G4 15\"",
2285                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2286                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2287         },
2288         {       "PowerBook5,5",                 "PowerBook G4 17\"",
2289                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2290                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2291         },
2292         {       "PowerBook5,6",                 "PowerBook G4 15\"",
2293                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2294                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2295         },
2296         {       "PowerBook5,7",                 "PowerBook G4 17\"",
2297                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2298                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2299         },
2300         {       "PowerBook5,8",                 "PowerBook G4 15\"",
2301                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2302                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2303         },
2304         {       "PowerBook5,9",                 "PowerBook G4 17\"",
2305                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2306                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2307         },
2308         {       "PowerBook6,1",                 "PowerBook G4 12\"",
2309                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2310                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2311         },
2312         {       "PowerBook6,2",                 "PowerBook G4",
2313                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2314                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2315         },
2316         {       "PowerBook6,3",                 "iBook G4",
2317                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2318                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2319         },
2320         {       "PowerBook6,4",                 "PowerBook G4 12\"",
2321                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2322                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2323         },
2324         {       "PowerBook6,5",                 "iBook G4",
2325                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2326                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2327         },
2328         {       "PowerBook6,7",                 "iBook G4",
2329                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2330                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2331         },
2332         {       "PowerBook6,8",                 "PowerBook G4 12\"",
2333                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2334                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2335         },
2336 #else /* CONFIG_POWER4 */
2337         {       "PowerMac7,2",                  "PowerMac G5",
2338                 PMAC_TYPE_POWERMAC_G5,          g5_features,
2339                 0,
2340         },
2341 #ifdef CONFIG_PPC64
2342         {       "PowerMac7,3",                  "PowerMac G5",
2343                 PMAC_TYPE_POWERMAC_G5,          g5_features,
2344                 0,
2345         },
2346         {       "PowerMac8,1",                  "iMac G5",
2347                 PMAC_TYPE_IMAC_G5,              g5_features,
2348                 0,
2349         },
2350         {       "PowerMac9,1",                  "PowerMac G5",
2351                 PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
2352                 0,
2353         },
2354         {       "PowerMac11,2",                 "PowerMac G5 Dual Core",
2355                 PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
2356                 0,
2357         },
2358         {       "PowerMac12,1",                 "iMac G5 (iSight)",
2359                 PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
2360                 0,
2361         },
2362         {       "RackMac3,1",                   "XServe G5",
2363                 PMAC_TYPE_XSERVE_G5,            g5_features,
2364                 0,
2365         },
2366 #endif /* CONFIG_PPC64 */
2367 #endif /* CONFIG_POWER4 */
2368 };
2369
2370 /*
2371  * The toplevel feature_call callback
2372  */
2373 long pmac_do_feature_call(unsigned int selector, ...)
2374 {
2375         struct device_node *node;
2376         long param, value;
2377         int i;
2378         feature_call func = NULL;
2379         va_list args;
2380
2381         if (pmac_mb.features)
2382                 for (i=0; pmac_mb.features[i].function; i++)
2383                         if (pmac_mb.features[i].selector == selector) {
2384                                 func = pmac_mb.features[i].function;
2385                                 break;
2386                         }
2387         if (!func)
2388                 for (i=0; any_features[i].function; i++)
2389                         if (any_features[i].selector == selector) {
2390                                 func = any_features[i].function;
2391                                 break;
2392                         }
2393         if (!func)
2394                 return -ENODEV;
2395
2396         va_start(args, selector);
2397         node = (struct device_node*)va_arg(args, void*);
2398         param = va_arg(args, long);
2399         value = va_arg(args, long);
2400         va_end(args);
2401
2402         return func(node, param, value);
2403 }
2404
2405 static int __init probe_motherboard(void)
2406 {
2407         int i;
2408         struct macio_chip *macio = &macio_chips[0];
2409         const char *model = NULL;
2410         struct device_node *dt;
2411
2412         /* Lookup known motherboard type in device-tree. First try an
2413          * exact match on the "model" property, then try a "compatible"
2414          * match is none is found.
2415          */
2416         dt = find_devices("device-tree");
2417         if (dt != NULL)
2418                 model = (const char *) get_property(dt, "model", NULL);
2419         for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2420             if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
2421                 pmac_mb = pmac_mb_defs[i];
2422                 goto found;
2423             }
2424         }
2425         for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2426             if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
2427                 pmac_mb = pmac_mb_defs[i];
2428                 goto found;
2429             }
2430         }
2431
2432         /* Fallback to selection depending on mac-io chip type */
2433         switch(macio->type) {
2434 #ifndef CONFIG_POWER4
2435             case macio_grand_central:
2436                 pmac_mb.model_id = PMAC_TYPE_PSURGE;
2437                 pmac_mb.model_name = "Unknown PowerSurge";
2438                 break;
2439             case macio_ohare:
2440                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
2441                 pmac_mb.model_name = "Unknown OHare-based";
2442                 break;
2443             case macio_heathrow:
2444                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
2445                 pmac_mb.model_name = "Unknown Heathrow-based";
2446                 pmac_mb.features = heathrow_desktop_features;
2447                 break;
2448             case macio_paddington:
2449                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
2450                 pmac_mb.model_name = "Unknown Paddington-based";
2451                 pmac_mb.features = paddington_features;
2452                 break;
2453             case macio_keylargo:
2454                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
2455                 pmac_mb.model_name = "Unknown Keylargo-based";
2456                 pmac_mb.features = core99_features;
2457                 break;
2458             case macio_pangea:
2459                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
2460                 pmac_mb.model_name = "Unknown Pangea-based";
2461                 pmac_mb.features = pangea_features;
2462                 break;
2463             case macio_intrepid:
2464                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
2465                 pmac_mb.model_name = "Unknown Intrepid-based";
2466                 pmac_mb.features = intrepid_features;
2467                 break;
2468 #else /* CONFIG_POWER4 */
2469         case macio_keylargo2:
2470                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
2471                 pmac_mb.model_name = "Unknown K2-based";
2472                 pmac_mb.features = g5_features;
2473                 break;
2474         case macio_shasta:
2475                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_SHASTA;
2476                 pmac_mb.model_name = "Unknown Shasta-based";
2477                 pmac_mb.features = g5_features;
2478                 break;
2479 #endif /* CONFIG_POWER4 */
2480         default:
2481                 return -ENODEV;
2482         }
2483 found:
2484 #ifndef CONFIG_POWER4
2485         /* Fixup Hooper vs. Comet */
2486         if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
2487                 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4);
2488                 if (!mach_id_ptr)
2489                         return -ENODEV;
2490                 /* Here, I used to disable the media-bay on comet. It
2491                  * appears this is wrong, the floppy connector is actually
2492                  * a kind of media-bay and works with the current driver.
2493                  */
2494                 if (__raw_readl(mach_id_ptr) & 0x20000000UL)
2495                         pmac_mb.model_id = PMAC_TYPE_COMET;
2496                 iounmap(mach_id_ptr);
2497         }
2498 #endif /* CONFIG_POWER4 */
2499
2500 #ifdef CONFIG_6xx
2501         /* Set default value of powersave_nap on machines that support it.
2502          * It appears that uninorth rev 3 has a problem with it, we don't
2503          * enable it on those. In theory, the flush-on-lock property is
2504          * supposed to be set when not supported, but I'm not very confident
2505          * that all Apple OF revs did it properly, I do it the paranoid way.
2506          */
2507         while (uninorth_base && uninorth_rev > 3) {
2508                 struct device_node *np = find_path_device("/cpus");
2509                 if (!np || !np->child) {
2510                         printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
2511                         break;
2512                 }
2513                 np = np->child;
2514                 /* Nap mode not supported on SMP */
2515                 if (np->sibling)
2516                         break;
2517                 /* Nap mode not supported if flush-on-lock property is present */
2518                 if (get_property(np, "flush-on-lock", NULL))
2519                         break;
2520                 powersave_nap = 1;
2521                 printk(KERN_INFO "Processor NAP mode on idle enabled.\n");
2522                 break;
2523         }
2524
2525         /* On CPUs that support it (750FX), lowspeed by default during
2526          * NAP mode
2527          */
2528         powersave_lowspeed = 1;
2529 #endif /* CONFIG_6xx */
2530 #ifdef CONFIG_POWER4
2531         powersave_nap = 1;
2532 #endif
2533         /* Check for "mobile" machine */
2534         if (model && (strncmp(model, "PowerBook", 9) == 0
2535                    || strncmp(model, "iBook", 5) == 0))
2536                 pmac_mb.board_flags |= PMAC_MB_MOBILE;
2537
2538
2539         printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
2540         return 0;
2541 }
2542
2543 /* Initialize the Core99 UniNorth host bridge and memory controller
2544  */
2545 static void __init probe_uninorth(void)
2546 {
2547         u32 *addrp;
2548         phys_addr_t address;
2549         unsigned long actrl;
2550
2551         /* Locate core99 Uni-N */
2552         uninorth_node = of_find_node_by_name(NULL, "uni-n");
2553         /* Locate G5 u3 */
2554         if (uninorth_node == NULL) {
2555                 uninorth_node = of_find_node_by_name(NULL, "u3");
2556                 uninorth_maj = 3;
2557         }
2558         /* Locate G5 u4 */
2559         if (uninorth_node == NULL) {
2560                 uninorth_node = of_find_node_by_name(NULL, "u4");
2561                 uninorth_maj = 4;
2562         }
2563         if (uninorth_node == NULL)
2564                 return;
2565
2566         addrp = (u32 *)get_property(uninorth_node, "reg", NULL);
2567         if (addrp == NULL)
2568                 return;
2569         address = of_translate_address(uninorth_node, addrp);
2570         if (address == 0)
2571                 return;
2572         uninorth_base = ioremap(address, 0x40000);
2573         uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
2574         if (uninorth_maj == 3 || uninorth_maj == 4)
2575                 u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
2576
2577         printk(KERN_INFO "Found %s memory controller & host bridge"
2578                " @ 0x%08x revision: 0x%02x\n", uninorth_maj == 3 ? "U3" :
2579                uninorth_maj == 4 ? "U4" : "UniNorth",
2580                (unsigned int)address, uninorth_rev);
2581         printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
2582
2583         /* Set the arbitrer QAck delay according to what Apple does
2584          */
2585         if (uninorth_rev < 0x11) {
2586                 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
2587                 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
2588                         UNI_N_ARB_CTRL_QACK_DELAY) <<
2589                         UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
2590                 UN_OUT(UNI_N_ARB_CTRL, actrl);
2591         }
2592
2593         /* Some more magic as done by them in recent MacOS X on UniNorth
2594          * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
2595          * memory timeout
2596          */
2597         if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) ||
2598             uninorth_rev == 0xc0)
2599                 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
2600 }
2601
2602 static void __init probe_one_macio(const char *name, const char *compat, int type)
2603 {
2604         struct device_node*     node;
2605         int                     i;
2606         volatile u32 __iomem    *base;
2607         u32                     *addrp, *revp;
2608         phys_addr_t             addr;
2609         u64                     size;
2610
2611         for (node = NULL; (node = of_find_node_by_name(node, name)) != NULL;) {
2612                 if (!compat)
2613                         break;
2614                 if (device_is_compatible(node, compat))
2615                         break;
2616         }
2617         if (!node)
2618                 return;
2619         for(i=0; i<MAX_MACIO_CHIPS; i++) {
2620                 if (!macio_chips[i].of_node)
2621                         break;
2622                 if (macio_chips[i].of_node == node)
2623                         return;
2624         }
2625
2626         if (i >= MAX_MACIO_CHIPS) {
2627                 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
2628                 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
2629                 return;
2630         }
2631         addrp = of_get_pci_address(node, 0, &size, NULL);
2632         if (addrp == NULL) {
2633                 printk(KERN_ERR "pmac_feature: %s: can't find base !\n",
2634                        node->full_name);
2635                 return;
2636         }
2637         addr = of_translate_address(node, addrp);
2638         if (addr == 0) {
2639                 printk(KERN_ERR "pmac_feature: %s, can't translate base !\n",
2640                        node->full_name);
2641                 return;
2642         }
2643         base = ioremap(addr, (unsigned long)size);
2644         if (!base) {
2645                 printk(KERN_ERR "pmac_feature: %s, can't map mac-io chip !\n",
2646                        node->full_name);
2647                 return;
2648         }
2649         if (type == macio_keylargo || type == macio_keylargo2) {
2650                 u32 *did = (u32 *)get_property(node, "device-id", NULL);
2651                 if (*did == 0x00000025)
2652                         type = macio_pangea;
2653                 if (*did == 0x0000003e)
2654                         type = macio_intrepid;
2655                 if (*did == 0x0000004f)
2656                         type = macio_shasta;
2657         }
2658         macio_chips[i].of_node  = node;
2659         macio_chips[i].type     = type;
2660         macio_chips[i].base     = base;
2661         macio_chips[i].flags    = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
2662         macio_chips[i].name     = macio_names[type];
2663         revp = (u32 *)get_property(node, "revision-id", NULL);
2664         if (revp)
2665                 macio_chips[i].rev = *revp;
2666         printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
2667                 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
2668 }
2669
2670 static int __init
2671 probe_macios(void)
2672 {
2673         /* Warning, ordering is important */
2674         probe_one_macio("gc", NULL, macio_grand_central);
2675         probe_one_macio("ohare", NULL, macio_ohare);
2676         probe_one_macio("pci106b,7", NULL, macio_ohareII);
2677         probe_one_macio("mac-io", "keylargo", macio_keylargo);
2678         probe_one_macio("mac-io", "paddington", macio_paddington);
2679         probe_one_macio("mac-io", "gatwick", macio_gatwick);
2680         probe_one_macio("mac-io", "heathrow", macio_heathrow);
2681         probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
2682
2683         /* Make sure the "main" macio chip appear first */
2684         if (macio_chips[0].type == macio_gatwick
2685             && macio_chips[1].type == macio_heathrow) {
2686                 struct macio_chip temp = macio_chips[0];
2687                 macio_chips[0] = macio_chips[1];
2688                 macio_chips[1] = temp;
2689         }
2690         if (macio_chips[0].type == macio_ohareII
2691             && macio_chips[1].type == macio_ohare) {
2692                 struct macio_chip temp = macio_chips[0];
2693                 macio_chips[0] = macio_chips[1];
2694                 macio_chips[1] = temp;
2695         }
2696         macio_chips[0].lbus.index = 0;
2697         macio_chips[1].lbus.index = 1;
2698
2699         return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
2700 }
2701
2702 static void __init
2703 initial_serial_shutdown(struct device_node *np)
2704 {
2705         int len;
2706         struct slot_names_prop {
2707                 int     count;
2708                 char    name[1];
2709         } *slots;
2710         char *conn;
2711         int port_type = PMAC_SCC_ASYNC;
2712         int modem = 0;
2713
2714         slots = (struct slot_names_prop *)get_property(np, "slot-names", &len);
2715         conn = get_property(np, "AAPL,connector", &len);
2716         if (conn && (strcmp(conn, "infrared") == 0))
2717                 port_type = PMAC_SCC_IRDA;
2718         else if (device_is_compatible(np, "cobalt"))
2719                 modem = 1;
2720         else if (slots && slots->count > 0) {
2721                 if (strcmp(slots->name, "IrDA") == 0)
2722                         port_type = PMAC_SCC_IRDA;
2723                 else if (strcmp(slots->name, "Modem") == 0)
2724                         modem = 1;
2725         }
2726         if (modem)
2727                 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
2728         pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
2729 }
2730
2731 static void __init
2732 set_initial_features(void)
2733 {
2734         struct device_node *np;
2735
2736         /* That hack appears to be necessary for some StarMax motherboards
2737          * but I'm not too sure it was audited for side-effects on other
2738          * ohare based machines...
2739          * Since I still have difficulties figuring the right way to
2740          * differenciate them all and since that hack was there for a long
2741          * time, I'll keep it around
2742          */
2743         if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) {
2744                 struct macio_chip *macio = &macio_chips[0];
2745                 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
2746         } else if (macio_chips[0].type == macio_ohare) {
2747                 struct macio_chip *macio = &macio_chips[0];
2748                 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2749         } else if (macio_chips[1].type == macio_ohare) {
2750                 struct macio_chip *macio = &macio_chips[1];
2751                 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2752         }
2753
2754 #ifdef CONFIG_POWER4
2755         if (macio_chips[0].type == macio_keylargo2 ||
2756             macio_chips[0].type == macio_shasta) {
2757 #ifndef CONFIG_SMP
2758                 /* On SMP machines running UP, we have the second CPU eating
2759                  * bus cycles. We need to take it off the bus. This is done
2760                  * from pmac_smp for SMP kernels running on one CPU
2761                  */
2762                 np = of_find_node_by_type(NULL, "cpu");
2763                 if (np != NULL)
2764                         np = of_find_node_by_type(np, "cpu");
2765                 if (np != NULL) {
2766                         g5_phy_disable_cpu1();
2767                         of_node_put(np);
2768                 }
2769 #endif /* CONFIG_SMP */
2770                 /* Enable GMAC for now for PCI probing. It will be disabled
2771                  * later on after PCI probe
2772                  */
2773                 np = of_find_node_by_name(NULL, "ethernet");
2774                 while(np) {
2775                         if (device_is_compatible(np, "K2-GMAC"))
2776                                 g5_gmac_enable(np, 0, 1);
2777                         np = of_find_node_by_name(np, "ethernet");
2778                 }
2779
2780                 /* Enable FW before PCI probe. Will be disabled later on
2781                  * Note: We should have a batter way to check that we are
2782                  * dealing with uninorth internal cell and not a PCI cell
2783                  * on the external PCI. The code below works though.
2784                  */
2785                 np = of_find_node_by_name(NULL, "firewire");
2786                 while(np) {
2787                         if (device_is_compatible(np, "pci106b,5811")) {
2788                                 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2789                                 g5_fw_enable(np, 0, 1);
2790                         }
2791                         np = of_find_node_by_name(np, "firewire");
2792                 }
2793         }
2794 #else /* CONFIG_POWER4 */
2795
2796         if (macio_chips[0].type == macio_keylargo ||
2797             macio_chips[0].type == macio_pangea ||
2798             macio_chips[0].type == macio_intrepid) {
2799                 /* Enable GMAC for now for PCI probing. It will be disabled
2800                  * later on after PCI probe
2801                  */
2802                 np = of_find_node_by_name(NULL, "ethernet");
2803                 while(np) {
2804                         if (np->parent
2805                             && device_is_compatible(np->parent, "uni-north")
2806                             && device_is_compatible(np, "gmac"))
2807                                 core99_gmac_enable(np, 0, 1);
2808                         np = of_find_node_by_name(np, "ethernet");
2809                 }
2810
2811                 /* Enable FW before PCI probe. Will be disabled later on
2812                  * Note: We should have a batter way to check that we are
2813                  * dealing with uninorth internal cell and not a PCI cell
2814                  * on the external PCI. The code below works though.
2815                  */
2816                 np = of_find_node_by_name(NULL, "firewire");
2817                 while(np) {
2818                         if (np->parent
2819                             && device_is_compatible(np->parent, "uni-north")
2820                             && (device_is_compatible(np, "pci106b,18") ||
2821                                 device_is_compatible(np, "pci106b,30") ||
2822                                 device_is_compatible(np, "pci11c1,5811"))) {
2823                                 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2824                                 core99_firewire_enable(np, 0, 1);
2825                         }
2826                         np = of_find_node_by_name(np, "firewire");
2827                 }
2828
2829                 /* Enable ATA-100 before PCI probe. */
2830                 np = of_find_node_by_name(NULL, "ata-6");
2831                 while(np) {
2832                         if (np->parent
2833                             && device_is_compatible(np->parent, "uni-north")
2834                             && device_is_compatible(np, "kauai-ata")) {
2835                                 core99_ata100_enable(np, 1);
2836                         }
2837                         np = of_find_node_by_name(np, "ata-6");
2838                 }
2839
2840                 /* Switch airport off */
2841                 np = find_devices("radio");
2842                 while(np) {
2843                         if (np && np->parent == macio_chips[0].of_node) {
2844                                 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2845                                 core99_airport_enable(np, 0, 0);
2846                         }
2847                         np = np->next;
2848                 }
2849         }
2850
2851         /* On all machines that support sound PM, switch sound off */
2852         if (macio_chips[0].of_node)
2853                 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
2854                         macio_chips[0].of_node, 0, 0);
2855
2856         /* While on some desktop G3s, we turn it back on */
2857         if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
2858                 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
2859                     pmac_mb.model_id == PMAC_TYPE_SILK)) {
2860                 struct macio_chip *macio = &macio_chips[0];
2861                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
2862                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
2863         }
2864
2865 #endif /* CONFIG_POWER4 */
2866
2867         /* On all machines, switch modem & serial ports off */
2868         np = find_devices("ch-a");
2869         while(np) {
2870                 initial_serial_shutdown(np);
2871                 np = np->next;
2872         }
2873         np = find_devices("ch-b");
2874         while(np) {
2875                 initial_serial_shutdown(np);
2876                 np = np->next;
2877         }
2878 }
2879
2880 void __init
2881 pmac_feature_init(void)
2882 {
2883         /* Detect the UniNorth memory controller */
2884         probe_uninorth();
2885
2886         /* Probe mac-io controllers */
2887         if (probe_macios()) {
2888                 printk(KERN_WARNING "No mac-io chip found\n");
2889                 return;
2890         }
2891
2892         /* Probe machine type */
2893         if (probe_motherboard())
2894                 printk(KERN_WARNING "Unknown PowerMac !\n");
2895
2896         /* Set some initial features (turn off some chips that will
2897          * be later turned on)
2898          */
2899         set_initial_features();
2900 }
2901
2902 #if 0
2903 static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
2904 {
2905         int     freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
2906         int     bits[8] = { 8,16,0,32,2,4,0,0 };
2907         int     freq = (frq >> 8) & 0xf;
2908
2909         if (freqs[freq] == 0)
2910                 printk("%s: Unknown HT link frequency %x\n", name, freq);
2911         else
2912                 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
2913                        name, freqs[freq],
2914                        bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
2915 }
2916
2917 void __init pmac_check_ht_link(void)
2918 {
2919         u32     ufreq, freq, ucfg, cfg;
2920         struct device_node *pcix_node;
2921         u8      px_bus, px_devfn;
2922         struct pci_controller *px_hose;
2923
2924         (void)in_be32(u3_ht + U3_HT_LINK_COMMAND);
2925         ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG);
2926         ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ);
2927         dump_HT_speeds("U3 HyperTransport", cfg, freq);
2928
2929         pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
2930         if (pcix_node == NULL) {
2931                 printk("No PCI-X bridge found\n");
2932                 return;
2933         }
2934         if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) {
2935                 printk("PCI-X bridge found but not matched to pci\n");
2936                 return;
2937         }
2938         px_hose = pci_find_hose_for_OF_device(pcix_node);
2939         if (px_hose == NULL) {
2940                 printk("PCI-X bridge found but not matched to host\n");
2941                 return;
2942         }       
2943         early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
2944         early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
2945         dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
2946         early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
2947         early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
2948         dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
2949 }
2950 #endif /* 0 */
2951
2952 /*
2953  * Early video resume hook
2954  */
2955
2956 static void (*pmac_early_vresume_proc)(void *data);
2957 static void *pmac_early_vresume_data;
2958
2959 void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2960 {
2961         if (_machine != _MACH_Pmac)
2962                 return;
2963         preempt_disable();
2964         pmac_early_vresume_proc = proc;
2965         pmac_early_vresume_data = data;
2966         preempt_enable();
2967 }
2968 EXPORT_SYMBOL(pmac_set_early_video_resume);
2969
2970 void pmac_call_early_video_resume(void)
2971 {
2972         if (pmac_early_vresume_proc)
2973                 pmac_early_vresume_proc(pmac_early_vresume_data);
2974 }
2975
2976 /*
2977  * AGP related suspend/resume code
2978  */
2979
2980 static struct pci_dev *pmac_agp_bridge;
2981 static int (*pmac_agp_suspend)(struct pci_dev *bridge);
2982 static int (*pmac_agp_resume)(struct pci_dev *bridge);
2983
2984 void pmac_register_agp_pm(struct pci_dev *bridge,
2985                                  int (*suspend)(struct pci_dev *bridge),
2986                                  int (*resume)(struct pci_dev *bridge))
2987 {
2988         if (suspend || resume) {
2989                 pmac_agp_bridge = bridge;
2990                 pmac_agp_suspend = suspend;
2991                 pmac_agp_resume = resume;
2992                 return;
2993         }
2994         if (bridge != pmac_agp_bridge)
2995                 return;
2996         pmac_agp_suspend = pmac_agp_resume = NULL;
2997         return;
2998 }
2999 EXPORT_SYMBOL(pmac_register_agp_pm);
3000
3001 void pmac_suspend_agp_for_card(struct pci_dev *dev)
3002 {
3003         if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
3004                 return;
3005         if (pmac_agp_bridge->bus != dev->bus)
3006                 return;
3007         pmac_agp_suspend(pmac_agp_bridge);
3008 }
3009 EXPORT_SYMBOL(pmac_suspend_agp_for_card);
3010
3011 void pmac_resume_agp_for_card(struct pci_dev *dev)
3012 {
3013         if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
3014                 return;
3015         if (pmac_agp_bridge->bus != dev->bus)
3016                 return;
3017         pmac_agp_resume(pmac_agp_bridge);
3018 }
3019 EXPORT_SYMBOL(pmac_resume_agp_for_card);