powerpc/mm: Split mmu_context handling
[linux-2.6.git] / arch / powerpc / platforms / powermac / cpufreq_32.c
1 /*
2  *  Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3  *  Copyright (C) 2004        John Steele Scott <toojays@toojays.net>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * TODO: Need a big cleanup here. Basically, we need to have different
10  * cpufreq_driver structures for the different type of HW instead of the
11  * current mess. We also need to better deal with the detection of the
12  * type of machine.
13  *
14  */
15
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/sched.h>
22 #include <linux/adb.h>
23 #include <linux/pmu.h>
24 #include <linux/slab.h>
25 #include <linux/cpufreq.h>
26 #include <linux/init.h>
27 #include <linux/sysdev.h>
28 #include <linux/hardirq.h>
29 #include <asm/prom.h>
30 #include <asm/machdep.h>
31 #include <asm/irq.h>
32 #include <asm/pmac_feature.h>
33 #include <asm/mmu_context.h>
34 #include <asm/sections.h>
35 #include <asm/cputable.h>
36 #include <asm/time.h>
37 #include <asm/system.h>
38 #include <asm/mpic.h>
39 #include <asm/keylargo.h>
40
41 /* WARNING !!! This will cause calibrate_delay() to be called,
42  * but this is an __init function ! So you MUST go edit
43  * init/main.c to make it non-init before enabling DEBUG_FREQ
44  */
45 #undef DEBUG_FREQ
46
47 /*
48  * There is a problem with the core cpufreq code on SMP kernels,
49  * it won't recalculate the Bogomips properly
50  */
51 #ifdef CONFIG_SMP
52 #warning "WARNING, CPUFREQ not recommended on SMP kernels"
53 #endif
54
55 extern void low_choose_7447a_dfs(int dfs);
56 extern void low_choose_750fx_pll(int pll);
57 extern void low_sleep_handler(void);
58
59 /*
60  * Currently, PowerMac cpufreq supports only high & low frequencies
61  * that are set by the firmware
62  */
63 static unsigned int low_freq;
64 static unsigned int hi_freq;
65 static unsigned int cur_freq;
66 static unsigned int sleep_freq;
67
68 /*
69  * Different models uses different mechanisms to switch the frequency
70  */
71 static int (*set_speed_proc)(int low_speed);
72 static unsigned int (*get_speed_proc)(void);
73
74 /*
75  * Some definitions used by the various speedprocs
76  */
77 static u32 voltage_gpio;
78 static u32 frequency_gpio;
79 static u32 slew_done_gpio;
80 static int no_schedule;
81 static int has_cpu_l2lve;
82 static int is_pmu_based;
83
84 /* There are only two frequency states for each processor. Values
85  * are in kHz for the time being.
86  */
87 #define CPUFREQ_HIGH                  0
88 #define CPUFREQ_LOW                   1
89
90 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
91         {CPUFREQ_HIGH,          0},
92         {CPUFREQ_LOW,           0},
93         {0,                     CPUFREQ_TABLE_END},
94 };
95
96 static struct freq_attr* pmac_cpu_freqs_attr[] = {
97         &cpufreq_freq_attr_scaling_available_freqs,
98         NULL,
99 };
100
101 static inline void local_delay(unsigned long ms)
102 {
103         if (no_schedule)
104                 mdelay(ms);
105         else
106                 msleep(ms);
107 }
108
109 #ifdef DEBUG_FREQ
110 static inline void debug_calc_bogomips(void)
111 {
112         /* This will cause a recalc of bogomips and display the
113          * result. We backup/restore the value to avoid affecting the
114          * core cpufreq framework's own calculation.
115          */
116         unsigned long save_lpj = loops_per_jiffy;
117         calibrate_delay();
118         loops_per_jiffy = save_lpj;
119 }
120 #endif /* DEBUG_FREQ */
121
122 /* Switch CPU speed under 750FX CPU control
123  */
124 static int cpu_750fx_cpu_speed(int low_speed)
125 {
126         u32 hid2;
127
128         if (low_speed == 0) {
129                 /* ramping up, set voltage first */
130                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
131                 /* Make sure we sleep for at least 1ms */
132                 local_delay(10);
133
134                 /* tweak L2 for high voltage */
135                 if (has_cpu_l2lve) {
136                         hid2 = mfspr(SPRN_HID2);
137                         hid2 &= ~0x2000;
138                         mtspr(SPRN_HID2, hid2);
139                 }
140         }
141 #ifdef CONFIG_6xx
142         low_choose_750fx_pll(low_speed);
143 #endif
144         if (low_speed == 1) {
145                 /* tweak L2 for low voltage */
146                 if (has_cpu_l2lve) {
147                         hid2 = mfspr(SPRN_HID2);
148                         hid2 |= 0x2000;
149                         mtspr(SPRN_HID2, hid2);
150                 }
151
152                 /* ramping down, set voltage last */
153                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
154                 local_delay(10);
155         }
156
157         return 0;
158 }
159
160 static unsigned int cpu_750fx_get_cpu_speed(void)
161 {
162         if (mfspr(SPRN_HID1) & HID1_PS)
163                 return low_freq;
164         else
165                 return hi_freq;
166 }
167
168 /* Switch CPU speed using DFS */
169 static int dfs_set_cpu_speed(int low_speed)
170 {
171         if (low_speed == 0) {
172                 /* ramping up, set voltage first */
173                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
174                 /* Make sure we sleep for at least 1ms */
175                 local_delay(1);
176         }
177
178         /* set frequency */
179 #ifdef CONFIG_6xx
180         low_choose_7447a_dfs(low_speed);
181 #endif
182         udelay(100);
183
184         if (low_speed == 1) {
185                 /* ramping down, set voltage last */
186                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
187                 local_delay(1);
188         }
189
190         return 0;
191 }
192
193 static unsigned int dfs_get_cpu_speed(void)
194 {
195         if (mfspr(SPRN_HID1) & HID1_DFS)
196                 return low_freq;
197         else
198                 return hi_freq;
199 }
200
201
202 /* Switch CPU speed using slewing GPIOs
203  */
204 static int gpios_set_cpu_speed(int low_speed)
205 {
206         int gpio, timeout = 0;
207
208         /* If ramping up, set voltage first */
209         if (low_speed == 0) {
210                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
211                 /* Delay is way too big but it's ok, we schedule */
212                 local_delay(10);
213         }
214
215         /* Set frequency */
216         gpio =  pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
217         if (low_speed == ((gpio & 0x01) == 0))
218                 goto skip;
219
220         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
221                           low_speed ? 0x04 : 0x05);
222         udelay(200);
223         do {
224                 if (++timeout > 100)
225                         break;
226                 local_delay(1);
227                 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
228         } while((gpio & 0x02) == 0);
229  skip:
230         /* If ramping down, set voltage last */
231         if (low_speed == 1) {
232                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
233                 /* Delay is way too big but it's ok, we schedule */
234                 local_delay(10);
235         }
236
237 #ifdef DEBUG_FREQ
238         debug_calc_bogomips();
239 #endif
240
241         return 0;
242 }
243
244 /* Switch CPU speed under PMU control
245  */
246 static int pmu_set_cpu_speed(int low_speed)
247 {
248         struct adb_request req;
249         unsigned long save_l2cr;
250         unsigned long save_l3cr;
251         unsigned int pic_prio;
252         unsigned long flags;
253
254         preempt_disable();
255
256 #ifdef DEBUG_FREQ
257         printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
258 #endif
259         pmu_suspend();
260
261         /* Disable all interrupt sources on openpic */
262         pic_prio = mpic_cpu_get_priority();
263         mpic_cpu_set_priority(0xf);
264
265         /* Make sure the decrementer won't interrupt us */
266         asm volatile("mtdec %0" : : "r" (0x7fffffff));
267         /* Make sure any pending DEC interrupt occurring while we did
268          * the above didn't re-enable the DEC */
269         mb();
270         asm volatile("mtdec %0" : : "r" (0x7fffffff));
271
272         /* We can now disable MSR_EE */
273         local_irq_save(flags);
274
275         /* Giveup the FPU & vec */
276         enable_kernel_fp();
277
278 #ifdef CONFIG_ALTIVEC
279         if (cpu_has_feature(CPU_FTR_ALTIVEC))
280                 enable_kernel_altivec();
281 #endif /* CONFIG_ALTIVEC */
282
283         /* Save & disable L2 and L3 caches */
284         save_l3cr = _get_L3CR();        /* (returns -1 if not available) */
285         save_l2cr = _get_L2CR();        /* (returns -1 if not available) */
286
287         /* Send the new speed command. My assumption is that this command
288          * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
289          */
290         pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
291         while (!req.complete)
292                 pmu_poll();
293
294         /* Prepare the northbridge for the speed transition */
295         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
296
297         /* Call low level code to backup CPU state and recover from
298          * hardware reset
299          */
300         low_sleep_handler();
301
302         /* Restore the northbridge */
303         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
304
305         /* Restore L2 cache */
306         if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
307                 _set_L2CR(save_l2cr);
308         /* Restore L3 cache */
309         if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
310                 _set_L3CR(save_l3cr);
311
312         /* Restore userland MMU context */
313         switch_mmu_context(NULL, current->active_mm);
314
315 #ifdef DEBUG_FREQ
316         printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
317 #endif
318
319         /* Restore low level PMU operations */
320         pmu_unlock();
321
322         /* Restore decrementer */
323         wakeup_decrementer();
324
325         /* Restore interrupts */
326         mpic_cpu_set_priority(pic_prio);
327
328         /* Let interrupts flow again ... */
329         local_irq_restore(flags);
330
331 #ifdef DEBUG_FREQ
332         debug_calc_bogomips();
333 #endif
334
335         pmu_resume();
336
337         preempt_enable();
338
339         return 0;
340 }
341
342 static int do_set_cpu_speed(int speed_mode, int notify)
343 {
344         struct cpufreq_freqs freqs;
345         unsigned long l3cr;
346         static unsigned long prev_l3cr;
347
348         freqs.old = cur_freq;
349         freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
350         freqs.cpu = smp_processor_id();
351
352         if (freqs.old == freqs.new)
353                 return 0;
354
355         if (notify)
356                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
357         if (speed_mode == CPUFREQ_LOW &&
358             cpu_has_feature(CPU_FTR_L3CR)) {
359                 l3cr = _get_L3CR();
360                 if (l3cr & L3CR_L3E) {
361                         prev_l3cr = l3cr;
362                         _set_L3CR(0);
363                 }
364         }
365         set_speed_proc(speed_mode == CPUFREQ_LOW);
366         if (speed_mode == CPUFREQ_HIGH &&
367             cpu_has_feature(CPU_FTR_L3CR)) {
368                 l3cr = _get_L3CR();
369                 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
370                         _set_L3CR(prev_l3cr);
371         }
372         if (notify)
373                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
374         cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
375
376         return 0;
377 }
378
379 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
380 {
381         return cur_freq;
382 }
383
384 static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
385 {
386         return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
387 }
388
389 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
390                                         unsigned int target_freq,
391                                         unsigned int relation)
392 {
393         unsigned int    newstate = 0;
394         int             rc;
395
396         if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
397                         target_freq, relation, &newstate))
398                 return -EINVAL;
399
400         rc = do_set_cpu_speed(newstate, 1);
401
402         ppc_proc_freq = cur_freq * 1000ul;
403         return rc;
404 }
405
406 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
407 {
408         if (policy->cpu != 0)
409                 return -ENODEV;
410
411         policy->cpuinfo.transition_latency      = CPUFREQ_ETERNAL;
412         policy->cur = cur_freq;
413
414         cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
415         return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
416 }
417
418 static u32 read_gpio(struct device_node *np)
419 {
420         const u32 *reg = of_get_property(np, "reg", NULL);
421         u32 offset;
422
423         if (reg == NULL)
424                 return 0;
425         /* That works for all keylargos but shall be fixed properly
426          * some day... The problem is that it seems we can't rely
427          * on the "reg" property of the GPIO nodes, they are either
428          * relative to the base of KeyLargo or to the base of the
429          * GPIO space, and the device-tree doesn't help.
430          */
431         offset = *reg;
432         if (offset < KEYLARGO_GPIO_LEVELS0)
433                 offset += KEYLARGO_GPIO_LEVELS0;
434         return offset;
435 }
436
437 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
438 {
439         /* Ok, this could be made a bit smarter, but let's be robust for now. We
440          * always force a speed change to high speed before sleep, to make sure
441          * we have appropriate voltage and/or bus speed for the wakeup process,
442          * and to make sure our loops_per_jiffies are "good enough", that is will
443          * not cause too short delays if we sleep in low speed and wake in high
444          * speed..
445          */
446         no_schedule = 1;
447         sleep_freq = cur_freq;
448         if (cur_freq == low_freq && !is_pmu_based)
449                 do_set_cpu_speed(CPUFREQ_HIGH, 0);
450         return 0;
451 }
452
453 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
454 {
455         /* If we resume, first check if we have a get() function */
456         if (get_speed_proc)
457                 cur_freq = get_speed_proc();
458         else
459                 cur_freq = 0;
460
461         /* We don't, hrm... we don't really know our speed here, best
462          * is that we force a switch to whatever it was, which is
463          * probably high speed due to our suspend() routine
464          */
465         do_set_cpu_speed(sleep_freq == low_freq ?
466                          CPUFREQ_LOW : CPUFREQ_HIGH, 0);
467
468         ppc_proc_freq = cur_freq * 1000ul;
469
470         no_schedule = 0;
471         return 0;
472 }
473
474 static struct cpufreq_driver pmac_cpufreq_driver = {
475         .verify         = pmac_cpufreq_verify,
476         .target         = pmac_cpufreq_target,
477         .get            = pmac_cpufreq_get_speed,
478         .init           = pmac_cpufreq_cpu_init,
479         .suspend        = pmac_cpufreq_suspend,
480         .resume         = pmac_cpufreq_resume,
481         .flags          = CPUFREQ_PM_NO_WARN,
482         .attr           = pmac_cpu_freqs_attr,
483         .name           = "powermac",
484         .owner          = THIS_MODULE,
485 };
486
487
488 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
489 {
490         struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
491                                                                 "voltage-gpio");
492         struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
493                                                                 "frequency-gpio");
494         struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
495                                                                      "slewing-done");
496         const u32 *value;
497
498         /*
499          * Check to see if it's GPIO driven or PMU only
500          *
501          * The way we extract the GPIO address is slightly hackish, but it
502          * works well enough for now. We need to abstract the whole GPIO
503          * stuff sooner or later anyway
504          */
505
506         if (volt_gpio_np)
507                 voltage_gpio = read_gpio(volt_gpio_np);
508         if (freq_gpio_np)
509                 frequency_gpio = read_gpio(freq_gpio_np);
510         if (slew_done_gpio_np)
511                 slew_done_gpio = read_gpio(slew_done_gpio_np);
512
513         /* If we use the frequency GPIOs, calculate the min/max speeds based
514          * on the bus frequencies
515          */
516         if (frequency_gpio && slew_done_gpio) {
517                 int lenp, rc;
518                 const u32 *freqs, *ratio;
519
520                 freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
521                 lenp /= sizeof(u32);
522                 if (freqs == NULL || lenp != 2) {
523                         printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
524                         return 1;
525                 }
526                 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
527                                                 NULL);
528                 if (ratio == NULL) {
529                         printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
530                         return 1;
531                 }
532
533                 /* Get the min/max bus frequencies */
534                 low_freq = min(freqs[0], freqs[1]);
535                 hi_freq = max(freqs[0], freqs[1]);
536
537                 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
538                  * frequency, it claims it to be around 84Mhz on some models while
539                  * it appears to be approx. 101Mhz on all. Let's hack around here...
540                  * fortunately, we don't need to be too precise
541                  */
542                 if (low_freq < 98000000)
543                         low_freq = 101000000;
544
545                 /* Convert those to CPU core clocks */
546                 low_freq = (low_freq * (*ratio)) / 2000;
547                 hi_freq = (hi_freq * (*ratio)) / 2000;
548
549                 /* Now we get the frequencies, we read the GPIO to see what is out current
550                  * speed
551                  */
552                 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
553                 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
554
555                 set_speed_proc = gpios_set_cpu_speed;
556                 return 1;
557         }
558
559         /* If we use the PMU, look for the min & max frequencies in the
560          * device-tree
561          */
562         value = of_get_property(cpunode, "min-clock-frequency", NULL);
563         if (!value)
564                 return 1;
565         low_freq = (*value) / 1000;
566         /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
567          * here */
568         if (low_freq < 100000)
569                 low_freq *= 10;
570
571         value = of_get_property(cpunode, "max-clock-frequency", NULL);
572         if (!value)
573                 return 1;
574         hi_freq = (*value) / 1000;
575         set_speed_proc = pmu_set_cpu_speed;
576         is_pmu_based = 1;
577
578         return 0;
579 }
580
581 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
582 {
583         struct device_node *volt_gpio_np;
584
585         if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
586                 return 1;
587
588         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
589         if (volt_gpio_np)
590                 voltage_gpio = read_gpio(volt_gpio_np);
591         if (!voltage_gpio){
592                 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
593                 return 1;
594         }
595
596         /* OF only reports the high frequency */
597         hi_freq = cur_freq;
598         low_freq = cur_freq/2;
599
600         /* Read actual frequency from CPU */
601         cur_freq = dfs_get_cpu_speed();
602         set_speed_proc = dfs_set_cpu_speed;
603         get_speed_proc = dfs_get_cpu_speed;
604
605         return 0;
606 }
607
608 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
609 {
610         struct device_node *volt_gpio_np;
611         u32 pvr;
612         const u32 *value;
613
614         if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
615                 return 1;
616
617         hi_freq = cur_freq;
618         value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
619         if (!value)
620                 return 1;
621         low_freq = (*value) / 1000;
622
623         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
624         if (volt_gpio_np)
625                 voltage_gpio = read_gpio(volt_gpio_np);
626
627         pvr = mfspr(SPRN_PVR);
628         has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
629
630         set_speed_proc = cpu_750fx_cpu_speed;
631         get_speed_proc = cpu_750fx_get_cpu_speed;
632         cur_freq = cpu_750fx_get_cpu_speed();
633
634         return 0;
635 }
636
637 /* Currently, we support the following machines:
638  *
639  *  - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
640  *  - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
641  *  - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
642  *  - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
643  *  - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
644  *  - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
645  *  - Recent MacRISC3 laptops
646  *  - All new machines with 7447A CPUs
647  */
648 static int __init pmac_cpufreq_setup(void)
649 {
650         struct device_node      *cpunode;
651         const u32               *value;
652
653         if (strstr(cmd_line, "nocpufreq"))
654                 return 0;
655
656         /* Assume only one CPU */
657         cpunode = of_find_node_by_type(NULL, "cpu");
658         if (!cpunode)
659                 goto out;
660
661         /* Get current cpu clock freq */
662         value = of_get_property(cpunode, "clock-frequency", NULL);
663         if (!value)
664                 goto out;
665         cur_freq = (*value) / 1000;
666
667         /*  Check for 7447A based MacRISC3 */
668         if (machine_is_compatible("MacRISC3") &&
669             of_get_property(cpunode, "dynamic-power-step", NULL) &&
670             PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
671                 pmac_cpufreq_init_7447A(cpunode);
672         /* Check for other MacRISC3 machines */
673         } else if (machine_is_compatible("PowerBook3,4") ||
674                    machine_is_compatible("PowerBook3,5") ||
675                    machine_is_compatible("MacRISC3")) {
676                 pmac_cpufreq_init_MacRISC3(cpunode);
677         /* Else check for iBook2 500/600 */
678         } else if (machine_is_compatible("PowerBook4,1")) {
679                 hi_freq = cur_freq;
680                 low_freq = 400000;
681                 set_speed_proc = pmu_set_cpu_speed;
682                 is_pmu_based = 1;
683         }
684         /* Else check for TiPb 550 */
685         else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
686                 hi_freq = cur_freq;
687                 low_freq = 500000;
688                 set_speed_proc = pmu_set_cpu_speed;
689                 is_pmu_based = 1;
690         }
691         /* Else check for TiPb 400 & 500 */
692         else if (machine_is_compatible("PowerBook3,2")) {
693                 /* We only know about the 400 MHz and the 500Mhz model
694                  * they both have 300 MHz as low frequency
695                  */
696                 if (cur_freq < 350000 || cur_freq > 550000)
697                         goto out;
698                 hi_freq = cur_freq;
699                 low_freq = 300000;
700                 set_speed_proc = pmu_set_cpu_speed;
701                 is_pmu_based = 1;
702         }
703         /* Else check for 750FX */
704         else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
705                 pmac_cpufreq_init_750FX(cpunode);
706 out:
707         of_node_put(cpunode);
708         if (set_speed_proc == NULL)
709                 return -ENODEV;
710
711         pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
712         pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
713         ppc_proc_freq = cur_freq * 1000ul;
714
715         printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
716         printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
717                low_freq/1000, hi_freq/1000, cur_freq/1000);
718
719         return cpufreq_register_driver(&pmac_cpufreq_driver);
720 }
721
722 module_init(pmac_cpufreq_setup);
723