powerpc: Convert to new irq_* function names
[linux-2.6.git] / arch / powerpc / platforms / pasemi / setup.c
1 /*
2  * Copyright (C) 2006-2007 PA Semi, Inc
3  *
4  * Authors: Kip Walker, PA Semi
5  *          Olof Johansson, PA Semi
6  *
7  * Maintained by: Olof Johansson <olof@lixom.net>
8  *
9  * Based on arch/powerpc/platforms/maple/setup.c
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
23  */
24
25 #include <linux/errno.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/console.h>
29 #include <linux/pci.h>
30 #include <linux/of_platform.h>
31 #include <linux/gfp.h>
32
33 #include <asm/prom.h>
34 #include <asm/system.h>
35 #include <asm/iommu.h>
36 #include <asm/machdep.h>
37 #include <asm/mpic.h>
38 #include <asm/smp.h>
39 #include <asm/time.h>
40 #include <asm/mmu.h>
41
42 #include <pcmcia/ss.h>
43 #include <pcmcia/cistpl.h>
44 #include <pcmcia/ds.h>
45
46 #include "pasemi.h"
47
48 /* SDC reset register, must be pre-mapped at reset time */
49 static void __iomem *reset_reg;
50
51 /* Various error status registers, must be pre-mapped at MCE time */
52
53 #define MAX_MCE_REGS    32
54 struct mce_regs {
55         char *name;
56         void __iomem *addr;
57 };
58
59 static struct mce_regs mce_regs[MAX_MCE_REGS];
60 static int num_mce_regs;
61 static int nmi_virq = NO_IRQ;
62
63
64 static void pas_restart(char *cmd)
65 {
66         /* Need to put others cpu in hold loop so they're not sleeping */
67         smp_send_stop();
68         udelay(10000);
69         printk("Restarting...\n");
70         while (1)
71                 out_le32(reset_reg, 0x6000000);
72 }
73
74 #ifdef CONFIG_SMP
75 static arch_spinlock_t timebase_lock;
76 static unsigned long timebase;
77
78 static void __devinit pas_give_timebase(void)
79 {
80         unsigned long flags;
81
82         local_irq_save(flags);
83         hard_irq_disable();
84         arch_spin_lock(&timebase_lock);
85         mtspr(SPRN_TBCTL, TBCTL_FREEZE);
86         isync();
87         timebase = get_tb();
88         arch_spin_unlock(&timebase_lock);
89
90         while (timebase)
91                 barrier();
92         mtspr(SPRN_TBCTL, TBCTL_RESTART);
93         local_irq_restore(flags);
94 }
95
96 static void __devinit pas_take_timebase(void)
97 {
98         while (!timebase)
99                 smp_rmb();
100
101         arch_spin_lock(&timebase_lock);
102         set_tb(timebase >> 32, timebase & 0xffffffff);
103         timebase = 0;
104         arch_spin_unlock(&timebase_lock);
105 }
106
107 struct smp_ops_t pas_smp_ops = {
108         .probe          = smp_mpic_probe,
109         .message_pass   = smp_mpic_message_pass,
110         .kick_cpu       = smp_generic_kick_cpu,
111         .setup_cpu      = smp_mpic_setup_cpu,
112         .give_timebase  = pas_give_timebase,
113         .take_timebase  = pas_take_timebase,
114 };
115 #endif /* CONFIG_SMP */
116
117 void __init pas_setup_arch(void)
118 {
119 #ifdef CONFIG_SMP
120         /* Setup SMP callback */
121         smp_ops = &pas_smp_ops;
122 #endif
123         /* Lookup PCI hosts */
124         pas_pci_init();
125
126 #ifdef CONFIG_DUMMY_CONSOLE
127         conswitchp = &dummy_con;
128 #endif
129
130         /* Remap SDC register for doing reset */
131         /* XXXOJN This should maybe come out of the device tree */
132         reset_reg = ioremap(0xfc101100, 4);
133 }
134
135 static int __init pas_setup_mce_regs(void)
136 {
137         struct pci_dev *dev;
138         int reg;
139
140         /* Remap various SoC status registers for use by the MCE handler */
141
142         reg = 0;
143
144         dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, NULL);
145         while (dev && reg < MAX_MCE_REGS) {
146                 mce_regs[reg].name = kasprintf(GFP_KERNEL,
147                                                 "mc%d_mcdebug_errsta", reg);
148                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x730);
149                 dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, dev);
150                 reg++;
151         }
152
153         dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
154         if (dev && reg+4 < MAX_MCE_REGS) {
155                 mce_regs[reg].name = "iobdbg_IntStatus1";
156                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x438);
157                 reg++;
158                 mce_regs[reg].name = "iobdbg_IOCTbusIntDbgReg";
159                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x454);
160                 reg++;
161                 mce_regs[reg].name = "iobiom_IntStatus";
162                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc10);
163                 reg++;
164                 mce_regs[reg].name = "iobiom_IntDbgReg";
165                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc1c);
166                 reg++;
167         }
168
169         dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa009, NULL);
170         if (dev && reg+2 < MAX_MCE_REGS) {
171                 mce_regs[reg].name = "l2csts_IntStatus";
172                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x200);
173                 reg++;
174                 mce_regs[reg].name = "l2csts_Cnt";
175                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x214);
176                 reg++;
177         }
178
179         num_mce_regs = reg;
180
181         return 0;
182 }
183 machine_device_initcall(pasemi, pas_setup_mce_regs);
184
185 static __init void pas_init_IRQ(void)
186 {
187         struct device_node *np;
188         struct device_node *root, *mpic_node;
189         unsigned long openpic_addr;
190         const unsigned int *opprop;
191         int naddr, opplen;
192         int mpic_flags;
193         const unsigned int *nmiprop;
194         struct mpic *mpic;
195
196         mpic_node = NULL;
197
198         for_each_node_by_type(np, "interrupt-controller")
199                 if (of_device_is_compatible(np, "open-pic")) {
200                         mpic_node = np;
201                         break;
202                 }
203         if (!mpic_node)
204                 for_each_node_by_type(np, "open-pic") {
205                         mpic_node = np;
206                         break;
207                 }
208         if (!mpic_node) {
209                 printk(KERN_ERR
210                         "Failed to locate the MPIC interrupt controller\n");
211                 return;
212         }
213
214         /* Find address list in /platform-open-pic */
215         root = of_find_node_by_path("/");
216         naddr = of_n_addr_cells(root);
217         opprop = of_get_property(root, "platform-open-pic", &opplen);
218         if (!opprop) {
219                 printk(KERN_ERR "No platform-open-pic property.\n");
220                 of_node_put(root);
221                 return;
222         }
223         openpic_addr = of_read_number(opprop, naddr);
224         printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
225
226         mpic_flags = MPIC_PRIMARY | MPIC_LARGE_VECTORS | MPIC_NO_BIAS;
227
228         nmiprop = of_get_property(mpic_node, "nmi-source", NULL);
229         if (nmiprop)
230                 mpic_flags |= MPIC_ENABLE_MCK;
231
232         mpic = mpic_alloc(mpic_node, openpic_addr,
233                           mpic_flags, 0, 0, "PASEMI-OPIC");
234         BUG_ON(!mpic);
235
236         mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
237         mpic_init(mpic);
238         /* The NMI/MCK source needs to be prio 15 */
239         if (nmiprop) {
240                 nmi_virq = irq_create_mapping(NULL, *nmiprop);
241                 mpic_irq_set_priority(nmi_virq, 15);
242                 irq_set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING);
243                 mpic_unmask_irq(irq_get_irq_data(nmi_virq));
244         }
245
246         of_node_put(mpic_node);
247         of_node_put(root);
248 }
249
250 static void __init pas_progress(char *s, unsigned short hex)
251 {
252         printk("[%04x] : %s\n", hex, s ? s : "");
253 }
254
255
256 static int pas_machine_check_handler(struct pt_regs *regs)
257 {
258         int cpu = smp_processor_id();
259         unsigned long srr0, srr1, dsisr;
260         int dump_slb = 0;
261         int i;
262
263         srr0 = regs->nip;
264         srr1 = regs->msr;
265
266         if (nmi_virq != NO_IRQ && mpic_get_mcirq() == nmi_virq) {
267                 printk(KERN_ERR "NMI delivered\n");
268                 debugger(regs);
269                 mpic_end_irq(irq_get_irq_data(nmi_virq));
270                 goto out;
271         }
272
273         dsisr = mfspr(SPRN_DSISR);
274         printk(KERN_ERR "Machine Check on CPU %d\n", cpu);
275         printk(KERN_ERR "SRR0  0x%016lx SRR1 0x%016lx\n", srr0, srr1);
276         printk(KERN_ERR "DSISR 0x%016lx DAR  0x%016lx\n", dsisr, regs->dar);
277         printk(KERN_ERR "BER   0x%016lx MER  0x%016lx\n", mfspr(SPRN_PA6T_BER),
278                 mfspr(SPRN_PA6T_MER));
279         printk(KERN_ERR "IER   0x%016lx DER  0x%016lx\n", mfspr(SPRN_PA6T_IER),
280                 mfspr(SPRN_PA6T_DER));
281         printk(KERN_ERR "Cause:\n");
282
283         if (srr1 & 0x200000)
284                 printk(KERN_ERR "Signalled by SDC\n");
285
286         if (srr1 & 0x100000) {
287                 printk(KERN_ERR "Load/Store detected error:\n");
288                 if (dsisr & 0x8000)
289                         printk(KERN_ERR "D-cache ECC double-bit error or bus error\n");
290                 if (dsisr & 0x4000)
291                         printk(KERN_ERR "LSU snoop response error\n");
292                 if (dsisr & 0x2000) {
293                         printk(KERN_ERR "MMU SLB multi-hit or invalid B field\n");
294                         dump_slb = 1;
295                 }
296                 if (dsisr & 0x1000)
297                         printk(KERN_ERR "Recoverable Duptags\n");
298                 if (dsisr & 0x800)
299                         printk(KERN_ERR "Recoverable D-cache parity error count overflow\n");
300                 if (dsisr & 0x400)
301                         printk(KERN_ERR "TLB parity error count overflow\n");
302         }
303
304         if (srr1 & 0x80000)
305                 printk(KERN_ERR "Bus Error\n");
306
307         if (srr1 & 0x40000) {
308                 printk(KERN_ERR "I-side SLB multiple hit\n");
309                 dump_slb = 1;
310         }
311
312         if (srr1 & 0x20000)
313                 printk(KERN_ERR "I-cache parity error hit\n");
314
315         if (num_mce_regs == 0)
316                 printk(KERN_ERR "No MCE registers mapped yet, can't dump\n");
317         else
318                 printk(KERN_ERR "SoC debug registers:\n");
319
320         for (i = 0; i < num_mce_regs; i++)
321                 printk(KERN_ERR "%s: 0x%08x\n", mce_regs[i].name,
322                         in_le32(mce_regs[i].addr));
323
324         if (dump_slb) {
325                 unsigned long e, v;
326                 int i;
327
328                 printk(KERN_ERR "slb contents:\n");
329                 for (i = 0; i < mmu_slb_size; i++) {
330                         asm volatile("slbmfee  %0,%1" : "=r" (e) : "r" (i));
331                         asm volatile("slbmfev  %0,%1" : "=r" (v) : "r" (i));
332                         printk(KERN_ERR "%02d %016lx %016lx\n", i, e, v);
333                 }
334         }
335
336 out:
337         /* SRR1[62] is from MSR[62] if recoverable, so pass that back */
338         return !!(srr1 & 0x2);
339 }
340
341 static void __init pas_init_early(void)
342 {
343         iommu_init_early_pasemi();
344 }
345
346 #ifdef CONFIG_PCMCIA
347 static int pcmcia_notify(struct notifier_block *nb, unsigned long action,
348                          void *data)
349 {
350         struct device *dev = data;
351         struct device *parent;
352         struct pcmcia_device *pdev = to_pcmcia_dev(dev);
353
354         /* We are only intereted in device addition */
355         if (action != BUS_NOTIFY_ADD_DEVICE)
356                 return 0;
357
358         parent = pdev->socket->dev.parent;
359
360         /* We know electra_cf devices will always have of_node set, since
361          * electra_cf is an of_platform driver.
362          */
363         if (!parent->of_node)
364                 return 0;
365
366         if (!of_device_is_compatible(parent->of_node, "electra-cf"))
367                 return 0;
368
369         /* We use the direct ops for localbus */
370         dev->archdata.dma_ops = &dma_direct_ops;
371
372         return 0;
373 }
374
375 static struct notifier_block pcmcia_notifier = {
376         .notifier_call = pcmcia_notify,
377 };
378
379 static inline void pasemi_pcmcia_init(void)
380 {
381         extern struct bus_type pcmcia_bus_type;
382
383         bus_register_notifier(&pcmcia_bus_type, &pcmcia_notifier);
384 }
385
386 #else
387
388 static inline void pasemi_pcmcia_init(void)
389 {
390 }
391
392 #endif
393
394
395 static struct of_device_id pasemi_bus_ids[] = {
396         /* Unfortunately needed for legacy firmwares */
397         { .type = "localbus", },
398         { .type = "sdc", },
399         /* These are the proper entries, which newer firmware uses */
400         { .compatible = "pasemi,localbus", },
401         { .compatible = "pasemi,sdc", },
402         {},
403 };
404
405 static int __init pasemi_publish_devices(void)
406 {
407         pasemi_pcmcia_init();
408
409         /* Publish OF platform devices for SDC and other non-PCI devices */
410         of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
411
412         return 0;
413 }
414 machine_device_initcall(pasemi, pasemi_publish_devices);
415
416
417 /*
418  * Called very early, MMU is off, device-tree isn't unflattened
419  */
420 static int __init pas_probe(void)
421 {
422         unsigned long root = of_get_flat_dt_root();
423
424         if (!of_flat_dt_is_compatible(root, "PA6T-1682M") &&
425             !of_flat_dt_is_compatible(root, "pasemi,pwrficient"))
426                 return 0;
427
428         hpte_init_native();
429
430         alloc_iobmap_l2();
431
432         return 1;
433 }
434
435 define_machine(pasemi) {
436         .name                   = "PA Semi PWRficient",
437         .probe                  = pas_probe,
438         .setup_arch             = pas_setup_arch,
439         .init_early             = pas_init_early,
440         .init_IRQ               = pas_init_IRQ,
441         .get_irq                = mpic_get_irq,
442         .restart                = pas_restart,
443         .get_boot_time          = pas_get_boot_time,
444         .calibrate_decr         = generic_calibrate_decr,
445         .progress               = pas_progress,
446         .machine_check_exception = pas_machine_check_handler,
447 };