638747c772f84217697b246231ff955b524b1ab5
[linux-2.6.git] / arch / powerpc / platforms / iseries / setup.c
1 /*
2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4  *
5  *    Description:
6  *      Architecture- / platform-specific boot-time initialization code for
7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9  *      <dan@net4x.com>.
10  *
11  *      This program is free software; you can redistribute it and/or
12  *      modify it under the terms of the GNU General Public License
13  *      as published by the Free Software Foundation; either version
14  *      2 of the License, or (at your option) any later version.
15  */
16
17 #undef DEBUG
18
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/initrd.h>
26 #include <linux/seq_file.h>
27 #include <linux/kdev_t.h>
28 #include <linux/major.h>
29 #include <linux/root_dev.h>
30
31 #include <asm/processor.h>
32 #include <asm/machdep.h>
33 #include <asm/page.h>
34 #include <asm/mmu.h>
35 #include <asm/pgtable.h>
36 #include <asm/mmu_context.h>
37 #include <asm/cputable.h>
38 #include <asm/sections.h>
39 #include <asm/iommu.h>
40 #include <asm/firmware.h>
41
42 #include <asm/time.h>
43 #include <asm/naca.h>
44 #include <asm/paca.h>
45 #include <asm/cache.h>
46 #include <asm/sections.h>
47 #include <asm/abs_addr.h>
48 #include <asm/iseries/hv_lp_config.h>
49 #include <asm/iseries/hv_call_event.h>
50 #include <asm/iseries/hv_call_xm.h>
51 #include <asm/iSeries/ItLpQueue.h>
52 #include <asm/iSeries/mf.h>
53 #include <asm/iSeries/HvLpEvent.h>
54 #include <asm/iSeries/LparMap.h>
55
56 #include "setup.h"
57 #include "irq.h"
58 #include "vpd_areas.h"
59 #include "processor_vpd.h"
60 #include "main_store.h"
61 #include "call_sm.h"
62 #include "call_hpt.h"
63
64 extern void hvlog(char *fmt, ...);
65
66 #ifdef DEBUG
67 #define DBG(fmt...) hvlog(fmt)
68 #else
69 #define DBG(fmt...)
70 #endif
71
72 /* Function Prototypes */
73 extern void ppcdbg_initialize(void);
74
75 static void build_iSeries_Memory_Map(void);
76 static void iseries_shared_idle(void);
77 static void iseries_dedicated_idle(void);
78 #ifdef CONFIG_PCI
79 extern void iSeries_pci_final_fixup(void);
80 #else
81 static void iSeries_pci_final_fixup(void) { }
82 #endif
83
84 /* Global Variables */
85 int piranha_simulator;
86
87 extern int rd_size;             /* Defined in drivers/block/rd.c */
88 extern unsigned long klimit;
89 extern unsigned long embedded_sysmap_start;
90 extern unsigned long embedded_sysmap_end;
91
92 extern unsigned long iSeries_recal_tb;
93 extern unsigned long iSeries_recal_titan;
94
95 static int mf_initialized;
96
97 struct MemoryBlock {
98         unsigned long absStart;
99         unsigned long absEnd;
100         unsigned long logicalStart;
101         unsigned long logicalEnd;
102 };
103
104 /*
105  * Process the main store vpd to determine where the holes in memory are
106  * and return the number of physical blocks and fill in the array of
107  * block data.
108  */
109 static unsigned long iSeries_process_Condor_mainstore_vpd(
110                 struct MemoryBlock *mb_array, unsigned long max_entries)
111 {
112         unsigned long holeFirstChunk, holeSizeChunks;
113         unsigned long numMemoryBlocks = 1;
114         struct IoHriMainStoreSegment4 *msVpd =
115                 (struct IoHriMainStoreSegment4 *)xMsVpd;
116         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
117         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
118         unsigned long holeSize = holeEnd - holeStart;
119
120         printk("Mainstore_VPD: Condor\n");
121         /*
122          * Determine if absolute memory has any
123          * holes so that we can interpret the
124          * access map we get back from the hypervisor
125          * correctly.
126          */
127         mb_array[0].logicalStart = 0;
128         mb_array[0].logicalEnd = 0x100000000;
129         mb_array[0].absStart = 0;
130         mb_array[0].absEnd = 0x100000000;
131
132         if (holeSize) {
133                 numMemoryBlocks = 2;
134                 holeStart = holeStart & 0x000fffffffffffff;
135                 holeStart = addr_to_chunk(holeStart);
136                 holeFirstChunk = holeStart;
137                 holeSize = addr_to_chunk(holeSize);
138                 holeSizeChunks = holeSize;
139                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
140                                 holeFirstChunk, holeSizeChunks );
141                 mb_array[0].logicalEnd = holeFirstChunk;
142                 mb_array[0].absEnd = holeFirstChunk;
143                 mb_array[1].logicalStart = holeFirstChunk;
144                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
145                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
146                 mb_array[1].absEnd = 0x100000000;
147         }
148         return numMemoryBlocks;
149 }
150
151 #define MaxSegmentAreas                 32
152 #define MaxSegmentAdrRangeBlocks        128
153 #define MaxAreaRangeBlocks              4
154
155 static unsigned long iSeries_process_Regatta_mainstore_vpd(
156                 struct MemoryBlock *mb_array, unsigned long max_entries)
157 {
158         struct IoHriMainStoreSegment5 *msVpdP =
159                 (struct IoHriMainStoreSegment5 *)xMsVpd;
160         unsigned long numSegmentBlocks = 0;
161         u32 existsBits = msVpdP->msAreaExists;
162         unsigned long area_num;
163
164         printk("Mainstore_VPD: Regatta\n");
165
166         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
167                 unsigned long numAreaBlocks;
168                 struct IoHriMainStoreArea4 *currentArea;
169
170                 if (existsBits & 0x80000000) {
171                         unsigned long block_num;
172
173                         currentArea = &msVpdP->msAreaArray[area_num];
174                         numAreaBlocks = currentArea->numAdrRangeBlocks;
175                         printk("ms_vpd: processing area %2ld  blocks=%ld",
176                                         area_num, numAreaBlocks);
177                         for (block_num = 0; block_num < numAreaBlocks;
178                                         ++block_num ) {
179                                 /* Process an address range block */
180                                 struct MemoryBlock tempBlock;
181                                 unsigned long i;
182
183                                 tempBlock.absStart =
184                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
185                                 tempBlock.absEnd =
186                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
187                                 tempBlock.logicalStart = 0;
188                                 tempBlock.logicalEnd   = 0;
189                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
190                                                 block_num, tempBlock.absStart,
191                                                 tempBlock.absEnd);
192
193                                 for (i = 0; i < numSegmentBlocks; ++i) {
194                                         if (mb_array[i].absStart ==
195                                                         tempBlock.absStart)
196                                                 break;
197                                 }
198                                 if (i == numSegmentBlocks) {
199                                         if (numSegmentBlocks == max_entries)
200                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
201                                         mb_array[numSegmentBlocks] = tempBlock;
202                                         ++numSegmentBlocks;
203                                 } else
204                                         printk(" (duplicate)");
205                         }
206                         printk("\n");
207                 }
208                 existsBits <<= 1;
209         }
210         /* Now sort the blocks found into ascending sequence */
211         if (numSegmentBlocks > 1) {
212                 unsigned long m, n;
213
214                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
215                         for (n = numSegmentBlocks - 1; m < n; --n) {
216                                 if (mb_array[n].absStart <
217                                                 mb_array[n-1].absStart) {
218                                         struct MemoryBlock tempBlock;
219
220                                         tempBlock = mb_array[n];
221                                         mb_array[n] = mb_array[n-1];
222                                         mb_array[n-1] = tempBlock;
223                                 }
224                         }
225                 }
226         }
227         /*
228          * Assign "logical" addresses to each block.  These
229          * addresses correspond to the hypervisor "bitmap" space.
230          * Convert all addresses into units of 256K chunks.
231          */
232         {
233         unsigned long i, nextBitmapAddress;
234
235         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
236         nextBitmapAddress = 0;
237         for (i = 0; i < numSegmentBlocks; ++i) {
238                 unsigned long length = mb_array[i].absEnd -
239                         mb_array[i].absStart;
240
241                 mb_array[i].logicalStart = nextBitmapAddress;
242                 mb_array[i].logicalEnd = nextBitmapAddress + length;
243                 nextBitmapAddress += length;
244                 printk("          Bitmap range: %016lx - %016lx\n"
245                                 "        Absolute range: %016lx - %016lx\n",
246                                 mb_array[i].logicalStart,
247                                 mb_array[i].logicalEnd,
248                                 mb_array[i].absStart, mb_array[i].absEnd);
249                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
250                                 0x000fffffffffffff);
251                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
252                                 0x000fffffffffffff);
253                 mb_array[i].logicalStart =
254                         addr_to_chunk(mb_array[i].logicalStart);
255                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
256         }
257         }
258
259         return numSegmentBlocks;
260 }
261
262 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
263                 unsigned long max_entries)
264 {
265         unsigned long i;
266         unsigned long mem_blocks = 0;
267
268         if (cpu_has_feature(CPU_FTR_SLB))
269                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
270                                 max_entries);
271         else
272                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
273                                 max_entries);
274
275         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
276         for (i = 0; i < mem_blocks; ++i) {
277                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
278                        "                             abs chunks %016lx - %016lx\n",
279                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
280                         mb_array[i].absStart, mb_array[i].absEnd);
281         }
282         return mem_blocks;
283 }
284
285 static void __init iSeries_get_cmdline(void)
286 {
287         char *p, *q;
288
289         /* copy the command line parameter from the primary VSP  */
290         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
291                         HvLpDma_Direction_RemoteToLocal);
292
293         p = cmd_line;
294         q = cmd_line + 255;
295         while(p < q) {
296                 if (!*p || *p == '\n')
297                         break;
298                 ++p;
299         }
300         *p = 0;
301 }
302
303 static void __init iSeries_init_early(void)
304 {
305         DBG(" -> iSeries_init_early()\n");
306
307         ppc64_firmware_features = FW_FEATURE_ISERIES;
308
309         ppcdbg_initialize();
310
311         ppc64_interrupt_controller = IC_ISERIES;
312
313 #if defined(CONFIG_BLK_DEV_INITRD)
314         /*
315          * If the init RAM disk has been configured and there is
316          * a non-zero starting address for it, set it up
317          */
318         if (naca.xRamDisk) {
319                 initrd_start = (unsigned long)__va(naca.xRamDisk);
320                 initrd_end = initrd_start + naca.xRamDiskSize * PAGE_SIZE;
321                 initrd_below_start_ok = 1;      // ramdisk in kernel space
322                 ROOT_DEV = Root_RAM0;
323                 if (((rd_size * 1024) / PAGE_SIZE) < naca.xRamDiskSize)
324                         rd_size = (naca.xRamDiskSize * PAGE_SIZE) / 1024;
325         } else
326 #endif /* CONFIG_BLK_DEV_INITRD */
327         {
328             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
329         }
330
331         iSeries_recal_tb = get_tb();
332         iSeries_recal_titan = HvCallXm_loadTod();
333
334         /*
335          * Initialize the hash table management pointers
336          */
337         hpte_init_iSeries();
338
339         /*
340          * Initialize the DMA/TCE management
341          */
342         iommu_init_early_iSeries();
343
344         iSeries_get_cmdline();
345
346         /* Save unparsed command line copy for /proc/cmdline */
347         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
348
349         /* Parse early parameters, in particular mem=x */
350         parse_early_param();
351
352         if (memory_limit) {
353                 if (memory_limit < systemcfg->physicalMemorySize)
354                         systemcfg->physicalMemorySize = memory_limit;
355                 else {
356                         printk("Ignoring mem=%lu >= ram_top.\n", memory_limit);
357                         memory_limit = 0;
358                 }
359         }
360
361         /* Initialize machine-dependency vectors */
362 #ifdef CONFIG_SMP
363         smp_init_iSeries();
364 #endif
365         if (itLpNaca.xPirEnvironMode == 0)
366                 piranha_simulator = 1;
367
368         /* Associate Lp Event Queue 0 with processor 0 */
369         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
370
371         mf_init();
372         mf_initialized = 1;
373         mb();
374
375         /* If we were passed an initrd, set the ROOT_DEV properly if the values
376          * look sensible. If not, clear initrd reference.
377          */
378 #ifdef CONFIG_BLK_DEV_INITRD
379         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
380             initrd_end > initrd_start)
381                 ROOT_DEV = Root_RAM0;
382         else
383                 initrd_start = initrd_end = 0;
384 #endif /* CONFIG_BLK_DEV_INITRD */
385
386         DBG(" <- iSeries_init_early()\n");
387 }
388
389 struct mschunks_map mschunks_map = {
390         /* XXX We don't use these, but Piranha might need them. */
391         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
392         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
393         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
394 };
395 EXPORT_SYMBOL(mschunks_map);
396
397 void mschunks_alloc(unsigned long num_chunks)
398 {
399         klimit = _ALIGN(klimit, sizeof(u32));
400         mschunks_map.mapping = (u32 *)klimit;
401         klimit += num_chunks * sizeof(u32);
402         mschunks_map.num_chunks = num_chunks;
403 }
404
405 /*
406  * The iSeries may have very large memories ( > 128 GB ) and a partition
407  * may get memory in "chunks" that may be anywhere in the 2**52 real
408  * address space.  The chunks are 256K in size.  To map this to the
409  * memory model Linux expects, the AS/400 specific code builds a
410  * translation table to translate what Linux thinks are "physical"
411  * addresses to the actual real addresses.  This allows us to make
412  * it appear to Linux that we have contiguous memory starting at
413  * physical address zero while in fact this could be far from the truth.
414  * To avoid confusion, I'll let the words physical and/or real address
415  * apply to the Linux addresses while I'll use "absolute address" to
416  * refer to the actual hardware real address.
417  *
418  * build_iSeries_Memory_Map gets information from the Hypervisor and
419  * looks at the Main Store VPD to determine the absolute addresses
420  * of the memory that has been assigned to our partition and builds
421  * a table used to translate Linux's physical addresses to these
422  * absolute addresses.  Absolute addresses are needed when
423  * communicating with the hypervisor (e.g. to build HPT entries)
424  */
425
426 static void __init build_iSeries_Memory_Map(void)
427 {
428         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
429         u32 nextPhysChunk;
430         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
431         u32 totalChunks,moreChunks;
432         u32 currChunk, thisChunk, absChunk;
433         u32 currDword;
434         u32 chunkBit;
435         u64 map;
436         struct MemoryBlock mb[32];
437         unsigned long numMemoryBlocks, curBlock;
438
439         /* Chunk size on iSeries is 256K bytes */
440         totalChunks = (u32)HvLpConfig_getMsChunks();
441         mschunks_alloc(totalChunks);
442
443         /*
444          * Get absolute address of our load area
445          * and map it to physical address 0
446          * This guarantees that the loadarea ends up at physical 0
447          * otherwise, it might not be returned by PLIC as the first
448          * chunks
449          */
450
451         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
452         loadAreaSize =  itLpNaca.xLoadAreaChunks;
453
454         /*
455          * Only add the pages already mapped here.
456          * Otherwise we might add the hpt pages
457          * The rest of the pages of the load area
458          * aren't in the HPT yet and can still
459          * be assigned an arbitrary physical address
460          */
461         if ((loadAreaSize * 64) > HvPagesToMap)
462                 loadAreaSize = HvPagesToMap / 64;
463
464         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
465
466         /*
467          * TODO Do we need to do something if the HPT is in the 64MB load area?
468          * This would be required if the itLpNaca.xLoadAreaChunks includes
469          * the HPT size
470          */
471
472         printk("Mapping load area - physical addr = 0000000000000000\n"
473                 "                    absolute addr = %016lx\n",
474                 chunk_to_addr(loadAreaFirstChunk));
475         printk("Load area size %dK\n", loadAreaSize * 256);
476
477         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
478                 mschunks_map.mapping[nextPhysChunk] =
479                         loadAreaFirstChunk + nextPhysChunk;
480
481         /*
482          * Get absolute address of our HPT and remember it so
483          * we won't map it to any physical address
484          */
485         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
486         hptSizePages = (u32)HvCallHpt_getHptPages();
487         hptSizeChunks = hptSizePages >> (MSCHUNKS_CHUNK_SHIFT - PAGE_SHIFT);
488         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
489
490         printk("HPT absolute addr = %016lx, size = %dK\n",
491                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
492
493         ppc64_pft_size = __ilog2(hptSizePages * PAGE_SIZE);
494
495         /*
496          * The actual hashed page table is in the hypervisor,
497          * we have no direct access
498          */
499         htab_address = NULL;
500
501         /*
502          * Determine if absolute memory has any
503          * holes so that we can interpret the
504          * access map we get back from the hypervisor
505          * correctly.
506          */
507         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
508
509         /*
510          * Process the main store access map from the hypervisor
511          * to build up our physical -> absolute translation table
512          */
513         curBlock = 0;
514         currChunk = 0;
515         currDword = 0;
516         moreChunks = totalChunks;
517
518         while (moreChunks) {
519                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
520                                 currDword);
521                 thisChunk = currChunk;
522                 while (map) {
523                         chunkBit = map >> 63;
524                         map <<= 1;
525                         if (chunkBit) {
526                                 --moreChunks;
527                                 while (thisChunk >= mb[curBlock].logicalEnd) {
528                                         ++curBlock;
529                                         if (curBlock >= numMemoryBlocks)
530                                                 panic("out of memory blocks");
531                                 }
532                                 if (thisChunk < mb[curBlock].logicalStart)
533                                         panic("memory block error");
534
535                                 absChunk = mb[curBlock].absStart +
536                                         (thisChunk - mb[curBlock].logicalStart);
537                                 if (((absChunk < hptFirstChunk) ||
538                                      (absChunk > hptLastChunk)) &&
539                                     ((absChunk < loadAreaFirstChunk) ||
540                                      (absChunk > loadAreaLastChunk))) {
541                                         mschunks_map.mapping[nextPhysChunk] =
542                                                 absChunk;
543                                         ++nextPhysChunk;
544                                 }
545                         }
546                         ++thisChunk;
547                 }
548                 ++currDword;
549                 currChunk += 64;
550         }
551
552         /*
553          * main store size (in chunks) is
554          *   totalChunks - hptSizeChunks
555          * which should be equal to
556          *   nextPhysChunk
557          */
558         systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
559 }
560
561 /*
562  * Document me.
563  */
564 static void __init iSeries_setup_arch(void)
565 {
566         unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
567
568         if (get_paca()->lppaca.shared_proc) {
569                 ppc_md.idle_loop = iseries_shared_idle;
570                 printk(KERN_INFO "Using shared processor idle loop\n");
571         } else {
572                 ppc_md.idle_loop = iseries_dedicated_idle;
573                 printk(KERN_INFO "Using dedicated idle loop\n");
574         }
575
576         /* Setup the Lp Event Queue */
577         setup_hvlpevent_queue();
578
579         printk("Max  logical processors = %d\n",
580                         itVpdAreas.xSlicMaxLogicalProcs);
581         printk("Max physical processors = %d\n",
582                         itVpdAreas.xSlicMaxPhysicalProcs);
583
584         systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
585         printk("Processor version = %x\n", systemcfg->processor);
586 }
587
588 static void iSeries_show_cpuinfo(struct seq_file *m)
589 {
590         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
591 }
592
593 /*
594  * Document me.
595  * and Implement me.
596  */
597 static int iSeries_get_irq(struct pt_regs *regs)
598 {
599         /* -2 means ignore this interrupt */
600         return -2;
601 }
602
603 /*
604  * Document me.
605  */
606 static void iSeries_restart(char *cmd)
607 {
608         mf_reboot();
609 }
610
611 /*
612  * Document me.
613  */
614 static void iSeries_power_off(void)
615 {
616         mf_power_off();
617 }
618
619 /*
620  * Document me.
621  */
622 static void iSeries_halt(void)
623 {
624         mf_power_off();
625 }
626
627 static void __init iSeries_progress(char * st, unsigned short code)
628 {
629         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
630         if (!piranha_simulator && mf_initialized) {
631                 if (code != 0xffff)
632                         mf_display_progress(code);
633                 else
634                         mf_clear_src();
635         }
636 }
637
638 static void __init iSeries_fixup_klimit(void)
639 {
640         /*
641          * Change klimit to take into account any ram disk
642          * that may be included
643          */
644         if (naca.xRamDisk)
645                 klimit = KERNELBASE + (u64)naca.xRamDisk +
646                         (naca.xRamDiskSize * PAGE_SIZE);
647         else {
648                 /*
649                  * No ram disk was included - check and see if there
650                  * was an embedded system map.  Change klimit to take
651                  * into account any embedded system map
652                  */
653                 if (embedded_sysmap_end)
654                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
655                                         0xfffffffffffff000);
656         }
657 }
658
659 static int __init iSeries_src_init(void)
660 {
661         /* clear the progress line */
662         ppc_md.progress(" ", 0xffff);
663         return 0;
664 }
665
666 late_initcall(iSeries_src_init);
667
668 static inline void process_iSeries_events(void)
669 {
670         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
671 }
672
673 static void yield_shared_processor(void)
674 {
675         unsigned long tb;
676
677         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
678                                     HvCall_MaskLpEvent |
679                                     HvCall_MaskLpProd |
680                                     HvCall_MaskTimeout);
681
682         tb = get_tb();
683         /* Compute future tb value when yield should expire */
684         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
685
686         /*
687          * The decrementer stops during the yield.  Force a fake decrementer
688          * here and let the timer_interrupt code sort out the actual time.
689          */
690         get_paca()->lppaca.int_dword.fields.decr_int = 1;
691         process_iSeries_events();
692 }
693
694 static void iseries_shared_idle(void)
695 {
696         while (1) {
697                 while (!need_resched() && !hvlpevent_is_pending()) {
698                         local_irq_disable();
699                         ppc64_runlatch_off();
700
701                         /* Recheck with irqs off */
702                         if (!need_resched() && !hvlpevent_is_pending())
703                                 yield_shared_processor();
704
705                         HMT_medium();
706                         local_irq_enable();
707                 }
708
709                 ppc64_runlatch_on();
710
711                 if (hvlpevent_is_pending())
712                         process_iSeries_events();
713
714                 schedule();
715         }
716 }
717
718 static void iseries_dedicated_idle(void)
719 {
720         long oldval;
721
722         while (1) {
723                 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
724
725                 if (!oldval) {
726                         set_thread_flag(TIF_POLLING_NRFLAG);
727
728                         while (!need_resched()) {
729                                 ppc64_runlatch_off();
730                                 HMT_low();
731
732                                 if (hvlpevent_is_pending()) {
733                                         HMT_medium();
734                                         ppc64_runlatch_on();
735                                         process_iSeries_events();
736                                 }
737                         }
738
739                         HMT_medium();
740                         clear_thread_flag(TIF_POLLING_NRFLAG);
741                 } else {
742                         set_need_resched();
743                 }
744
745                 ppc64_runlatch_on();
746                 schedule();
747         }
748 }
749
750 #ifndef CONFIG_PCI
751 void __init iSeries_init_IRQ(void) { }
752 #endif
753
754 static int __init iseries_probe(int platform)
755 {
756         return PLATFORM_ISERIES_LPAR == platform;
757 }
758
759 struct machdep_calls __initdata iseries_md = {
760         .setup_arch     = iSeries_setup_arch,
761         .show_cpuinfo   = iSeries_show_cpuinfo,
762         .init_IRQ       = iSeries_init_IRQ,
763         .get_irq        = iSeries_get_irq,
764         .init_early     = iSeries_init_early,
765         .pcibios_fixup  = iSeries_pci_final_fixup,
766         .restart        = iSeries_restart,
767         .power_off      = iSeries_power_off,
768         .halt           = iSeries_halt,
769         .get_boot_time  = iSeries_get_boot_time,
770         .set_rtc_time   = iSeries_set_rtc_time,
771         .get_rtc_time   = iSeries_get_rtc_time,
772         .calibrate_decr = generic_calibrate_decr,
773         .progress       = iSeries_progress,
774         .probe          = iseries_probe,
775         /* XXX Implement enable_pmcs for iSeries */
776 };
777
778 struct blob {
779         unsigned char data[PAGE_SIZE];
780         unsigned long next;
781 };
782
783 struct iseries_flat_dt {
784         struct boot_param_header header;
785         u64 reserve_map[2];
786         struct blob dt;
787         struct blob strings;
788 };
789
790 struct iseries_flat_dt iseries_dt;
791
792 void dt_init(struct iseries_flat_dt *dt)
793 {
794         dt->header.off_mem_rsvmap =
795                 offsetof(struct iseries_flat_dt, reserve_map);
796         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
797         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
798         dt->header.totalsize = sizeof(struct iseries_flat_dt);
799         dt->header.dt_strings_size = sizeof(struct blob);
800
801         /* There is no notion of hardware cpu id on iSeries */
802         dt->header.boot_cpuid_phys = smp_processor_id();
803
804         dt->dt.next = (unsigned long)&dt->dt.data;
805         dt->strings.next = (unsigned long)&dt->strings.data;
806
807         dt->header.magic = OF_DT_HEADER;
808         dt->header.version = 0x10;
809         dt->header.last_comp_version = 0x10;
810
811         dt->reserve_map[0] = 0;
812         dt->reserve_map[1] = 0;
813 }
814
815 void dt_check_blob(struct blob *b)
816 {
817         if (b->next >= (unsigned long)&b->next) {
818                 DBG("Ran out of space in flat device tree blob!\n");
819                 BUG();
820         }
821 }
822
823 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
824 {
825         *((u32*)dt->dt.next) = value;
826         dt->dt.next += sizeof(u32);
827
828         dt_check_blob(&dt->dt);
829 }
830
831 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
832 {
833         *((u64*)dt->dt.next) = value;
834         dt->dt.next += sizeof(u64);
835
836         dt_check_blob(&dt->dt);
837 }
838
839 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
840 {
841         unsigned long start = blob->next - (unsigned long)blob->data;
842
843         memcpy((char *)blob->next, data, len);
844         blob->next = _ALIGN(blob->next + len, 4);
845
846         dt_check_blob(blob);
847
848         return start;
849 }
850
851 void dt_start_node(struct iseries_flat_dt *dt, char *name)
852 {
853         dt_push_u32(dt, OF_DT_BEGIN_NODE);
854         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
855 }
856
857 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
858
859 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
860 {
861         unsigned long offset;
862
863         dt_push_u32(dt, OF_DT_PROP);
864
865         /* Length of the data */
866         dt_push_u32(dt, len);
867
868         /* Put the property name in the string blob. */
869         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
870
871         /* The offset of the properties name in the string blob. */
872         dt_push_u32(dt, (u32)offset);
873
874         /* The actual data. */
875         dt_push_bytes(&dt->dt, data, len);
876 }
877
878 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
879 {
880         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
881 }
882
883 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
884 {
885         dt_prop(dt, name, (char *)&data, sizeof(u32));
886 }
887
888 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
889 {
890         dt_prop(dt, name, (char *)&data, sizeof(u64));
891 }
892
893 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
894 {
895         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
896 }
897
898 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
899 {
900         dt_prop(dt, name, NULL, 0);
901 }
902
903 void dt_cpus(struct iseries_flat_dt *dt)
904 {
905         unsigned char buf[32];
906         unsigned char *p;
907         unsigned int i, index;
908         struct IoHriProcessorVpd *d;
909
910         /* yuck */
911         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
912         p = strchr(buf, ' ');
913         if (!p) p = buf + strlen(buf);
914
915         dt_start_node(dt, "cpus");
916         dt_prop_u32(dt, "#address-cells", 1);
917         dt_prop_u32(dt, "#size-cells", 0);
918
919         for (i = 0; i < NR_CPUS; i++) {
920                 if (paca[i].lppaca.dyn_proc_status >= 2)
921                         continue;
922
923                 snprintf(p, 32 - (p - buf), "@%d", i);
924                 dt_start_node(dt, buf);
925
926                 dt_prop_str(dt, "device_type", "cpu");
927
928                 index = paca[i].lppaca.dyn_hv_phys_proc_index;
929                 d = &xIoHriProcessorVpd[index];
930
931                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
932                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
933
934                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
935                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
936
937                 /* magic conversions to Hz copied from old code */
938                 dt_prop_u32(dt, "clock-frequency",
939                         ((1UL << 34) * 1000000) / d->xProcFreq);
940                 dt_prop_u32(dt, "timebase-frequency",
941                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
942
943                 dt_prop_u32(dt, "reg", i);
944
945                 dt_end_node(dt);
946         }
947
948         dt_end_node(dt);
949 }
950
951 void build_flat_dt(struct iseries_flat_dt *dt)
952 {
953         u64 tmp[2];
954
955         dt_init(dt);
956
957         dt_start_node(dt, "");
958
959         dt_prop_u32(dt, "#address-cells", 2);
960         dt_prop_u32(dt, "#size-cells", 2);
961
962         /* /memory */
963         dt_start_node(dt, "memory@0");
964         dt_prop_str(dt, "name", "memory");
965         dt_prop_str(dt, "device_type", "memory");
966         tmp[0] = 0;
967         tmp[1] = systemcfg->physicalMemorySize;
968         dt_prop_u64_list(dt, "reg", tmp, 2);
969         dt_end_node(dt);
970
971         /* /chosen */
972         dt_start_node(dt, "chosen");
973         dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
974         dt_end_node(dt);
975
976         dt_cpus(dt);
977
978         dt_end_node(dt);
979
980         dt_push_u32(dt, OF_DT_END);
981 }
982
983 void * __init iSeries_early_setup(void)
984 {
985         iSeries_fixup_klimit();
986
987         /*
988          * Initialize the table which translate Linux physical addresses to
989          * AS/400 absolute addresses
990          */
991         build_iSeries_Memory_Map();
992
993         build_flat_dt(&iseries_dt);
994
995         return (void *) __pa(&iseries_dt);
996 }