b1e90a15155a760b4ff168eb9a73fecf29a3a631
[linux-2.6.git] / arch / powerpc / kvm / booke.c
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright IBM Corp. 2007
16  *
17  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19  */
20
21 #include <linux/errno.h>
22 #include <linux/err.h>
23 #include <linux/kvm_host.h>
24 #include <linux/module.h>
25 #include <linux/vmalloc.h>
26 #include <linux/fs.h>
27 #include <asm/cputable.h>
28 #include <asm/uaccess.h>
29 #include <asm/kvm_ppc.h>
30 #include <asm/cacheflush.h>
31
32 #include "44x_tlb.h"
33
34 unsigned long kvmppc_booke_handlers;
35
36 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
37 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
38
39 struct kvm_stats_debugfs_item debugfs_entries[] = {
40         { "exits",      VCPU_STAT(sum_exits) },
41         { "mmio",       VCPU_STAT(mmio_exits) },
42         { "dcr",        VCPU_STAT(dcr_exits) },
43         { "sig",        VCPU_STAT(signal_exits) },
44         { "light",      VCPU_STAT(light_exits) },
45         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
46         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
47         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
48         { "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
49         { "sysc",       VCPU_STAT(syscall_exits) },
50         { "isi",        VCPU_STAT(isi_exits) },
51         { "dsi",        VCPU_STAT(dsi_exits) },
52         { "inst_emu",   VCPU_STAT(emulated_inst_exits) },
53         { "dec",        VCPU_STAT(dec_exits) },
54         { "ext_intr",   VCPU_STAT(ext_intr_exits) },
55         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
56         { NULL }
57 };
58
59 static const u32 interrupt_msr_mask[16] = {
60         [BOOKE_INTERRUPT_CRITICAL]      = MSR_ME,
61         [BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
62         [BOOKE_INTERRUPT_DATA_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
63         [BOOKE_INTERRUPT_INST_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
64         [BOOKE_INTERRUPT_EXTERNAL]      = MSR_CE|MSR_ME|MSR_DE,
65         [BOOKE_INTERRUPT_ALIGNMENT]     = MSR_CE|MSR_ME|MSR_DE,
66         [BOOKE_INTERRUPT_PROGRAM]       = MSR_CE|MSR_ME|MSR_DE,
67         [BOOKE_INTERRUPT_FP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
68         [BOOKE_INTERRUPT_SYSCALL]       = MSR_CE|MSR_ME|MSR_DE,
69         [BOOKE_INTERRUPT_AP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
70         [BOOKE_INTERRUPT_DECREMENTER]   = MSR_CE|MSR_ME|MSR_DE,
71         [BOOKE_INTERRUPT_FIT]           = MSR_CE|MSR_ME|MSR_DE,
72         [BOOKE_INTERRUPT_WATCHDOG]      = MSR_ME,
73         [BOOKE_INTERRUPT_DTLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
74         [BOOKE_INTERRUPT_ITLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
75         [BOOKE_INTERRUPT_DEBUG]         = MSR_ME,
76 };
77
78 const unsigned char exception_priority[] = {
79         [BOOKE_INTERRUPT_DATA_STORAGE] = 0,
80         [BOOKE_INTERRUPT_INST_STORAGE] = 1,
81         [BOOKE_INTERRUPT_ALIGNMENT] = 2,
82         [BOOKE_INTERRUPT_PROGRAM] = 3,
83         [BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
84         [BOOKE_INTERRUPT_SYSCALL] = 5,
85         [BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
86         [BOOKE_INTERRUPT_DTLB_MISS] = 7,
87         [BOOKE_INTERRUPT_ITLB_MISS] = 8,
88         [BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
89         [BOOKE_INTERRUPT_DEBUG] = 10,
90         [BOOKE_INTERRUPT_CRITICAL] = 11,
91         [BOOKE_INTERRUPT_WATCHDOG] = 12,
92         [BOOKE_INTERRUPT_EXTERNAL] = 13,
93         [BOOKE_INTERRUPT_FIT] = 14,
94         [BOOKE_INTERRUPT_DECREMENTER] = 15,
95 };
96
97 const unsigned char priority_exception[] = {
98         BOOKE_INTERRUPT_DATA_STORAGE,
99         BOOKE_INTERRUPT_INST_STORAGE,
100         BOOKE_INTERRUPT_ALIGNMENT,
101         BOOKE_INTERRUPT_PROGRAM,
102         BOOKE_INTERRUPT_FP_UNAVAIL,
103         BOOKE_INTERRUPT_SYSCALL,
104         BOOKE_INTERRUPT_AP_UNAVAIL,
105         BOOKE_INTERRUPT_DTLB_MISS,
106         BOOKE_INTERRUPT_ITLB_MISS,
107         BOOKE_INTERRUPT_MACHINE_CHECK,
108         BOOKE_INTERRUPT_DEBUG,
109         BOOKE_INTERRUPT_CRITICAL,
110         BOOKE_INTERRUPT_WATCHDOG,
111         BOOKE_INTERRUPT_EXTERNAL,
112         BOOKE_INTERRUPT_FIT,
113         BOOKE_INTERRUPT_DECREMENTER,
114 };
115
116
117 /* TODO: use vcpu_printf() */
118 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
119 {
120         int i;
121
122         printk("pc:   %08x msr:  %08x\n", vcpu->arch.pc, vcpu->arch.msr);
123         printk("lr:   %08x ctr:  %08x\n", vcpu->arch.lr, vcpu->arch.ctr);
124         printk("srr0: %08x srr1: %08x\n", vcpu->arch.srr0, vcpu->arch.srr1);
125
126         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
127
128         for (i = 0; i < 32; i += 4) {
129                 printk("gpr%02d: %08x %08x %08x %08x\n", i,
130                        vcpu->arch.gpr[i],
131                        vcpu->arch.gpr[i+1],
132                        vcpu->arch.gpr[i+2],
133                        vcpu->arch.gpr[i+3]);
134         }
135 }
136
137 /* Check if we are ready to deliver the interrupt */
138 static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
139 {
140         int r;
141
142         switch (interrupt) {
143         case BOOKE_INTERRUPT_CRITICAL:
144                 r = vcpu->arch.msr & MSR_CE;
145                 break;
146         case BOOKE_INTERRUPT_MACHINE_CHECK:
147                 r = vcpu->arch.msr & MSR_ME;
148                 break;
149         case BOOKE_INTERRUPT_EXTERNAL:
150                 r = vcpu->arch.msr & MSR_EE;
151                 break;
152         case BOOKE_INTERRUPT_DECREMENTER:
153                 r = vcpu->arch.msr & MSR_EE;
154                 break;
155         case BOOKE_INTERRUPT_FIT:
156                 r = vcpu->arch.msr & MSR_EE;
157                 break;
158         case BOOKE_INTERRUPT_WATCHDOG:
159                 r = vcpu->arch.msr & MSR_CE;
160                 break;
161         case BOOKE_INTERRUPT_DEBUG:
162                 r = vcpu->arch.msr & MSR_DE;
163                 break;
164         default:
165                 r = 1;
166         }
167
168         return r;
169 }
170
171 static void kvmppc_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
172 {
173         switch (interrupt) {
174         case BOOKE_INTERRUPT_DECREMENTER:
175                 vcpu->arch.tsr |= TSR_DIS;
176                 break;
177         }
178
179         vcpu->arch.srr0 = vcpu->arch.pc;
180         vcpu->arch.srr1 = vcpu->arch.msr;
181         vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
182         kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
183 }
184
185 /* Check pending exceptions and deliver one, if possible. */
186 void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu)
187 {
188         unsigned long *pending = &vcpu->arch.pending_exceptions;
189         unsigned int exception;
190         unsigned int priority;
191
192         priority = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
193         while (priority <= BOOKE_MAX_INTERRUPT) {
194                 exception = priority_exception[priority];
195                 if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
196                         kvmppc_clear_exception(vcpu, exception);
197                         kvmppc_deliver_interrupt(vcpu, exception);
198                         break;
199                 }
200
201                 priority = find_next_bit(pending,
202                                          BITS_PER_BYTE * sizeof(*pending),
203                                          priority + 1);
204         }
205 }
206
207 /**
208  * kvmppc_handle_exit
209  *
210  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
211  */
212 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
213                        unsigned int exit_nr)
214 {
215         enum emulation_result er;
216         int r = RESUME_HOST;
217
218         local_irq_enable();
219
220         run->exit_reason = KVM_EXIT_UNKNOWN;
221         run->ready_for_interrupt_injection = 1;
222
223         switch (exit_nr) {
224         case BOOKE_INTERRUPT_MACHINE_CHECK:
225                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
226                 kvmppc_dump_vcpu(vcpu);
227                 r = RESUME_HOST;
228                 break;
229
230         case BOOKE_INTERRUPT_EXTERNAL:
231         case BOOKE_INTERRUPT_DECREMENTER:
232                 /* Since we switched IVPR back to the host's value, the host
233                  * handled this interrupt the moment we enabled interrupts.
234                  * Now we just offer it a chance to reschedule the guest. */
235
236                 /* XXX At this point the TLB still holds our shadow TLB, so if
237                  * we do reschedule the host will fault over it. Perhaps we
238                  * should politely restore the host's entries to minimize
239                  * misses before ceding control. */
240                 if (need_resched())
241                         cond_resched();
242                 if (exit_nr == BOOKE_INTERRUPT_DECREMENTER)
243                         vcpu->stat.dec_exits++;
244                 else
245                         vcpu->stat.ext_intr_exits++;
246                 r = RESUME_GUEST;
247                 break;
248
249         case BOOKE_INTERRUPT_PROGRAM:
250                 if (vcpu->arch.msr & MSR_PR) {
251                         /* Program traps generated by user-level software must be handled
252                          * by the guest kernel. */
253                         vcpu->arch.esr = vcpu->arch.fault_esr;
254                         kvmppc_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
255                         r = RESUME_GUEST;
256                         break;
257                 }
258
259                 er = kvmppc_emulate_instruction(run, vcpu);
260                 switch (er) {
261                 case EMULATE_DONE:
262                         /* Future optimization: only reload non-volatiles if
263                          * they were actually modified by emulation. */
264                         vcpu->stat.emulated_inst_exits++;
265                         r = RESUME_GUEST_NV;
266                         break;
267                 case EMULATE_DO_DCR:
268                         run->exit_reason = KVM_EXIT_DCR;
269                         r = RESUME_HOST;
270                         break;
271                 case EMULATE_FAIL:
272                         /* XXX Deliver Program interrupt to guest. */
273                         printk(KERN_CRIT "%s: emulation at %x failed (%08x)\n",
274                                __func__, vcpu->arch.pc, vcpu->arch.last_inst);
275                         /* For debugging, encode the failing instruction and
276                          * report it to userspace. */
277                         run->hw.hardware_exit_reason = ~0ULL << 32;
278                         run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
279                         r = RESUME_HOST;
280                         break;
281                 default:
282                         BUG();
283                 }
284                 break;
285
286         case BOOKE_INTERRUPT_FP_UNAVAIL:
287                 kvmppc_queue_exception(vcpu, exit_nr);
288                 r = RESUME_GUEST;
289                 break;
290
291         case BOOKE_INTERRUPT_DATA_STORAGE:
292                 vcpu->arch.dear = vcpu->arch.fault_dear;
293                 vcpu->arch.esr = vcpu->arch.fault_esr;
294                 kvmppc_queue_exception(vcpu, exit_nr);
295                 vcpu->stat.dsi_exits++;
296                 r = RESUME_GUEST;
297                 break;
298
299         case BOOKE_INTERRUPT_INST_STORAGE:
300                 vcpu->arch.esr = vcpu->arch.fault_esr;
301                 kvmppc_queue_exception(vcpu, exit_nr);
302                 vcpu->stat.isi_exits++;
303                 r = RESUME_GUEST;
304                 break;
305
306         case BOOKE_INTERRUPT_SYSCALL:
307                 kvmppc_queue_exception(vcpu, exit_nr);
308                 vcpu->stat.syscall_exits++;
309                 r = RESUME_GUEST;
310                 break;
311
312         case BOOKE_INTERRUPT_DTLB_MISS: {
313                 struct kvmppc_44x_tlbe *gtlbe;
314                 unsigned long eaddr = vcpu->arch.fault_dear;
315                 gfn_t gfn;
316
317                 /* Check the guest TLB. */
318                 gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
319                 if (!gtlbe) {
320                         /* The guest didn't have a mapping for it. */
321                         kvmppc_queue_exception(vcpu, exit_nr);
322                         vcpu->arch.dear = vcpu->arch.fault_dear;
323                         vcpu->arch.esr = vcpu->arch.fault_esr;
324                         vcpu->stat.dtlb_real_miss_exits++;
325                         r = RESUME_GUEST;
326                         break;
327                 }
328
329                 vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
330                 gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
331
332                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
333                         /* The guest TLB had a mapping, but the shadow TLB
334                          * didn't, and it is RAM. This could be because:
335                          * a) the entry is mapping the host kernel, or
336                          * b) the guest used a large mapping which we're faking
337                          * Either way, we need to satisfy the fault without
338                          * invoking the guest. */
339                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
340                                        gtlbe->word2);
341                         vcpu->stat.dtlb_virt_miss_exits++;
342                         r = RESUME_GUEST;
343                 } else {
344                         /* Guest has mapped and accessed a page which is not
345                          * actually RAM. */
346                         r = kvmppc_emulate_mmio(run, vcpu);
347                 }
348
349                 break;
350         }
351
352         case BOOKE_INTERRUPT_ITLB_MISS: {
353                 struct kvmppc_44x_tlbe *gtlbe;
354                 unsigned long eaddr = vcpu->arch.pc;
355                 gfn_t gfn;
356
357                 r = RESUME_GUEST;
358
359                 /* Check the guest TLB. */
360                 gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
361                 if (!gtlbe) {
362                         /* The guest didn't have a mapping for it. */
363                         kvmppc_queue_exception(vcpu, exit_nr);
364                         vcpu->stat.itlb_real_miss_exits++;
365                         break;
366                 }
367
368                 vcpu->stat.itlb_virt_miss_exits++;
369
370                 gfn = tlb_xlate(gtlbe, eaddr) >> PAGE_SHIFT;
371
372                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
373                         /* The guest TLB had a mapping, but the shadow TLB
374                          * didn't. This could be because:
375                          * a) the entry is mapping the host kernel, or
376                          * b) the guest used a large mapping which we're faking
377                          * Either way, we need to satisfy the fault without
378                          * invoking the guest. */
379                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
380                                        gtlbe->word2);
381                 } else {
382                         /* Guest mapped and leaped at non-RAM! */
383                         kvmppc_queue_exception(vcpu,
384                                                BOOKE_INTERRUPT_MACHINE_CHECK);
385                 }
386
387                 break;
388         }
389
390         case BOOKE_INTERRUPT_DEBUG: {
391                 u32 dbsr;
392
393                 vcpu->arch.pc = mfspr(SPRN_CSRR0);
394
395                 /* clear IAC events in DBSR register */
396                 dbsr = mfspr(SPRN_DBSR);
397                 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
398                 mtspr(SPRN_DBSR, dbsr);
399
400                 run->exit_reason = KVM_EXIT_DEBUG;
401                 r = RESUME_HOST;
402                 break;
403         }
404
405         default:
406                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
407                 BUG();
408         }
409
410         local_irq_disable();
411
412         kvmppc_check_and_deliver_interrupts(vcpu);
413
414         /* Do some exit accounting. */
415         vcpu->stat.sum_exits++;
416         if (!(r & RESUME_HOST)) {
417                 /* To avoid clobbering exit_reason, only check for signals if
418                  * we aren't already exiting to userspace for some other
419                  * reason. */
420                 if (signal_pending(current)) {
421                         run->exit_reason = KVM_EXIT_INTR;
422                         r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
423
424                         vcpu->stat.signal_exits++;
425                 } else {
426                         vcpu->stat.light_exits++;
427                 }
428         } else {
429                 switch (run->exit_reason) {
430                 case KVM_EXIT_MMIO:
431                         vcpu->stat.mmio_exits++;
432                         break;
433                 case KVM_EXIT_DCR:
434                         vcpu->stat.dcr_exits++;
435                         break;
436                 case KVM_EXIT_INTR:
437                         vcpu->stat.signal_exits++;
438                         break;
439                 }
440         }
441
442         return r;
443 }
444
445 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
446 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
447 {
448         struct kvmppc_44x_tlbe *tlbe = &vcpu->arch.guest_tlb[0];
449
450         tlbe->tid = 0;
451         tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;
452         tlbe->word1 = 0;
453         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;
454
455         tlbe++;
456         tlbe->tid = 0;
457         tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;
458         tlbe->word1 = 0xef600000;
459         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR
460                       | PPC44x_TLB_I | PPC44x_TLB_G;
461
462         vcpu->arch.pc = 0;
463         vcpu->arch.msr = 0;
464         vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
465
466         vcpu->arch.shadow_pid = 1;
467
468         /* Eye-catching number so we know if the guest takes an interrupt
469          * before it's programmed its own IVPR. */
470         vcpu->arch.ivpr = 0x55550000;
471
472         /* Since the guest can directly access the timebase, it must know the
473          * real timebase frequency. Accordingly, it must see the state of
474          * CCR1[TCS]. */
475         vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
476
477         return 0;
478 }
479
480 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
481 {
482         int i;
483
484         regs->pc = vcpu->arch.pc;
485         regs->cr = vcpu->arch.cr;
486         regs->ctr = vcpu->arch.ctr;
487         regs->lr = vcpu->arch.lr;
488         regs->xer = vcpu->arch.xer;
489         regs->msr = vcpu->arch.msr;
490         regs->srr0 = vcpu->arch.srr0;
491         regs->srr1 = vcpu->arch.srr1;
492         regs->pid = vcpu->arch.pid;
493         regs->sprg0 = vcpu->arch.sprg0;
494         regs->sprg1 = vcpu->arch.sprg1;
495         regs->sprg2 = vcpu->arch.sprg2;
496         regs->sprg3 = vcpu->arch.sprg3;
497         regs->sprg5 = vcpu->arch.sprg4;
498         regs->sprg6 = vcpu->arch.sprg5;
499         regs->sprg7 = vcpu->arch.sprg6;
500
501         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
502                 regs->gpr[i] = vcpu->arch.gpr[i];
503
504         return 0;
505 }
506
507 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
508 {
509         int i;
510
511         vcpu->arch.pc = regs->pc;
512         vcpu->arch.cr = regs->cr;
513         vcpu->arch.ctr = regs->ctr;
514         vcpu->arch.lr = regs->lr;
515         vcpu->arch.xer = regs->xer;
516         vcpu->arch.msr = regs->msr;
517         vcpu->arch.srr0 = regs->srr0;
518         vcpu->arch.srr1 = regs->srr1;
519         vcpu->arch.sprg0 = regs->sprg0;
520         vcpu->arch.sprg1 = regs->sprg1;
521         vcpu->arch.sprg2 = regs->sprg2;
522         vcpu->arch.sprg3 = regs->sprg3;
523         vcpu->arch.sprg5 = regs->sprg4;
524         vcpu->arch.sprg6 = regs->sprg5;
525         vcpu->arch.sprg7 = regs->sprg6;
526
527         for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
528                 vcpu->arch.gpr[i] = regs->gpr[i];
529
530         return 0;
531 }
532
533 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
534                                   struct kvm_sregs *sregs)
535 {
536         return -ENOTSUPP;
537 }
538
539 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
540                                   struct kvm_sregs *sregs)
541 {
542         return -ENOTSUPP;
543 }
544
545 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
546 {
547         return -ENOTSUPP;
548 }
549
550 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
551 {
552         return -ENOTSUPP;
553 }
554
555 /* 'linear_address' is actually an encoding of AS|PID|EADDR . */
556 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
557                                   struct kvm_translation *tr)
558 {
559         struct kvmppc_44x_tlbe *gtlbe;
560         int index;
561         gva_t eaddr;
562         u8 pid;
563         u8 as;
564
565         eaddr = tr->linear_address;
566         pid = (tr->linear_address >> 32) & 0xff;
567         as = (tr->linear_address >> 40) & 0x1;
568
569         index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);
570         if (index == -1) {
571                 tr->valid = 0;
572                 return 0;
573         }
574
575         gtlbe = &vcpu->arch.guest_tlb[index];
576
577         tr->physical_address = tlb_xlate(gtlbe, eaddr);
578         /* XXX what does "writeable" and "usermode" even mean? */
579         tr->valid = 1;
580
581         return 0;
582 }
583
584 static int kvmppc_booke_init(void)
585 {
586         unsigned long ivor[16];
587         unsigned long max_ivor = 0;
588         int i;
589
590         /* We install our own exception handlers by hijacking IVPR. IVPR must
591          * be 16-bit aligned, so we need a 64KB allocation. */
592         kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
593                                                  VCPU_SIZE_ORDER);
594         if (!kvmppc_booke_handlers)
595                 return -ENOMEM;
596
597         /* XXX make sure our handlers are smaller than Linux's */
598
599         /* Copy our interrupt handlers to match host IVORs. That way we don't
600          * have to swap the IVORs on every guest/host transition. */
601         ivor[0] = mfspr(SPRN_IVOR0);
602         ivor[1] = mfspr(SPRN_IVOR1);
603         ivor[2] = mfspr(SPRN_IVOR2);
604         ivor[3] = mfspr(SPRN_IVOR3);
605         ivor[4] = mfspr(SPRN_IVOR4);
606         ivor[5] = mfspr(SPRN_IVOR5);
607         ivor[6] = mfspr(SPRN_IVOR6);
608         ivor[7] = mfspr(SPRN_IVOR7);
609         ivor[8] = mfspr(SPRN_IVOR8);
610         ivor[9] = mfspr(SPRN_IVOR9);
611         ivor[10] = mfspr(SPRN_IVOR10);
612         ivor[11] = mfspr(SPRN_IVOR11);
613         ivor[12] = mfspr(SPRN_IVOR12);
614         ivor[13] = mfspr(SPRN_IVOR13);
615         ivor[14] = mfspr(SPRN_IVOR14);
616         ivor[15] = mfspr(SPRN_IVOR15);
617
618         for (i = 0; i < 16; i++) {
619                 if (ivor[i] > max_ivor)
620                         max_ivor = ivor[i];
621
622                 memcpy((void *)kvmppc_booke_handlers + ivor[i],
623                        kvmppc_handlers_start + i * kvmppc_handler_len,
624                        kvmppc_handler_len);
625         }
626         flush_icache_range(kvmppc_booke_handlers,
627                            kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
628
629         return kvm_init(NULL, sizeof(struct kvm_vcpu), THIS_MODULE);
630 }
631
632 static void __exit kvmppc_booke_exit(void)
633 {
634         free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
635         kvm_exit();
636 }
637
638 module_init(kvmppc_booke_init)
639 module_exit(kvmppc_booke_exit)