138014acf3cf84ff0687d731123c105b7230187d
[linux-2.6.git] / arch / powerpc / kvm / booke.c
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright IBM Corp. 2007
16  *
17  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19  */
20
21 #include <linux/errno.h>
22 #include <linux/err.h>
23 #include <linux/kvm_host.h>
24 #include <linux/module.h>
25 #include <linux/vmalloc.h>
26 #include <linux/fs.h>
27 #include <asm/cputable.h>
28 #include <asm/uaccess.h>
29 #include <asm/kvm_ppc.h>
30 #include <asm/cacheflush.h>
31
32 #include "44x_tlb.h"
33
34 unsigned long kvmppc_booke_handlers;
35
36 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
37 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
38
39 struct kvm_stats_debugfs_item debugfs_entries[] = {
40         { "exits",      VCPU_STAT(sum_exits) },
41         { "mmio",       VCPU_STAT(mmio_exits) },
42         { "dcr",        VCPU_STAT(dcr_exits) },
43         { "sig",        VCPU_STAT(signal_exits) },
44         { "light",      VCPU_STAT(light_exits) },
45         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
46         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
47         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
48         { "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
49         { "sysc",       VCPU_STAT(syscall_exits) },
50         { "isi",        VCPU_STAT(isi_exits) },
51         { "dsi",        VCPU_STAT(dsi_exits) },
52         { "inst_emu",   VCPU_STAT(emulated_inst_exits) },
53         { "dec",        VCPU_STAT(dec_exits) },
54         { "ext_intr",   VCPU_STAT(ext_intr_exits) },
55         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
56         { NULL }
57 };
58
59 static const u32 interrupt_msr_mask[16] = {
60         [BOOKE_INTERRUPT_CRITICAL]      = MSR_ME,
61         [BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
62         [BOOKE_INTERRUPT_DATA_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
63         [BOOKE_INTERRUPT_INST_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
64         [BOOKE_INTERRUPT_EXTERNAL]      = MSR_CE|MSR_ME|MSR_DE,
65         [BOOKE_INTERRUPT_ALIGNMENT]     = MSR_CE|MSR_ME|MSR_DE,
66         [BOOKE_INTERRUPT_PROGRAM]       = MSR_CE|MSR_ME|MSR_DE,
67         [BOOKE_INTERRUPT_FP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
68         [BOOKE_INTERRUPT_SYSCALL]       = MSR_CE|MSR_ME|MSR_DE,
69         [BOOKE_INTERRUPT_AP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
70         [BOOKE_INTERRUPT_DECREMENTER]   = MSR_CE|MSR_ME|MSR_DE,
71         [BOOKE_INTERRUPT_FIT]           = MSR_CE|MSR_ME|MSR_DE,
72         [BOOKE_INTERRUPT_WATCHDOG]      = MSR_ME,
73         [BOOKE_INTERRUPT_DTLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
74         [BOOKE_INTERRUPT_ITLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
75         [BOOKE_INTERRUPT_DEBUG]         = MSR_ME,
76 };
77
78 const unsigned char exception_priority[] = {
79         [BOOKE_INTERRUPT_DATA_STORAGE] = 0,
80         [BOOKE_INTERRUPT_INST_STORAGE] = 1,
81         [BOOKE_INTERRUPT_ALIGNMENT] = 2,
82         [BOOKE_INTERRUPT_PROGRAM] = 3,
83         [BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
84         [BOOKE_INTERRUPT_SYSCALL] = 5,
85         [BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
86         [BOOKE_INTERRUPT_DTLB_MISS] = 7,
87         [BOOKE_INTERRUPT_ITLB_MISS] = 8,
88         [BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
89         [BOOKE_INTERRUPT_DEBUG] = 10,
90         [BOOKE_INTERRUPT_CRITICAL] = 11,
91         [BOOKE_INTERRUPT_WATCHDOG] = 12,
92         [BOOKE_INTERRUPT_EXTERNAL] = 13,
93         [BOOKE_INTERRUPT_FIT] = 14,
94         [BOOKE_INTERRUPT_DECREMENTER] = 15,
95 };
96
97 const unsigned char priority_exception[] = {
98         BOOKE_INTERRUPT_DATA_STORAGE,
99         BOOKE_INTERRUPT_INST_STORAGE,
100         BOOKE_INTERRUPT_ALIGNMENT,
101         BOOKE_INTERRUPT_PROGRAM,
102         BOOKE_INTERRUPT_FP_UNAVAIL,
103         BOOKE_INTERRUPT_SYSCALL,
104         BOOKE_INTERRUPT_AP_UNAVAIL,
105         BOOKE_INTERRUPT_DTLB_MISS,
106         BOOKE_INTERRUPT_ITLB_MISS,
107         BOOKE_INTERRUPT_MACHINE_CHECK,
108         BOOKE_INTERRUPT_DEBUG,
109         BOOKE_INTERRUPT_CRITICAL,
110         BOOKE_INTERRUPT_WATCHDOG,
111         BOOKE_INTERRUPT_EXTERNAL,
112         BOOKE_INTERRUPT_FIT,
113         BOOKE_INTERRUPT_DECREMENTER,
114 };
115
116
117 /* TODO: use vcpu_printf() */
118 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
119 {
120         int i;
121
122         printk("pc:   %08x msr:  %08x\n", vcpu->arch.pc, vcpu->arch.msr);
123         printk("lr:   %08x ctr:  %08x\n", vcpu->arch.lr, vcpu->arch.ctr);
124         printk("srr0: %08x srr1: %08x\n", vcpu->arch.srr0, vcpu->arch.srr1);
125
126         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
127
128         for (i = 0; i < 32; i += 4) {
129                 printk("gpr%02d: %08x %08x %08x %08x\n", i,
130                        vcpu->arch.gpr[i],
131                        vcpu->arch.gpr[i+1],
132                        vcpu->arch.gpr[i+2],
133                        vcpu->arch.gpr[i+3]);
134         }
135 }
136
137 static void kvmppc_booke_queue_exception(struct kvm_vcpu *vcpu, int exception)
138 {
139         unsigned int priority = exception_priority[exception];
140         set_bit(priority, &vcpu->arch.pending_exceptions);
141 }
142
143 static void kvmppc_booke_clear_exception(struct kvm_vcpu *vcpu, int exception)
144 {
145         unsigned int priority = exception_priority[exception];
146         clear_bit(priority, &vcpu->arch.pending_exceptions);
147 }
148
149 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
150 {
151         kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
152 }
153
154 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
155 {
156         kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_DECREMENTER);
157 }
158
159 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
160 {
161         unsigned int priority = exception_priority[BOOKE_INTERRUPT_DECREMENTER];
162         return test_bit(priority, &vcpu->arch.pending_exceptions);
163 }
164
165 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
166                                 struct kvm_interrupt *irq)
167 {
168         kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_EXTERNAL);
169 }
170
171 /* Check if we are ready to deliver the interrupt */
172 static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
173 {
174         int r;
175
176         switch (interrupt) {
177         case BOOKE_INTERRUPT_CRITICAL:
178                 r = vcpu->arch.msr & MSR_CE;
179                 break;
180         case BOOKE_INTERRUPT_MACHINE_CHECK:
181                 r = vcpu->arch.msr & MSR_ME;
182                 break;
183         case BOOKE_INTERRUPT_EXTERNAL:
184                 r = vcpu->arch.msr & MSR_EE;
185                 break;
186         case BOOKE_INTERRUPT_DECREMENTER:
187                 r = vcpu->arch.msr & MSR_EE;
188                 break;
189         case BOOKE_INTERRUPT_FIT:
190                 r = vcpu->arch.msr & MSR_EE;
191                 break;
192         case BOOKE_INTERRUPT_WATCHDOG:
193                 r = vcpu->arch.msr & MSR_CE;
194                 break;
195         case BOOKE_INTERRUPT_DEBUG:
196                 r = vcpu->arch.msr & MSR_DE;
197                 break;
198         default:
199                 r = 1;
200         }
201
202         return r;
203 }
204
205 static void kvmppc_booke_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
206 {
207         switch (interrupt) {
208         case BOOKE_INTERRUPT_DECREMENTER:
209                 vcpu->arch.tsr |= TSR_DIS;
210                 break;
211         }
212
213         vcpu->arch.srr0 = vcpu->arch.pc;
214         vcpu->arch.srr1 = vcpu->arch.msr;
215         vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
216         kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
217 }
218
219 /* Check pending exceptions and deliver one, if possible. */
220 void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
221 {
222         unsigned long *pending = &vcpu->arch.pending_exceptions;
223         unsigned int exception;
224         unsigned int priority;
225
226         priority = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
227         while (priority <= BOOKE_MAX_INTERRUPT) {
228                 exception = priority_exception[priority];
229                 if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
230                         kvmppc_booke_clear_exception(vcpu, exception);
231                         kvmppc_booke_deliver_interrupt(vcpu, exception);
232                         break;
233                 }
234
235                 priority = find_next_bit(pending,
236                                          BITS_PER_BYTE * sizeof(*pending),
237                                          priority + 1);
238         }
239 }
240
241 /**
242  * kvmppc_handle_exit
243  *
244  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
245  */
246 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
247                        unsigned int exit_nr)
248 {
249         enum emulation_result er;
250         int r = RESUME_HOST;
251
252         local_irq_enable();
253
254         run->exit_reason = KVM_EXIT_UNKNOWN;
255         run->ready_for_interrupt_injection = 1;
256
257         switch (exit_nr) {
258         case BOOKE_INTERRUPT_MACHINE_CHECK:
259                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
260                 kvmppc_dump_vcpu(vcpu);
261                 r = RESUME_HOST;
262                 break;
263
264         case BOOKE_INTERRUPT_EXTERNAL:
265         case BOOKE_INTERRUPT_DECREMENTER:
266                 /* Since we switched IVPR back to the host's value, the host
267                  * handled this interrupt the moment we enabled interrupts.
268                  * Now we just offer it a chance to reschedule the guest. */
269
270                 /* XXX At this point the TLB still holds our shadow TLB, so if
271                  * we do reschedule the host will fault over it. Perhaps we
272                  * should politely restore the host's entries to minimize
273                  * misses before ceding control. */
274                 if (need_resched())
275                         cond_resched();
276                 if (exit_nr == BOOKE_INTERRUPT_DECREMENTER)
277                         vcpu->stat.dec_exits++;
278                 else
279                         vcpu->stat.ext_intr_exits++;
280                 r = RESUME_GUEST;
281                 break;
282
283         case BOOKE_INTERRUPT_PROGRAM:
284                 if (vcpu->arch.msr & MSR_PR) {
285                         /* Program traps generated by user-level software must be handled
286                          * by the guest kernel. */
287                         vcpu->arch.esr = vcpu->arch.fault_esr;
288                         kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
289                         r = RESUME_GUEST;
290                         break;
291                 }
292
293                 er = kvmppc_emulate_instruction(run, vcpu);
294                 switch (er) {
295                 case EMULATE_DONE:
296                         /* Future optimization: only reload non-volatiles if
297                          * they were actually modified by emulation. */
298                         vcpu->stat.emulated_inst_exits++;
299                         r = RESUME_GUEST_NV;
300                         break;
301                 case EMULATE_DO_DCR:
302                         run->exit_reason = KVM_EXIT_DCR;
303                         r = RESUME_HOST;
304                         break;
305                 case EMULATE_FAIL:
306                         /* XXX Deliver Program interrupt to guest. */
307                         printk(KERN_CRIT "%s: emulation at %x failed (%08x)\n",
308                                __func__, vcpu->arch.pc, vcpu->arch.last_inst);
309                         /* For debugging, encode the failing instruction and
310                          * report it to userspace. */
311                         run->hw.hardware_exit_reason = ~0ULL << 32;
312                         run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
313                         r = RESUME_HOST;
314                         break;
315                 default:
316                         BUG();
317                 }
318                 break;
319
320         case BOOKE_INTERRUPT_FP_UNAVAIL:
321                 kvmppc_booke_queue_exception(vcpu, exit_nr);
322                 r = RESUME_GUEST;
323                 break;
324
325         case BOOKE_INTERRUPT_DATA_STORAGE:
326                 vcpu->arch.dear = vcpu->arch.fault_dear;
327                 vcpu->arch.esr = vcpu->arch.fault_esr;
328                 kvmppc_booke_queue_exception(vcpu, exit_nr);
329                 vcpu->stat.dsi_exits++;
330                 r = RESUME_GUEST;
331                 break;
332
333         case BOOKE_INTERRUPT_INST_STORAGE:
334                 vcpu->arch.esr = vcpu->arch.fault_esr;
335                 kvmppc_booke_queue_exception(vcpu, exit_nr);
336                 vcpu->stat.isi_exits++;
337                 r = RESUME_GUEST;
338                 break;
339
340         case BOOKE_INTERRUPT_SYSCALL:
341                 kvmppc_booke_queue_exception(vcpu, exit_nr);
342                 vcpu->stat.syscall_exits++;
343                 r = RESUME_GUEST;
344                 break;
345
346         case BOOKE_INTERRUPT_DTLB_MISS: {
347                 struct kvmppc_44x_tlbe *gtlbe;
348                 unsigned long eaddr = vcpu->arch.fault_dear;
349                 gfn_t gfn;
350
351                 /* Check the guest TLB. */
352                 gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
353                 if (!gtlbe) {
354                         /* The guest didn't have a mapping for it. */
355                         kvmppc_booke_queue_exception(vcpu, exit_nr);
356                         vcpu->arch.dear = vcpu->arch.fault_dear;
357                         vcpu->arch.esr = vcpu->arch.fault_esr;
358                         vcpu->stat.dtlb_real_miss_exits++;
359                         r = RESUME_GUEST;
360                         break;
361                 }
362
363                 vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
364                 gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
365
366                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
367                         /* The guest TLB had a mapping, but the shadow TLB
368                          * didn't, and it is RAM. This could be because:
369                          * a) the entry is mapping the host kernel, or
370                          * b) the guest used a large mapping which we're faking
371                          * Either way, we need to satisfy the fault without
372                          * invoking the guest. */
373                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
374                                        gtlbe->word2);
375                         vcpu->stat.dtlb_virt_miss_exits++;
376                         r = RESUME_GUEST;
377                 } else {
378                         /* Guest has mapped and accessed a page which is not
379                          * actually RAM. */
380                         r = kvmppc_emulate_mmio(run, vcpu);
381                 }
382
383                 break;
384         }
385
386         case BOOKE_INTERRUPT_ITLB_MISS: {
387                 struct kvmppc_44x_tlbe *gtlbe;
388                 unsigned long eaddr = vcpu->arch.pc;
389                 gfn_t gfn;
390
391                 r = RESUME_GUEST;
392
393                 /* Check the guest TLB. */
394                 gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
395                 if (!gtlbe) {
396                         /* The guest didn't have a mapping for it. */
397                         kvmppc_booke_queue_exception(vcpu, exit_nr);
398                         vcpu->stat.itlb_real_miss_exits++;
399                         break;
400                 }
401
402                 vcpu->stat.itlb_virt_miss_exits++;
403
404                 gfn = tlb_xlate(gtlbe, eaddr) >> PAGE_SHIFT;
405
406                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
407                         /* The guest TLB had a mapping, but the shadow TLB
408                          * didn't. This could be because:
409                          * a) the entry is mapping the host kernel, or
410                          * b) the guest used a large mapping which we're faking
411                          * Either way, we need to satisfy the fault without
412                          * invoking the guest. */
413                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
414                                        gtlbe->word2);
415                 } else {
416                         /* Guest mapped and leaped at non-RAM! */
417                         kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_MACHINE_CHECK);
418                 }
419
420                 break;
421         }
422
423         case BOOKE_INTERRUPT_DEBUG: {
424                 u32 dbsr;
425
426                 vcpu->arch.pc = mfspr(SPRN_CSRR0);
427
428                 /* clear IAC events in DBSR register */
429                 dbsr = mfspr(SPRN_DBSR);
430                 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
431                 mtspr(SPRN_DBSR, dbsr);
432
433                 run->exit_reason = KVM_EXIT_DEBUG;
434                 r = RESUME_HOST;
435                 break;
436         }
437
438         default:
439                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
440                 BUG();
441         }
442
443         local_irq_disable();
444
445         kvmppc_core_deliver_interrupts(vcpu);
446
447         /* Do some exit accounting. */
448         vcpu->stat.sum_exits++;
449         if (!(r & RESUME_HOST)) {
450                 /* To avoid clobbering exit_reason, only check for signals if
451                  * we aren't already exiting to userspace for some other
452                  * reason. */
453                 if (signal_pending(current)) {
454                         run->exit_reason = KVM_EXIT_INTR;
455                         r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
456
457                         vcpu->stat.signal_exits++;
458                 } else {
459                         vcpu->stat.light_exits++;
460                 }
461         } else {
462                 switch (run->exit_reason) {
463                 case KVM_EXIT_MMIO:
464                         vcpu->stat.mmio_exits++;
465                         break;
466                 case KVM_EXIT_DCR:
467                         vcpu->stat.dcr_exits++;
468                         break;
469                 case KVM_EXIT_INTR:
470                         vcpu->stat.signal_exits++;
471                         break;
472                 }
473         }
474
475         return r;
476 }
477
478 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
479 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
480 {
481         struct kvmppc_44x_tlbe *tlbe = &vcpu->arch.guest_tlb[0];
482
483         tlbe->tid = 0;
484         tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;
485         tlbe->word1 = 0;
486         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;
487
488         tlbe++;
489         tlbe->tid = 0;
490         tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;
491         tlbe->word1 = 0xef600000;
492         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR
493                       | PPC44x_TLB_I | PPC44x_TLB_G;
494
495         vcpu->arch.pc = 0;
496         vcpu->arch.msr = 0;
497         vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
498
499         vcpu->arch.shadow_pid = 1;
500
501         /* Eye-catching number so we know if the guest takes an interrupt
502          * before it's programmed its own IVPR. */
503         vcpu->arch.ivpr = 0x55550000;
504
505         /* Since the guest can directly access the timebase, it must know the
506          * real timebase frequency. Accordingly, it must see the state of
507          * CCR1[TCS]. */
508         vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
509
510         return 0;
511 }
512
513 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
514 {
515         int i;
516
517         regs->pc = vcpu->arch.pc;
518         regs->cr = vcpu->arch.cr;
519         regs->ctr = vcpu->arch.ctr;
520         regs->lr = vcpu->arch.lr;
521         regs->xer = vcpu->arch.xer;
522         regs->msr = vcpu->arch.msr;
523         regs->srr0 = vcpu->arch.srr0;
524         regs->srr1 = vcpu->arch.srr1;
525         regs->pid = vcpu->arch.pid;
526         regs->sprg0 = vcpu->arch.sprg0;
527         regs->sprg1 = vcpu->arch.sprg1;
528         regs->sprg2 = vcpu->arch.sprg2;
529         regs->sprg3 = vcpu->arch.sprg3;
530         regs->sprg5 = vcpu->arch.sprg4;
531         regs->sprg6 = vcpu->arch.sprg5;
532         regs->sprg7 = vcpu->arch.sprg6;
533
534         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
535                 regs->gpr[i] = vcpu->arch.gpr[i];
536
537         return 0;
538 }
539
540 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
541 {
542         int i;
543
544         vcpu->arch.pc = regs->pc;
545         vcpu->arch.cr = regs->cr;
546         vcpu->arch.ctr = regs->ctr;
547         vcpu->arch.lr = regs->lr;
548         vcpu->arch.xer = regs->xer;
549         vcpu->arch.msr = regs->msr;
550         vcpu->arch.srr0 = regs->srr0;
551         vcpu->arch.srr1 = regs->srr1;
552         vcpu->arch.sprg0 = regs->sprg0;
553         vcpu->arch.sprg1 = regs->sprg1;
554         vcpu->arch.sprg2 = regs->sprg2;
555         vcpu->arch.sprg3 = regs->sprg3;
556         vcpu->arch.sprg5 = regs->sprg4;
557         vcpu->arch.sprg6 = regs->sprg5;
558         vcpu->arch.sprg7 = regs->sprg6;
559
560         for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
561                 vcpu->arch.gpr[i] = regs->gpr[i];
562
563         return 0;
564 }
565
566 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
567                                   struct kvm_sregs *sregs)
568 {
569         return -ENOTSUPP;
570 }
571
572 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
573                                   struct kvm_sregs *sregs)
574 {
575         return -ENOTSUPP;
576 }
577
578 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
579 {
580         return -ENOTSUPP;
581 }
582
583 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
584 {
585         return -ENOTSUPP;
586 }
587
588 /* 'linear_address' is actually an encoding of AS|PID|EADDR . */
589 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
590                                   struct kvm_translation *tr)
591 {
592         struct kvmppc_44x_tlbe *gtlbe;
593         int index;
594         gva_t eaddr;
595         u8 pid;
596         u8 as;
597
598         eaddr = tr->linear_address;
599         pid = (tr->linear_address >> 32) & 0xff;
600         as = (tr->linear_address >> 40) & 0x1;
601
602         index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);
603         if (index == -1) {
604                 tr->valid = 0;
605                 return 0;
606         }
607
608         gtlbe = &vcpu->arch.guest_tlb[index];
609
610         tr->physical_address = tlb_xlate(gtlbe, eaddr);
611         /* XXX what does "writeable" and "usermode" even mean? */
612         tr->valid = 1;
613
614         return 0;
615 }
616
617 static int kvmppc_booke_init(void)
618 {
619         unsigned long ivor[16];
620         unsigned long max_ivor = 0;
621         int i;
622
623         /* We install our own exception handlers by hijacking IVPR. IVPR must
624          * be 16-bit aligned, so we need a 64KB allocation. */
625         kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
626                                                  VCPU_SIZE_ORDER);
627         if (!kvmppc_booke_handlers)
628                 return -ENOMEM;
629
630         /* XXX make sure our handlers are smaller than Linux's */
631
632         /* Copy our interrupt handlers to match host IVORs. That way we don't
633          * have to swap the IVORs on every guest/host transition. */
634         ivor[0] = mfspr(SPRN_IVOR0);
635         ivor[1] = mfspr(SPRN_IVOR1);
636         ivor[2] = mfspr(SPRN_IVOR2);
637         ivor[3] = mfspr(SPRN_IVOR3);
638         ivor[4] = mfspr(SPRN_IVOR4);
639         ivor[5] = mfspr(SPRN_IVOR5);
640         ivor[6] = mfspr(SPRN_IVOR6);
641         ivor[7] = mfspr(SPRN_IVOR7);
642         ivor[8] = mfspr(SPRN_IVOR8);
643         ivor[9] = mfspr(SPRN_IVOR9);
644         ivor[10] = mfspr(SPRN_IVOR10);
645         ivor[11] = mfspr(SPRN_IVOR11);
646         ivor[12] = mfspr(SPRN_IVOR12);
647         ivor[13] = mfspr(SPRN_IVOR13);
648         ivor[14] = mfspr(SPRN_IVOR14);
649         ivor[15] = mfspr(SPRN_IVOR15);
650
651         for (i = 0; i < 16; i++) {
652                 if (ivor[i] > max_ivor)
653                         max_ivor = ivor[i];
654
655                 memcpy((void *)kvmppc_booke_handlers + ivor[i],
656                        kvmppc_handlers_start + i * kvmppc_handler_len,
657                        kvmppc_handler_len);
658         }
659         flush_icache_range(kvmppc_booke_handlers,
660                            kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
661
662         return kvm_init(NULL, sizeof(struct kvm_vcpu), THIS_MODULE);
663 }
664
665 static void __exit kvmppc_booke_exit(void)
666 {
667         free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
668         kvm_exit();
669 }
670
671 module_init(kvmppc_booke_init)
672 module_exit(kvmppc_booke_exit)