[MIPS] Cleanup unnecessary <asm/ptrace.h> inclusions.
[linux-2.6.git] / arch / mips / tx4927 / toshiba_rbtx4927 / toshiba_rbtx4927_irq.c
1 /*
2  * linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
3  *
4  * Toshiba RBTX4927 specific interrupt handlers
5  *
6  * Author: MontaVista Software, Inc.
7  *         source@mvista.com
8  *
9  * Copyright 2001-2002 MontaVista Software Inc.
10  *
11  *  This program is free software; you can redistribute it and/or modify it
12  *  under the terms of the GNU General Public License as published by the
13  *  Free Software Foundation; either version 2 of the License, or (at your
14  *  option) any later version.
15  *
16  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
24  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
25  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  *
27  *  You should have received a copy of the GNU General Public License along
28  *  with this program; if not, write to the Free Software Foundation, Inc.,
29  *  675 Mass Ave, Cambridge, MA 02139, USA.
30  */
31
32
33 /*
34 IRQ  Device
35 00   RBTX4927-ISA/00
36 01   RBTX4927-ISA/01 PS2/Keyboard
37 02   RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
38 03   RBTX4927-ISA/03
39 04   RBTX4927-ISA/04
40 05   RBTX4927-ISA/05
41 06   RBTX4927-ISA/06
42 07   RBTX4927-ISA/07
43 08   RBTX4927-ISA/08
44 09   RBTX4927-ISA/09
45 10   RBTX4927-ISA/10
46 11   RBTX4927-ISA/11
47 12   RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
48 13   RBTX4927-ISA/13
49 14   RBTX4927-ISA/14 IDE
50 15   RBTX4927-ISA/15
51
52 16   TX4927-CP0/00 Software 0
53 17   TX4927-CP0/01 Software 1
54 18   TX4927-CP0/02 Cascade TX4927-CP0
55 19   TX4927-CP0/03 Multiplexed -- do not use
56 20   TX4927-CP0/04 Multiplexed -- do not use
57 21   TX4927-CP0/05 Multiplexed -- do not use
58 22   TX4927-CP0/06 Multiplexed -- do not use
59 23   TX4927-CP0/07 CPU TIMER
60
61 24   TX4927-PIC/00
62 25   TX4927-PIC/01
63 26   TX4927-PIC/02
64 27   TX4927-PIC/03 Cascade RBTX4927-IOC
65 28   TX4927-PIC/04
66 29   TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
67 30   TX4927-PIC/06
68 31   TX4927-PIC/07
69 32   TX4927-PIC/08 TX4927 SerialIO Channel 0
70 33   TX4927-PIC/09 TX4927 SerialIO Channel 1
71 34   TX4927-PIC/10
72 35   TX4927-PIC/11
73 36   TX4927-PIC/12
74 37   TX4927-PIC/13
75 38   TX4927-PIC/14
76 39   TX4927-PIC/15
77 40   TX4927-PIC/16 TX4927 PCI PCI-C
78 41   TX4927-PIC/17
79 42   TX4927-PIC/18
80 43   TX4927-PIC/19
81 44   TX4927-PIC/20
82 45   TX4927-PIC/21
83 46   TX4927-PIC/22 TX4927 PCI PCI-ERR
84 47   TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
85 48   TX4927-PIC/24
86 49   TX4927-PIC/25
87 50   TX4927-PIC/26
88 51   TX4927-PIC/27
89 52   TX4927-PIC/28
90 53   TX4927-PIC/29
91 54   TX4927-PIC/30
92 55   TX4927-PIC/31
93
94 56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed)        [RTL-8139=PJ4]
95 57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed)        [RTL-8139=PJ5]
96 58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
97 59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4)      [RTL-8139=PJ6]
98 60 RBTX4927-IOC/04
99 61 RBTX4927-IOC/05
100 62 RBTX4927-IOC/06
101 63 RBTX4927-IOC/07
102
103 NOTES:
104 SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
105 SouthBridge/ISA/pin=0 no pci irq used by this device
106 SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
107 SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
108 SouthBridge/PMC/pin=0 no pci irq used by this device
109 SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
110 SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
111 JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
112 */
113
114 #include <linux/init.h>
115 #include <linux/kernel.h>
116 #include <linux/types.h>
117 #include <linux/mm.h>
118 #include <linux/swap.h>
119 #include <linux/ioport.h>
120 #include <linux/sched.h>
121 #include <linux/interrupt.h>
122 #include <linux/pci.h>
123 #include <linux/timex.h>
124 #include <asm/bootinfo.h>
125 #include <asm/page.h>
126 #include <asm/io.h>
127 #include <asm/irq.h>
128 #include <asm/pci.h>
129 #include <asm/processor.h>
130 #include <asm/reboot.h>
131 #include <asm/time.h>
132 #include <linux/bootmem.h>
133 #include <linux/blkdev.h>
134 #ifdef CONFIG_RTC_DS1742
135 #include <linux/ds1742rtc.h>
136 #endif
137 #ifdef CONFIG_TOSHIBA_FPCIB0
138 #include <asm/tx4927/smsc_fdc37m81x.h>
139 #endif
140 #include <asm/tx4927/toshiba_rbtx4927.h>
141
142
143 #undef TOSHIBA_RBTX4927_IRQ_DEBUG
144
145 #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
146 #define TOSHIBA_RBTX4927_IRQ_NONE        0x00000000
147
148 #define TOSHIBA_RBTX4927_IRQ_INFO          ( 1 <<  0 )
149 #define TOSHIBA_RBTX4927_IRQ_WARN          ( 1 <<  1 )
150 #define TOSHIBA_RBTX4927_IRQ_EROR          ( 1 <<  2 )
151
152 #define TOSHIBA_RBTX4927_IRQ_IOC_INIT      ( 1 << 10 )
153 #define TOSHIBA_RBTX4927_IRQ_IOC_STARTUP   ( 1 << 11 )
154 #define TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN  ( 1 << 12 )
155 #define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE    ( 1 << 13 )
156 #define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE   ( 1 << 14 )
157 #define TOSHIBA_RBTX4927_IRQ_IOC_MASK      ( 1 << 15 )
158 #define TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ    ( 1 << 16 )
159
160 #define TOSHIBA_RBTX4927_IRQ_ISA_INIT      ( 1 << 20 )
161 #define TOSHIBA_RBTX4927_IRQ_ISA_STARTUP   ( 1 << 21 )
162 #define TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN  ( 1 << 22 )
163 #define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE    ( 1 << 23 )
164 #define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE   ( 1 << 24 )
165 #define TOSHIBA_RBTX4927_IRQ_ISA_MASK      ( 1 << 25 )
166 #define TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ    ( 1 << 26 )
167
168 #define TOSHIBA_RBTX4927_SETUP_ALL         0xffffffff
169 #endif
170
171
172 #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
173 static const u32 toshiba_rbtx4927_irq_debug_flag =
174     (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO |
175      TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR
176 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_INIT
177 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_STARTUP
178 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN
179 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
180 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
181 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_MASK
182 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ
183 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_INIT
184 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_STARTUP
185 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN
186 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
187 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
188 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_MASK
189 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ
190     );
191 #endif
192
193
194 #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
195 #define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...) \
196         if ( (toshiba_rbtx4927_irq_debug_flag) & (flag) ) \
197         { \
198            char tmp[100]; \
199            sprintf( tmp, str ); \
200            printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
201         }
202 #else
203 #define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...)
204 #endif
205
206
207
208
209 #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG   0
210 #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END   7
211
212 #define TOSHIBA_RBTX4927_IRQ_IOC_BEG  ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */
213 #define TOSHIBA_RBTX4927_IRQ_IOC_END  ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */
214
215
216 #define TOSHIBA_RBTX4927_IRQ_ISA_BEG MI8259_IRQ_ISA_BEG
217 #define TOSHIBA_RBTX4927_IRQ_ISA_END MI8259_IRQ_ISA_END
218 #define TOSHIBA_RBTX4927_IRQ_ISA_MID ((TOSHIBA_RBTX4927_IRQ_ISA_BEG+TOSHIBA_RBTX4927_IRQ_ISA_END+1)/2)
219
220
221 #define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC
222 #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2)
223 #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA (TOSHIBA_RBTX4927_IRQ_ISA_BEG+2)
224
225 extern int tx4927_using_backplane;
226
227 #ifdef CONFIG_TOSHIBA_FPCIB0
228 extern void enable_8259A_irq(unsigned int irq);
229 extern void disable_8259A_irq(unsigned int irq);
230 extern void mask_and_ack_8259A(unsigned int irq);
231 #endif
232
233 static unsigned int toshiba_rbtx4927_irq_ioc_startup(unsigned int irq);
234 static void toshiba_rbtx4927_irq_ioc_shutdown(unsigned int irq);
235 static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
236 static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
237 static void toshiba_rbtx4927_irq_ioc_mask_and_ack(unsigned int irq);
238 static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq);
239
240 #ifdef CONFIG_TOSHIBA_FPCIB0
241 static unsigned int toshiba_rbtx4927_irq_isa_startup(unsigned int irq);
242 static void toshiba_rbtx4927_irq_isa_shutdown(unsigned int irq);
243 static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq);
244 static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq);
245 static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq);
246 static void toshiba_rbtx4927_irq_isa_end(unsigned int irq);
247 #endif
248
249 static DEFINE_SPINLOCK(toshiba_rbtx4927_ioc_lock);
250
251
252 #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
253 static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
254         .typename = TOSHIBA_RBTX4927_IOC_NAME,
255         .startup = toshiba_rbtx4927_irq_ioc_startup,
256         .shutdown = toshiba_rbtx4927_irq_ioc_shutdown,
257         .enable = toshiba_rbtx4927_irq_ioc_enable,
258         .disable = toshiba_rbtx4927_irq_ioc_disable,
259         .ack = toshiba_rbtx4927_irq_ioc_mask_and_ack,
260         .end = toshiba_rbtx4927_irq_ioc_end,
261         .set_affinity = NULL
262 };
263 #define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000
264 #define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006
265
266
267 #ifdef CONFIG_TOSHIBA_FPCIB0
268 #define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA"
269 static struct irq_chip toshiba_rbtx4927_irq_isa_type = {
270         .typename = TOSHIBA_RBTX4927_ISA_NAME,
271         .startup = toshiba_rbtx4927_irq_isa_startup,
272         .shutdown = toshiba_rbtx4927_irq_isa_shutdown,
273         .enable = toshiba_rbtx4927_irq_isa_enable,
274         .disable = toshiba_rbtx4927_irq_isa_disable,
275         .ack = toshiba_rbtx4927_irq_isa_mask_and_ack,
276         .end = toshiba_rbtx4927_irq_isa_end,
277         .set_affinity = NULL
278 };
279 #endif
280
281
282 u32 bit2num(u32 num)
283 {
284         u32 i;
285
286         for (i = 0; i < (sizeof(num) * 8); i++) {
287                 if (num & (1 << i)) {
288                         return (i);
289                 }
290         }
291         return (0);
292 }
293
294 int toshiba_rbtx4927_irq_nested(int sw_irq)
295 {
296         u32 level3;
297         u32 level4;
298         u32 level5;
299
300         level3 = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
301         if (level3) {
302                 sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3);
303                 if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) {
304                         goto RETURN;
305                 }
306         }
307 #ifdef CONFIG_TOSHIBA_FPCIB0
308         {
309                 if (tx4927_using_backplane) {
310                         outb(0x0A, 0x20);
311                         level4 = inb(0x20) & 0xff;
312                         if (level4) {
313                                 sw_irq =
314                                     TOSHIBA_RBTX4927_IRQ_ISA_BEG +
315                                     bit2num(level4);
316                                 if (sw_irq !=
317                                     TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA) {
318                                         goto RETURN;
319                                 }
320                         }
321
322                         outb(0x0A, 0xA0);
323                         level5 = inb(0xA0) & 0xff;
324                         if (level5) {
325                                 sw_irq =
326                                     TOSHIBA_RBTX4927_IRQ_ISA_MID +
327                                     bit2num(level5);
328                                 goto RETURN;
329                         }
330                 }
331         }
332 #endif
333
334       RETURN:
335         return (sw_irq);
336 }
337
338 //#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
339 #define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL }
340 static struct irqaction toshiba_rbtx4927_irq_ioc_action =
341 TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME);
342 #ifdef CONFIG_TOSHIBA_FPCIB0
343 static struct irqaction toshiba_rbtx4927_irq_isa_master =
344 TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_ISA_NAME "/M");
345 static struct irqaction toshiba_rbtx4927_irq_isa_slave =
346 TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_ISA_NAME "/S");
347 #endif
348
349
350 /**********************************************************************************/
351 /* Functions for ioc                                                              */
352 /**********************************************************************************/
353
354
355 static void __init toshiba_rbtx4927_irq_ioc_init(void)
356 {
357         int i;
358
359         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_INIT,
360                                      "beg=%d end=%d\n",
361                                      TOSHIBA_RBTX4927_IRQ_IOC_BEG,
362                                      TOSHIBA_RBTX4927_IRQ_IOC_END);
363
364         for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG;
365              i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++) {
366                 irq_desc[i].status = IRQ_DISABLED;
367                 irq_desc[i].action = 0;
368                 irq_desc[i].depth = 3;
369                 irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type;
370         }
371
372         setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
373                   &toshiba_rbtx4927_irq_ioc_action);
374
375         return;
376 }
377
378 static unsigned int toshiba_rbtx4927_irq_ioc_startup(unsigned int irq)
379 {
380         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_STARTUP,
381                                      "irq=%d\n", irq);
382
383         if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
384             || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
385                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
386                                              "bad irq=%d\n", irq);
387                 panic("\n");
388         }
389
390         toshiba_rbtx4927_irq_ioc_enable(irq);
391
392         return (0);
393 }
394
395
396 static void toshiba_rbtx4927_irq_ioc_shutdown(unsigned int irq)
397 {
398         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN,
399                                      "irq=%d\n", irq);
400
401         if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
402             || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
403                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
404                                              "bad irq=%d\n", irq);
405                 panic("\n");
406         }
407
408         toshiba_rbtx4927_irq_ioc_disable(irq);
409
410         return;
411 }
412
413
414 static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
415 {
416         unsigned long flags;
417         volatile unsigned char v;
418
419         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE,
420                                      "irq=%d\n", irq);
421
422         if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
423             || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
424                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
425                                              "bad irq=%d\n", irq);
426                 panic("\n");
427         }
428
429         spin_lock_irqsave(&toshiba_rbtx4927_ioc_lock, flags);
430
431         v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
432         v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
433         TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v);
434
435         spin_unlock_irqrestore(&toshiba_rbtx4927_ioc_lock, flags);
436
437         return;
438 }
439
440
441 static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
442 {
443         unsigned long flags;
444         volatile unsigned char v;
445
446         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE,
447                                      "irq=%d\n", irq);
448
449         if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
450             || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
451                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
452                                              "bad irq=%d\n", irq);
453                 panic("\n");
454         }
455
456         spin_lock_irqsave(&toshiba_rbtx4927_ioc_lock, flags);
457
458         v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
459         v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
460         TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v);
461
462         spin_unlock_irqrestore(&toshiba_rbtx4927_ioc_lock, flags);
463
464         return;
465 }
466
467
468 static void toshiba_rbtx4927_irq_ioc_mask_and_ack(unsigned int irq)
469 {
470         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_MASK,
471                                      "irq=%d\n", irq);
472
473         if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
474             || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
475                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
476                                              "bad irq=%d\n", irq);
477                 panic("\n");
478         }
479
480         toshiba_rbtx4927_irq_ioc_disable(irq);
481
482         return;
483 }
484
485
486 static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq)
487 {
488         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ,
489                                      "irq=%d\n", irq);
490
491         if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
492             || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
493                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
494                                              "bad irq=%d\n", irq);
495                 panic("\n");
496         }
497
498         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
499                 toshiba_rbtx4927_irq_ioc_enable(irq);
500         }
501
502         return;
503 }
504
505
506 /**********************************************************************************/
507 /* Functions for isa                                                              */
508 /**********************************************************************************/
509
510
511 #ifdef CONFIG_TOSHIBA_FPCIB0
512 static void __init toshiba_rbtx4927_irq_isa_init(void)
513 {
514         int i;
515
516         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_INIT,
517                                      "beg=%d end=%d\n",
518                                      TOSHIBA_RBTX4927_IRQ_ISA_BEG,
519                                      TOSHIBA_RBTX4927_IRQ_ISA_END);
520
521         for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG;
522              i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++) {
523                 irq_desc[i].status = IRQ_DISABLED;
524                 irq_desc[i].action = 0;
525                 irq_desc[i].depth =
526                     ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5));
527                 irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type;
528         }
529
530         setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
531                   &toshiba_rbtx4927_irq_isa_master);
532         setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA,
533                   &toshiba_rbtx4927_irq_isa_slave);
534
535         /* make sure we are looking at IRR (not ISR) */
536         outb(0x0A, 0x20);
537         outb(0x0A, 0xA0);
538
539         return;
540 }
541 #endif
542
543
544 #ifdef CONFIG_TOSHIBA_FPCIB0
545 static unsigned int toshiba_rbtx4927_irq_isa_startup(unsigned int irq)
546 {
547         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_STARTUP,
548                                      "irq=%d\n", irq);
549
550         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
551             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
552                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
553                                              "bad irq=%d\n", irq);
554                 panic("\n");
555         }
556
557         toshiba_rbtx4927_irq_isa_enable(irq);
558
559         return (0);
560 }
561 #endif
562
563
564 #ifdef CONFIG_TOSHIBA_FPCIB0
565 static void toshiba_rbtx4927_irq_isa_shutdown(unsigned int irq)
566 {
567         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN,
568                                      "irq=%d\n", irq);
569
570         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
571             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
572                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
573                                              "bad irq=%d\n", irq);
574                 panic("\n");
575         }
576
577         toshiba_rbtx4927_irq_isa_disable(irq);
578
579         return;
580 }
581 #endif
582
583
584 #ifdef CONFIG_TOSHIBA_FPCIB0
585 static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq)
586 {
587         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_ENABLE,
588                                      "irq=%d\n", irq);
589
590         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
591             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
592                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
593                                              "bad irq=%d\n", irq);
594                 panic("\n");
595         }
596
597         enable_8259A_irq(irq);
598
599         return;
600 }
601 #endif
602
603
604 #ifdef CONFIG_TOSHIBA_FPCIB0
605 static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq)
606 {
607         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_DISABLE,
608                                      "irq=%d\n", irq);
609
610         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
611             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
612                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
613                                              "bad irq=%d\n", irq);
614                 panic("\n");
615         }
616
617         disable_8259A_irq(irq);
618
619         return;
620 }
621 #endif
622
623
624 #ifdef CONFIG_TOSHIBA_FPCIB0
625 static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq)
626 {
627         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_MASK,
628                                      "irq=%d\n", irq);
629
630         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
631             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
632                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
633                                              "bad irq=%d\n", irq);
634                 panic("\n");
635         }
636
637         mask_and_ack_8259A(irq);
638
639         return;
640 }
641 #endif
642
643
644 #ifdef CONFIG_TOSHIBA_FPCIB0
645 static void toshiba_rbtx4927_irq_isa_end(unsigned int irq)
646 {
647         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ,
648                                      "irq=%d\n", irq);
649
650         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
651             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
652                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
653                                              "bad irq=%d\n", irq);
654                 panic("\n");
655         }
656
657         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
658                 toshiba_rbtx4927_irq_isa_enable(irq);
659         }
660
661         return;
662 }
663 #endif
664
665
666 void __init arch_init_irq(void)
667 {
668         extern void tx4927_irq_init(void);
669
670         local_irq_disable();
671
672         tx4927_irq_init();
673         toshiba_rbtx4927_irq_ioc_init();
674 #ifdef CONFIG_TOSHIBA_FPCIB0
675         {
676                 if (tx4927_using_backplane) {
677                         toshiba_rbtx4927_irq_isa_init();
678                 }
679         }
680 #endif
681
682         wbflush();
683
684         return;
685 }
686
687 void toshiba_rbtx4927_irq_dump(char *key)
688 {
689 #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
690         {
691                 u32 i, j = 0;
692                 for (i = 0; i < NR_IRQS; i++) {
693                         if (strcmp(irq_desc[i].chip->typename, "none")
694                             == 0)
695                                 continue;
696
697                         if ((i >= 1)
698                             && (irq_desc[i - 1].chip->typename ==
699                                 irq_desc[i].chip->typename)) {
700                                 j++;
701                         } else {
702                                 j = 0;
703                         }
704                         TOSHIBA_RBTX4927_IRQ_DPRINTK
705                             (TOSHIBA_RBTX4927_IRQ_INFO,
706                              "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
707                              key, i, i, irq_desc[i].status,
708                              (u32) irq_desc[i].chip,
709                              (u32) irq_desc[i].action,
710                              (u32) (irq_desc[i].action ? irq_desc[i].
711                                     action->handler : 0),
712                              irq_desc[i].depth,
713                              irq_desc[i].chip->typename, j);
714                 }
715         }
716 #endif
717         return;
718 }
719
720 void toshiba_rbtx4927_irq_dump_pics(char *s)
721 {
722         u32 level0_m;
723         u32 level0_s;
724         u32 level1_m;
725         u32 level1_s;
726         u32 level2;
727         u32 level2_p;
728         u32 level2_s;
729         u32 level3_m;
730         u32 level3_s;
731         u32 level4_m;
732         u32 level4_s;
733         u32 level5_m;
734         u32 level5_s;
735
736         if (s == NULL)
737                 s = "null";
738
739         level0_m = (read_c0_status() & 0x0000ff00) >> 8;
740         level0_s = (read_c0_cause() & 0x0000ff00) >> 8;
741
742         level1_m = level0_m;
743         level1_s = level0_s & 0x87;
744
745         level2 = TX4927_RD(0xff1ff6a0);
746         level2_p = (((level2 & 0x10000)) ? 0 : 1);
747         level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f));
748
749         level3_m = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f;
750         level3_s = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
751
752         level4_m = inb(0x21);
753         outb(0x0A, 0x20);
754         level4_s = inb(0x20);
755
756         level5_m = inb(0xa1);
757         outb(0x0A, 0xa0);
758         level5_s = inb(0xa0);
759
760         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
761                                      "dump_raw_pic() ");
762         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
763                                      "cp0:m=0x%02x/s=0x%02x ", level0_m,
764                                      level0_s);
765         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
766                                      "cp0:m=0x%02x/s=0x%02x ", level1_m,
767                                      level1_s);
768         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
769                                      "pic:e=0x%02x/s=0x%02x ", level2_p,
770                                      level2_s);
771         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
772                                      "ioc:m=0x%02x/s=0x%02x ", level3_m,
773                                      level3_s);
774         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
775                                      "sbm:m=0x%02x/s=0x%02x ", level4_m,
776                                      level4_s);
777         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
778                                      "sbs:m=0x%02x/s=0x%02x ", level5_m,
779                                      level5_s);
780         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n",
781                                      s);
782
783         return;
784 }