arch/alpha/boot/tools/objstrip.c: Mark "usage" static
[linux-2.6.git] / arch / m68knommu / platform / 527x / gpio.c
1 /*
2  * Coldfire generic GPIO support
3  *
4  * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18
19 #include <asm/coldfire.h>
20 #include <asm/mcfsim.h>
21 #include <asm/mcfgpio.h>
22
23 static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 #if defined(CONFIG_M5271)
25         {
26                 .gpio_chip                      = {
27                         .label                  = "PIRQ",
28                         .request                = mcf_gpio_request,
29                         .free                   = mcf_gpio_free,
30                         .direction_input        = mcf_gpio_direction_input,
31                         .direction_output       = mcf_gpio_direction_output,
32                         .get                    = mcf_gpio_get_value,
33                         .set                    = mcf_gpio_set_value,
34                         .ngpio                  = 8,
35                 },
36                 .pddr                           = MCFEPORT_EPDDR,
37                 .podr                           = MCFEPORT_EPDR,
38                 .ppdr                           = MCFEPORT_EPPDR,
39         },
40         {
41                 .gpio_chip                      = {
42                         .label                  = "ADDR",
43                         .request                = mcf_gpio_request,
44                         .free                   = mcf_gpio_free,
45                         .direction_input        = mcf_gpio_direction_input,
46                         .direction_output       = mcf_gpio_direction_output,
47                         .get                    = mcf_gpio_get_value,
48                         .set                    = mcf_gpio_set_value_fast,
49                         .base                   = 13,
50                         .ngpio                  = 3,
51                 },
52                 .pddr                           = MCFGPIO_PDDR_ADDR,
53                 .podr                           = MCFGPIO_PODR_ADDR,
54                 .ppdr                           = MCFGPIO_PPDSDR_ADDR,
55                 .setr                           = MCFGPIO_PPDSDR_ADDR,
56                 .clrr                           = MCFGPIO_PCLRR_ADDR,
57         },
58         {
59                 .gpio_chip                      = {
60                         .label                  = "DATAH",
61                         .request                = mcf_gpio_request,
62                         .free                   = mcf_gpio_free,
63                         .direction_input        = mcf_gpio_direction_input,
64                         .direction_output       = mcf_gpio_direction_output,
65                         .get                    = mcf_gpio_get_value,
66                         .set                    = mcf_gpio_set_value_fast,
67                         .base                   = 16,
68                         .ngpio                  = 8,
69                 },
70                 .pddr                           = MCFGPIO_PDDR_DATAH,
71                 .podr                           = MCFGPIO_PODR_DATAH,
72                 .ppdr                           = MCFGPIO_PPDSDR_DATAH,
73                 .setr                           = MCFGPIO_PPDSDR_DATAH,
74                 .clrr                           = MCFGPIO_PCLRR_DATAH,
75         },
76         {
77                 .gpio_chip                      = {
78                         .label                  = "DATAL",
79                         .request                = mcf_gpio_request,
80                         .free                   = mcf_gpio_free,
81                         .direction_input        = mcf_gpio_direction_input,
82                         .direction_output       = mcf_gpio_direction_output,
83                         .get                    = mcf_gpio_get_value,
84                         .set                    = mcf_gpio_set_value_fast,
85                         .base                   = 24,
86                         .ngpio                  = 8,
87                 },
88                 .pddr                           = MCFGPIO_PDDR_DATAL,
89                 .podr                           = MCFGPIO_PODR_DATAL,
90                 .ppdr                           = MCFGPIO_PPDSDR_DATAL,
91                 .setr                           = MCFGPIO_PPDSDR_DATAL,
92                 .clrr                           = MCFGPIO_PCLRR_DATAL,
93         },
94         {
95                 .gpio_chip                      = {
96                         .label                  = "BUSCTL",
97                         .request                = mcf_gpio_request,
98                         .free                   = mcf_gpio_free,
99                         .direction_input        = mcf_gpio_direction_input,
100                         .direction_output       = mcf_gpio_direction_output,
101                         .get                    = mcf_gpio_get_value,
102                         .set                    = mcf_gpio_set_value_fast,
103                         .base                   = 32,
104                         .ngpio                  = 8,
105                 },
106                 .pddr                           = MCFGPIO_PDDR_BUSCTL,
107                 .podr                           = MCFGPIO_PODR_BUSCTL,
108                 .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
109                 .setr                           = MCFGPIO_PPDSDR_BUSCTL,
110                 .clrr                           = MCFGPIO_PCLRR_BUSCTL,
111         },
112         {
113                 .gpio_chip                      = {
114                         .label                  = "BS",
115                         .request                = mcf_gpio_request,
116                         .free                   = mcf_gpio_free,
117                         .direction_input        = mcf_gpio_direction_input,
118                         .direction_output       = mcf_gpio_direction_output,
119                         .get                    = mcf_gpio_get_value,
120                         .set                    = mcf_gpio_set_value_fast,
121                         .base                   = 40,
122                         .ngpio                  = 4,
123                 },
124                 .pddr                           = MCFGPIO_PDDR_BS,
125                 .podr                           = MCFGPIO_PODR_BS,
126                 .ppdr                           = MCFGPIO_PPDSDR_BS,
127                 .setr                           = MCFGPIO_PPDSDR_BS,
128                 .clrr                           = MCFGPIO_PCLRR_BS,
129         },
130         {
131                 .gpio_chip                      = {
132                         .label                  = "CS",
133                         .request                = mcf_gpio_request,
134                         .free                   = mcf_gpio_free,
135                         .direction_input        = mcf_gpio_direction_input,
136                         .direction_output       = mcf_gpio_direction_output,
137                         .get                    = mcf_gpio_get_value,
138                         .set                    = mcf_gpio_set_value_fast,
139                         .base                   = 49,
140                         .ngpio                  = 7,
141                 },
142                 .pddr                           = MCFGPIO_PDDR_CS,
143                 .podr                           = MCFGPIO_PODR_CS,
144                 .ppdr                           = MCFGPIO_PPDSDR_CS,
145                 .setr                           = MCFGPIO_PPDSDR_CS,
146                 .clrr                           = MCFGPIO_PCLRR_CS,
147         },
148         {
149                 .gpio_chip                      = {
150                         .label                  = "SDRAM",
151                         .request                = mcf_gpio_request,
152                         .free                   = mcf_gpio_free,
153                         .direction_input        = mcf_gpio_direction_input,
154                         .direction_output       = mcf_gpio_direction_output,
155                         .get                    = mcf_gpio_get_value,
156                         .set                    = mcf_gpio_set_value_fast,
157                         .base                   = 56,
158                         .ngpio                  = 6,
159                 },
160                 .pddr                           = MCFGPIO_PDDR_SDRAM,
161                 .podr                           = MCFGPIO_PODR_SDRAM,
162                 .ppdr                           = MCFGPIO_PPDSDR_SDRAM,
163                 .setr                           = MCFGPIO_PPDSDR_SDRAM,
164                 .clrr                           = MCFGPIO_PCLRR_SDRAM,
165         },
166         {
167                 .gpio_chip                      = {
168                         .label                  = "FECI2C",
169                         .request                = mcf_gpio_request,
170                         .free                   = mcf_gpio_free,
171                         .direction_input        = mcf_gpio_direction_input,
172                         .direction_output       = mcf_gpio_direction_output,
173                         .get                    = mcf_gpio_get_value,
174                         .set                    = mcf_gpio_set_value_fast,
175                         .base                   = 64,
176                         .ngpio                  = 4,
177                 },
178                 .pddr                           = MCFGPIO_PDDR_FECI2C,
179                 .podr                           = MCFGPIO_PODR_FECI2C,
180                 .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
181                 .setr                           = MCFGPIO_PPDSDR_FECI2C,
182                 .clrr                           = MCFGPIO_PCLRR_FECI2C,
183         },
184         {
185                 .gpio_chip                      = {
186                         .label                  = "UARTH",
187                         .request                = mcf_gpio_request,
188                         .free                   = mcf_gpio_free,
189                         .direction_input        = mcf_gpio_direction_input,
190                         .direction_output       = mcf_gpio_direction_output,
191                         .get                    = mcf_gpio_get_value,
192                         .set                    = mcf_gpio_set_value_fast,
193                         .base                   = 72,
194                         .ngpio                  = 2,
195                 },
196                 .pddr                           = MCFGPIO_PDDR_UARTH,
197                 .podr                           = MCFGPIO_PODR_UARTH,
198                 .ppdr                           = MCFGPIO_PPDSDR_UARTH,
199                 .setr                           = MCFGPIO_PPDSDR_UARTH,
200                 .clrr                           = MCFGPIO_PCLRR_UARTH,
201         },
202         {
203                 .gpio_chip                      = {
204                         .label                  = "UARTL",
205                         .request                = mcf_gpio_request,
206                         .free                   = mcf_gpio_free,
207                         .direction_input        = mcf_gpio_direction_input,
208                         .direction_output       = mcf_gpio_direction_output,
209                         .get                    = mcf_gpio_get_value,
210                         .set                    = mcf_gpio_set_value_fast,
211                         .base                   = 80,
212                         .ngpio                  = 8,
213                 },
214                 .pddr                           = MCFGPIO_PDDR_UARTL,
215                 .podr                           = MCFGPIO_PODR_UARTL,
216                 .ppdr                           = MCFGPIO_PPDSDR_UARTL,
217                 .setr                           = MCFGPIO_PPDSDR_UARTL,
218                 .clrr                           = MCFGPIO_PCLRR_UARTL,
219         },
220         {
221                 .gpio_chip                      = {
222                         .label                  = "QSPI",
223                         .request                = mcf_gpio_request,
224                         .free                   = mcf_gpio_free,
225                         .direction_input        = mcf_gpio_direction_input,
226                         .direction_output       = mcf_gpio_direction_output,
227                         .get                    = mcf_gpio_get_value,
228                         .set                    = mcf_gpio_set_value_fast,
229                         .base                   = 88,
230                         .ngpio                  = 5,
231                 },
232                 .pddr                           = MCFGPIO_PDDR_QSPI,
233                 .podr                           = MCFGPIO_PODR_QSPI,
234                 .ppdr                           = MCFGPIO_PPDSDR_QSPI,
235                 .setr                           = MCFGPIO_PPDSDR_QSPI,
236                 .clrr                           = MCFGPIO_PCLRR_QSPI,
237         },
238         {
239                 .gpio_chip                      = {
240                         .label                  = "TIMER",
241                         .request                = mcf_gpio_request,
242                         .free                   = mcf_gpio_free,
243                         .direction_input        = mcf_gpio_direction_input,
244                         .direction_output       = mcf_gpio_direction_output,
245                         .get                    = mcf_gpio_get_value,
246                         .set                    = mcf_gpio_set_value_fast,
247                         .base                   = 96,
248                         .ngpio                  = 8,
249                 },
250                 .pddr                           = MCFGPIO_PDDR_TIMER,
251                 .podr                           = MCFGPIO_PODR_TIMER,
252                 .ppdr                           = MCFGPIO_PPDSDR_TIMER,
253                 .setr                           = MCFGPIO_PPDSDR_TIMER,
254                 .clrr                           = MCFGPIO_PCLRR_TIMER,
255         },
256 #elif defined(CONFIG_M5275)
257         {
258                 .gpio_chip                      = {
259                         .label                  = "PIRQ",
260                         .request                = mcf_gpio_request,
261                         .free                   = mcf_gpio_free,
262                         .direction_input        = mcf_gpio_direction_input,
263                         .direction_output       = mcf_gpio_direction_output,
264                         .get                    = mcf_gpio_get_value,
265                         .set                    = mcf_gpio_set_value,
266                         .ngpio                  = 8,
267                 },
268                 .pddr                           = MCFEPORT_EPDDR,
269                 .podr                           = MCFEPORT_EPDR,
270                 .ppdr                           = MCFEPORT_EPPDR,
271         },
272         {
273                 .gpio_chip                      = {
274                         .label                  = "BUSCTL",
275                         .request                = mcf_gpio_request,
276                         .free                   = mcf_gpio_free,
277                         .direction_input        = mcf_gpio_direction_input,
278                         .direction_output       = mcf_gpio_direction_output,
279                         .get                    = mcf_gpio_get_value,
280                         .set                    = mcf_gpio_set_value_fast,
281                         .base                   = 8,
282                         .ngpio                  = 8,
283                 },
284                 .pddr                           = MCFGPIO_PDDR_BUSCTL,
285                 .podr                           = MCFGPIO_PODR_BUSCTL,
286                 .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
287                 .setr                           = MCFGPIO_PPDSDR_BUSCTL,
288                 .clrr                           = MCFGPIO_PCLRR_BUSCTL,
289         },
290         {
291                 .gpio_chip                      = {
292                         .label                  = "ADDR",
293                         .request                = mcf_gpio_request,
294                         .free                   = mcf_gpio_free,
295                         .direction_input        = mcf_gpio_direction_input,
296                         .direction_output       = mcf_gpio_direction_output,
297                         .get                    = mcf_gpio_get_value,
298                         .set                    = mcf_gpio_set_value_fast,
299                         .base                   = 21,
300                         .ngpio                  = 3,
301                 },
302                 .pddr                           = MCFGPIO_PDDR_ADDR,
303                 .podr                           = MCFGPIO_PODR_ADDR,
304                 .ppdr                           = MCFGPIO_PPDSDR_ADDR,
305                 .setr                           = MCFGPIO_PPDSDR_ADDR,
306                 .clrr                           = MCFGPIO_PCLRR_ADDR,
307         },
308         {
309                 .gpio_chip                      = {
310                         .label                  = "CS",
311                         .request                = mcf_gpio_request,
312                         .free                   = mcf_gpio_free,
313                         .direction_input        = mcf_gpio_direction_input,
314                         .direction_output       = mcf_gpio_direction_output,
315                         .get                    = mcf_gpio_get_value,
316                         .set                    = mcf_gpio_set_value_fast,
317                         .base                   = 25,
318                         .ngpio                  = 7,
319                 },
320                 .pddr                           = MCFGPIO_PDDR_CS,
321                 .podr                           = MCFGPIO_PODR_CS,
322                 .ppdr                           = MCFGPIO_PPDSDR_CS,
323                 .setr                           = MCFGPIO_PPDSDR_CS,
324                 .clrr                           = MCFGPIO_PCLRR_CS,
325         },
326         {
327                 .gpio_chip                      = {
328                         .label                  = "FEC0H",
329                         .request                = mcf_gpio_request,
330                         .free                   = mcf_gpio_free,
331                         .direction_input        = mcf_gpio_direction_input,
332                         .direction_output       = mcf_gpio_direction_output,
333                         .get                    = mcf_gpio_get_value,
334                         .set                    = mcf_gpio_set_value_fast,
335                         .base                   = 32,
336                         .ngpio                  = 8,
337                 },
338                 .pddr                           = MCFGPIO_PDDR_FEC0H,
339                 .podr                           = MCFGPIO_PODR_FEC0H,
340                 .ppdr                           = MCFGPIO_PPDSDR_FEC0H,
341                 .setr                           = MCFGPIO_PPDSDR_FEC0H,
342                 .clrr                           = MCFGPIO_PCLRR_FEC0H,
343         },
344         {
345                 .gpio_chip                      = {
346                         .label                  = "FEC0L",
347                         .request                = mcf_gpio_request,
348                         .free                   = mcf_gpio_free,
349                         .direction_input        = mcf_gpio_direction_input,
350                         .direction_output       = mcf_gpio_direction_output,
351                         .get                    = mcf_gpio_get_value,
352                         .set                    = mcf_gpio_set_value_fast,
353                         .base                   = 40,
354                         .ngpio                  = 8,
355                 },
356                 .pddr                           = MCFGPIO_PDDR_FEC0L,
357                 .podr                           = MCFGPIO_PODR_FEC0L,
358                 .ppdr                           = MCFGPIO_PPDSDR_FEC0L,
359                 .setr                           = MCFGPIO_PPDSDR_FEC0L,
360                 .clrr                           = MCFGPIO_PCLRR_FEC0L,
361         },
362         {
363                 .gpio_chip                      = {
364                         .label                  = "FECI2C",
365                         .request                = mcf_gpio_request,
366                         .free                   = mcf_gpio_free,
367                         .direction_input        = mcf_gpio_direction_input,
368                         .direction_output       = mcf_gpio_direction_output,
369                         .get                    = mcf_gpio_get_value,
370                         .set                    = mcf_gpio_set_value_fast,
371                         .base                   = 48,
372                         .ngpio                  = 6,
373                 },
374                 .pddr                           = MCFGPIO_PDDR_FECI2C,
375                 .podr                           = MCFGPIO_PODR_FECI2C,
376                 .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
377                 .setr                           = MCFGPIO_PPDSDR_FECI2C,
378                 .clrr                           = MCFGPIO_PCLRR_FECI2C,
379         },
380         {
381                 .gpio_chip                      = {
382                         .label                  = "QSPI",
383                         .request                = mcf_gpio_request,
384                         .free                   = mcf_gpio_free,
385                         .direction_input        = mcf_gpio_direction_input,
386                         .direction_output       = mcf_gpio_direction_output,
387                         .get                    = mcf_gpio_get_value,
388                         .set                    = mcf_gpio_set_value_fast,
389                         .base                   = 56,
390                         .ngpio                  = 7,
391                 },
392                 .pddr                           = MCFGPIO_PDDR_QSPI,
393                 .podr                           = MCFGPIO_PODR_QSPI,
394                 .ppdr                           = MCFGPIO_PPDSDR_QSPI,
395                 .setr                           = MCFGPIO_PPDSDR_QSPI,
396                 .clrr                           = MCFGPIO_PCLRR_QSPI,
397         },
398         {
399                 .gpio_chip                      = {
400                         .label                  = "SDRAM",
401                         .request                = mcf_gpio_request,
402                         .free                   = mcf_gpio_free,
403                         .direction_input        = mcf_gpio_direction_input,
404                         .direction_output       = mcf_gpio_direction_output,
405                         .get                    = mcf_gpio_get_value,
406                         .set                    = mcf_gpio_set_value_fast,
407                         .base                   = 64,
408                         .ngpio                  = 8,
409                 },
410                 .pddr                           = MCFGPIO_PDDR_SDRAM,
411                 .podr                           = MCFGPIO_PODR_SDRAM,
412                 .ppdr                           = MCFGPIO_PPDSDR_SDRAM,
413                 .setr                           = MCFGPIO_PPDSDR_SDRAM,
414                 .clrr                           = MCFGPIO_PCLRR_SDRAM,
415         },
416         {
417                 .gpio_chip                      = {
418                         .label                  = "TIMERH",
419                         .request                = mcf_gpio_request,
420                         .free                   = mcf_gpio_free,
421                         .direction_input        = mcf_gpio_direction_input,
422                         .direction_output       = mcf_gpio_direction_output,
423                         .get                    = mcf_gpio_get_value,
424                         .set                    = mcf_gpio_set_value_fast,
425                         .base                   = 72,
426                         .ngpio                  = 4,
427                 },
428                 .pddr                           = MCFGPIO_PDDR_TIMERH,
429                 .podr                           = MCFGPIO_PODR_TIMERH,
430                 .ppdr                           = MCFGPIO_PPDSDR_TIMERH,
431                 .setr                           = MCFGPIO_PPDSDR_TIMERH,
432                 .clrr                           = MCFGPIO_PCLRR_TIMERH,
433         },
434         {
435                 .gpio_chip                      = {
436                         .label                  = "TIMERL",
437                         .request                = mcf_gpio_request,
438                         .free                   = mcf_gpio_free,
439                         .direction_input        = mcf_gpio_direction_input,
440                         .direction_output       = mcf_gpio_direction_output,
441                         .get                    = mcf_gpio_get_value,
442                         .set                    = mcf_gpio_set_value_fast,
443                         .base                   = 80,
444                         .ngpio                  = 4,
445                 },
446                 .pddr                           = MCFGPIO_PDDR_TIMERL,
447                 .podr                           = MCFGPIO_PODR_TIMERL,
448                 .ppdr                           = MCFGPIO_PPDSDR_TIMERL,
449                 .setr                           = MCFGPIO_PPDSDR_TIMERL,
450                 .clrr                           = MCFGPIO_PCLRR_TIMERL,
451         },
452         {
453                 .gpio_chip                      = {
454                         .label                  = "UARTL",
455                         .request                = mcf_gpio_request,
456                         .free                   = mcf_gpio_free,
457                         .direction_input        = mcf_gpio_direction_input,
458                         .direction_output       = mcf_gpio_direction_output,
459                         .get                    = mcf_gpio_get_value,
460                         .set                    = mcf_gpio_set_value_fast,
461                         .base                   = 88,
462                         .ngpio                  = 8,
463                 },
464                 .pddr                           = MCFGPIO_PDDR_UARTL,
465                 .podr                           = MCFGPIO_PODR_UARTL,
466                 .ppdr                           = MCFGPIO_PPDSDR_UARTL,
467                 .setr                           = MCFGPIO_PPDSDR_UARTL,
468                 .clrr                           = MCFGPIO_PCLRR_UARTL,
469         },
470         {
471                 .gpio_chip                      = {
472                         .label                  = "FEC1H",
473                         .request                = mcf_gpio_request,
474                         .free                   = mcf_gpio_free,
475                         .direction_input        = mcf_gpio_direction_input,
476                         .direction_output       = mcf_gpio_direction_output,
477                         .get                    = mcf_gpio_get_value,
478                         .set                    = mcf_gpio_set_value_fast,
479                         .base                   = 96,
480                         .ngpio                  = 8,
481                 },
482                 .pddr                           = MCFGPIO_PDDR_FEC1H,
483                 .podr                           = MCFGPIO_PODR_FEC1H,
484                 .ppdr                           = MCFGPIO_PPDSDR_FEC1H,
485                 .setr                           = MCFGPIO_PPDSDR_FEC1H,
486                 .clrr                           = MCFGPIO_PCLRR_FEC1H,
487         },
488         {
489                 .gpio_chip                      = {
490                         .label                  = "FEC1L",
491                         .request                = mcf_gpio_request,
492                         .free                   = mcf_gpio_free,
493                         .direction_input        = mcf_gpio_direction_input,
494                         .direction_output       = mcf_gpio_direction_output,
495                         .get                    = mcf_gpio_get_value,
496                         .set                    = mcf_gpio_set_value_fast,
497                         .base                   = 104,
498                         .ngpio                  = 8,
499                 },
500                 .pddr                           = MCFGPIO_PDDR_FEC1L,
501                 .podr                           = MCFGPIO_PODR_FEC1L,
502                 .ppdr                           = MCFGPIO_PPDSDR_FEC1L,
503                 .setr                           = MCFGPIO_PPDSDR_FEC1L,
504                 .clrr                           = MCFGPIO_PCLRR_FEC1L,
505         },
506         {
507                 .gpio_chip                      = {
508                         .label                  = "BS",
509                         .request                = mcf_gpio_request,
510                         .free                   = mcf_gpio_free,
511                         .direction_input        = mcf_gpio_direction_input,
512                         .direction_output       = mcf_gpio_direction_output,
513                         .get                    = mcf_gpio_get_value,
514                         .set                    = mcf_gpio_set_value_fast,
515                         .base                   = 114,
516                         .ngpio                  = 2,
517                 },
518                 .pddr                           = MCFGPIO_PDDR_BS,
519                 .podr                           = MCFGPIO_PODR_BS,
520                 .ppdr                           = MCFGPIO_PPDSDR_BS,
521                 .setr                           = MCFGPIO_PPDSDR_BS,
522                 .clrr                           = MCFGPIO_PCLRR_BS,
523         },
524         {
525                 .gpio_chip                      = {
526                         .label                  = "IRQ",
527                         .request                = mcf_gpio_request,
528                         .free                   = mcf_gpio_free,
529                         .direction_input        = mcf_gpio_direction_input,
530                         .direction_output       = mcf_gpio_direction_output,
531                         .get                    = mcf_gpio_get_value,
532                         .set                    = mcf_gpio_set_value_fast,
533                         .base                   = 121,
534                         .ngpio                  = 7,
535                 },
536                 .pddr                           = MCFGPIO_PDDR_IRQ,
537                 .podr                           = MCFGPIO_PODR_IRQ,
538                 .ppdr                           = MCFGPIO_PPDSDR_IRQ,
539                 .setr                           = MCFGPIO_PPDSDR_IRQ,
540                 .clrr                           = MCFGPIO_PCLRR_IRQ,
541         },
542         {
543                 .gpio_chip                      = {
544                         .label                  = "USBH",
545                         .request                = mcf_gpio_request,
546                         .free                   = mcf_gpio_free,
547                         .direction_input        = mcf_gpio_direction_input,
548                         .direction_output       = mcf_gpio_direction_output,
549                         .get                    = mcf_gpio_get_value,
550                         .set                    = mcf_gpio_set_value_fast,
551                         .base                   = 128,
552                         .ngpio                  = 1,
553                 },
554                 .pddr                           = MCFGPIO_PDDR_USBH,
555                 .podr                           = MCFGPIO_PODR_USBH,
556                 .ppdr                           = MCFGPIO_PPDSDR_USBH,
557                 .setr                           = MCFGPIO_PPDSDR_USBH,
558                 .clrr                           = MCFGPIO_PCLRR_USBH,
559         },
560         {
561                 .gpio_chip                      = {
562                         .label                  = "USBL",
563                         .request                = mcf_gpio_request,
564                         .free                   = mcf_gpio_free,
565                         .direction_input        = mcf_gpio_direction_input,
566                         .direction_output       = mcf_gpio_direction_output,
567                         .get                    = mcf_gpio_get_value,
568                         .set                    = mcf_gpio_set_value_fast,
569                         .base                   = 136,
570                         .ngpio                  = 8,
571                 },
572                 .pddr                           = MCFGPIO_PDDR_USBL,
573                 .podr                           = MCFGPIO_PODR_USBL,
574                 .ppdr                           = MCFGPIO_PPDSDR_USBL,
575                 .setr                           = MCFGPIO_PPDSDR_USBL,
576                 .clrr                           = MCFGPIO_PCLRR_USBL,
577         },
578         {
579                 .gpio_chip                      = {
580                         .label                  = "UARTH",
581                         .request                = mcf_gpio_request,
582                         .free                   = mcf_gpio_free,
583                         .direction_input        = mcf_gpio_direction_input,
584                         .direction_output       = mcf_gpio_direction_output,
585                         .get                    = mcf_gpio_get_value,
586                         .set                    = mcf_gpio_set_value_fast,
587                         .base                   = 144,
588                         .ngpio                  = 4,
589                 },
590                 .pddr                           = MCFGPIO_PDDR_UARTH,
591                 .podr                           = MCFGPIO_PODR_UARTH,
592                 .ppdr                           = MCFGPIO_PPDSDR_UARTH,
593                 .setr                           = MCFGPIO_PPDSDR_UARTH,
594                 .clrr                           = MCFGPIO_PCLRR_UARTH,
595         },
596 #endif
597 };
598
599 static int __init mcf_gpio_init(void)
600 {
601         unsigned i = 0;
602         while (i < ARRAY_SIZE(mcf_gpio_chips))
603                 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
604         return 0;
605 }
606
607 core_initcall(mcf_gpio_init);