generic GPIO support for the Freescale Coldfire 520x.
[linux-2.6.git] / arch / m68knommu / platform / 520x / gpio.c
1 /*
2  * Coldfire generic GPIO support
3  *
4  * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18
19 #include <asm/coldfire.h>
20 #include <asm/mcfsim.h>
21 #include <asm/mcfgpio.h>
22
23 static struct mcf_gpio_chip mcf_gpio_chips[] = {
24         {
25                 .gpio_chip                      = {
26                         .label                  = "PIRQ",
27                         .request                = mcf_gpio_request,
28                         .free                   = mcf_gpio_free,
29                         .direction_input        = mcf_gpio_direction_input,
30                         .direction_output       = mcf_gpio_direction_output,
31                         .get                    = mcf_gpio_get_value,
32                         .set                    = mcf_gpio_set_value,
33                         .ngpio                  = 8,
34                 },
35                 .pddr                           = MCFEPORT_EPDDR,
36                 .podr                           = MCFEPORT_EPDR,
37                 .ppdr                           = MCFEPORT_EPPDR,
38         },
39         {
40                 .gpio_chip                      = {
41                         .label                  = "BUSCTL",
42                         .request                = mcf_gpio_request,
43                         .free                   = mcf_gpio_free,
44                         .direction_input        = mcf_gpio_direction_input,
45                         .direction_output       = mcf_gpio_direction_output,
46                         .get                    = mcf_gpio_get_value,
47                         .set                    = mcf_gpio_set_value_fast,
48                         .base                   = 8,
49                         .ngpio                  = 4,
50                 },
51                 .pddr                           = MCFGPIO_PDDR_BUSCTL,
52                 .podr                           = MCFGPIO_PODR_BUSCTL,
53                 .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
54                 .setr                           = MCFGPIO_PPDSDR_BUSCTL,
55                 .clrr                           = MCFGPIO_PCLRR_BUSCTL,
56         },
57         {
58                 .gpio_chip                      = {
59                         .label                  = "BE",
60                         .request                = mcf_gpio_request,
61                         .free                   = mcf_gpio_free,
62                         .direction_input        = mcf_gpio_direction_input,
63                         .direction_output       = mcf_gpio_direction_output,
64                         .get                    = mcf_gpio_get_value,
65                         .set                    = mcf_gpio_set_value_fast,
66                         .base                   = 16,
67                         .ngpio                  = 4,
68                 },
69                 .pddr                           = MCFGPIO_PDDR_BE,
70                 .podr                           = MCFGPIO_PODR_BE,
71                 .ppdr                           = MCFGPIO_PPDSDR_BE,
72                 .setr                           = MCFGPIO_PPDSDR_BE,
73                 .clrr                           = MCFGPIO_PCLRR_BE,
74         },
75         {
76                 .gpio_chip                      = {
77                         .label                  = "CS",
78                         .request                = mcf_gpio_request,
79                         .free                   = mcf_gpio_free,
80                         .direction_input        = mcf_gpio_direction_input,
81                         .direction_output       = mcf_gpio_direction_output,
82                         .get                    = mcf_gpio_get_value,
83                         .set                    = mcf_gpio_set_value_fast,
84                         .base                   = 25,
85                         .ngpio                  = 3,
86                 },
87                 .pddr                           = MCFGPIO_PDDR_CS,
88                 .podr                           = MCFGPIO_PODR_CS,
89                 .ppdr                           = MCFGPIO_PPDSDR_CS,
90                 .setr                           = MCFGPIO_PPDSDR_CS,
91                 .clrr                           = MCFGPIO_PCLRR_CS,
92         },
93         {
94                 .gpio_chip                      = {
95                         .label                  = "FECI2C",
96                         .request                = mcf_gpio_request,
97                         .free                   = mcf_gpio_free,
98                         .direction_input        = mcf_gpio_direction_input,
99                         .direction_output       = mcf_gpio_direction_output,
100                         .get                    = mcf_gpio_get_value,
101                         .set                    = mcf_gpio_set_value_fast,
102                         .base                   = 32,
103                         .ngpio                  = 4,
104                 },
105                 .pddr                           = MCFGPIO_PDDR_FECI2C,
106                 .podr                           = MCFGPIO_PODR_FECI2C,
107                 .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
108                 .setr                           = MCFGPIO_PPDSDR_FECI2C,
109                 .clrr                           = MCFGPIO_PCLRR_FECI2C,
110         },
111         {
112                 .gpio_chip                      = {
113                         .label                  = "QSPI",
114                         .request                = mcf_gpio_request,
115                         .free                   = mcf_gpio_free,
116                         .direction_input        = mcf_gpio_direction_input,
117                         .direction_output       = mcf_gpio_direction_output,
118                         .get                    = mcf_gpio_get_value,
119                         .set                    = mcf_gpio_set_value_fast,
120                         .base                   = 40,
121                         .ngpio                  = 4,
122                 },
123                 .pddr                           = MCFGPIO_PDDR_QSPI,
124                 .podr                           = MCFGPIO_PODR_QSPI,
125                 .ppdr                           = MCFGPIO_PPDSDR_QSPI,
126                 .setr                           = MCFGPIO_PPDSDR_QSPI,
127                 .clrr                           = MCFGPIO_PCLRR_QSPI,
128         },
129         {
130                 .gpio_chip                      = {
131                         .label                  = "TIMER",
132                         .request                = mcf_gpio_request,
133                         .free                   = mcf_gpio_free,
134                         .direction_input        = mcf_gpio_direction_input,
135                         .direction_output       = mcf_gpio_direction_output,
136                         .get                    = mcf_gpio_get_value,
137                         .set                    = mcf_gpio_set_value_fast,
138                         .base                   = 48,
139                         .ngpio                  = 4,
140                 },
141                 .pddr                           = MCFGPIO_PDDR_TIMER,
142                 .podr                           = MCFGPIO_PODR_TIMER,
143                 .ppdr                           = MCFGPIO_PPDSDR_TIMER,
144                 .setr                           = MCFGPIO_PPDSDR_TIMER,
145                 .clrr                           = MCFGPIO_PCLRR_TIMER,
146         },
147         {
148                 .gpio_chip                      = {
149                         .label                  = "UART",
150                         .request                = mcf_gpio_request,
151                         .free                   = mcf_gpio_free,
152                         .direction_input        = mcf_gpio_direction_input,
153                         .direction_output       = mcf_gpio_direction_output,
154                         .get                    = mcf_gpio_get_value,
155                         .set                    = mcf_gpio_set_value_fast,
156                         .base                   = 56,
157                         .ngpio                  = 8,
158                 },
159                 .pddr                           = MCFGPIO_PDDR_UART,
160                 .podr                           = MCFGPIO_PODR_UART,
161                 .ppdr                           = MCFGPIO_PPDSDR_UART,
162                 .setr                           = MCFGPIO_PPDSDR_UART,
163                 .clrr                           = MCFGPIO_PCLRR_UART,
164         },
165         {
166                 .gpio_chip                      = {
167                         .label                  = "FECH",
168                         .request                = mcf_gpio_request,
169                         .free                   = mcf_gpio_free,
170                         .direction_input        = mcf_gpio_direction_input,
171                         .direction_output       = mcf_gpio_direction_output,
172                         .get                    = mcf_gpio_get_value,
173                         .set                    = mcf_gpio_set_value_fast,
174                         .base                   = 64,
175                         .ngpio                  = 8,
176                 },
177                 .pddr                           = MCFGPIO_PDDR_FECH,
178                 .podr                           = MCFGPIO_PODR_FECH,
179                 .ppdr                           = MCFGPIO_PPDSDR_FECH,
180                 .setr                           = MCFGPIO_PPDSDR_FECH,
181                 .clrr                           = MCFGPIO_PCLRR_FECH,
182         },
183         {
184                 .gpio_chip                      = {
185                         .label                  = "FECL",
186                         .request                = mcf_gpio_request,
187                         .free                   = mcf_gpio_free,
188                         .direction_input        = mcf_gpio_direction_input,
189                         .direction_output       = mcf_gpio_direction_output,
190                         .get                    = mcf_gpio_get_value,
191                         .set                    = mcf_gpio_set_value_fast,
192                         .base                   = 72,
193                         .ngpio                  = 8,
194                 },
195                 .pddr                           = MCFGPIO_PDDR_FECL,
196                 .podr                           = MCFGPIO_PODR_FECL,
197                 .ppdr                           = MCFGPIO_PPDSDR_FECL,
198                 .setr                           = MCFGPIO_PPDSDR_FECL,
199                 .clrr                           = MCFGPIO_PCLRR_FECL,
200         },
201 };
202
203 static int __init mcf_gpio_init(void)
204 {
205         unsigned i = 0;
206         while (i < ARRAY_SIZE(mcf_gpio_chips))
207                 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
208         return 0;
209 }
210
211 core_initcall(mcf_gpio_init);