9bc4de4a3ec0778aa4724e75457bd253a6b1e45e
[linux-2.6.git] / arch / ia64 / sn / pci / pcibr / pcibr_provider.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved.
7  */
8
9 #include <linux/interrupt.h>
10 #include <linux/types.h>
11 #include <linux/pci.h>
12 #include <asm/sn/addrs.h>
13 #include <asm/sn/geo.h>
14 #include <asm/sn/pcibr_provider.h>
15 #include <asm/sn/pcibus_provider_defs.h>
16 #include <asm/sn/pcidev.h>
17 #include <asm/sn/sn_sal.h>
18 #include "xtalk/xwidgetdev.h"
19 #include "xtalk/hubdev.h"
20
21 static int sal_pcibr_error_interrupt(struct pcibus_info *soft)
22 {
23         struct ia64_sal_retval ret_stuff;
24         uint64_t busnum;
25         int segment;
26         ret_stuff.status = 0;
27         ret_stuff.v0 = 0;
28
29         segment = 0;
30         busnum = soft->pbi_buscommon.bs_persist_busnum;
31         SAL_CALL_NOLOCK(ret_stuff,
32                         (u64) SN_SAL_IOIF_ERROR_INTERRUPT,
33                         (u64) segment, (u64) busnum, 0, 0, 0, 0, 0);
34
35         return (int)ret_stuff.v0;
36 }
37
38 /* 
39  * PCI Bridge Error interrupt handler.  Gets invoked whenever a PCI 
40  * bridge sends an error interrupt.
41  */
42 static irqreturn_t
43 pcibr_error_intr_handler(int irq, void *arg, struct pt_regs *regs)
44 {
45         struct pcibus_info *soft = (struct pcibus_info *)arg;
46
47         if (sal_pcibr_error_interrupt(soft) < 0) {
48                 panic("pcibr_error_intr_handler(): Fatal Bridge Error");
49         }
50         return IRQ_HANDLED;
51 }
52
53 void *
54 pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft)
55 {
56         int nasid, cnode, j;
57         struct hubdev_info *hubdev_info;
58         struct pcibus_info *soft;
59         struct sn_flush_device_list *sn_flush_device_list;
60
61         if (! IS_PCI_BRIDGE_ASIC(prom_bussoft->bs_asic_type)) {
62                 return NULL;
63         }
64
65         /*
66          * Allocate kernel bus soft and copy from prom.
67          */
68
69         soft = kmalloc(sizeof(struct pcibus_info), GFP_KERNEL);
70         if (!soft) {
71                 return NULL;
72         }
73
74         memcpy(soft, prom_bussoft, sizeof(struct pcibus_info));
75         soft->pbi_buscommon.bs_base =
76             (((u64) soft->pbi_buscommon.
77               bs_base << 4) >> 4) | __IA64_UNCACHED_OFFSET;
78
79         spin_lock_init(&soft->pbi_lock);
80
81         /*
82          * register the bridge's error interrupt handler
83          */
84         if (request_irq(SGI_PCIBR_ERROR, (void *)pcibr_error_intr_handler,
85                         SA_SHIRQ, "PCIBR error", (void *)(soft))) {
86                 printk(KERN_WARNING
87                        "pcibr cannot allocate interrupt for error handler\n");
88         }
89
90         /* 
91          * Update the Bridge with the "kernel" pagesize 
92          */
93         if (PAGE_SIZE < 16384) {
94                 pcireg_control_bit_clr(soft, PCIBR_CTRL_PAGE_SIZE);
95         } else {
96                 pcireg_control_bit_set(soft, PCIBR_CTRL_PAGE_SIZE);
97         }
98
99         nasid = NASID_GET(soft->pbi_buscommon.bs_base);
100         cnode = nasid_to_cnodeid(nasid);
101         hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
102
103         if (hubdev_info->hdi_flush_nasid_list.widget_p) {
104                 sn_flush_device_list = hubdev_info->hdi_flush_nasid_list.
105                     widget_p[(int)soft->pbi_buscommon.bs_xid];
106                 if (sn_flush_device_list) {
107                         for (j = 0; j < DEV_PER_WIDGET;
108                              j++, sn_flush_device_list++) {
109                                 if (sn_flush_device_list->sfdl_slot == -1)
110                                         continue;
111                                 if (sn_flush_device_list->
112                                     sfdl_persistent_busnum ==
113                                     soft->pbi_buscommon.bs_persist_busnum)
114                                         sn_flush_device_list->sfdl_pcibus_info =
115                                             soft;
116                         }
117                 }
118         }
119
120         /* Setup the PMU ATE map */
121         soft->pbi_int_ate_resource.lowest_free_index = 0;
122         soft->pbi_int_ate_resource.ate =
123             kmalloc(soft->pbi_int_ate_size * sizeof(uint64_t), GFP_KERNEL);
124         memset(soft->pbi_int_ate_resource.ate, 0,
125                (soft->pbi_int_ate_size * sizeof(uint64_t)));
126
127         return soft;
128 }
129
130 void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info)
131 {
132         struct pcidev_info *pcidev_info;
133         struct pcibus_info *pcibus_info;
134         int bit = sn_irq_info->irq_int_bit;
135
136         pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
137         if (pcidev_info) {
138                 pcibus_info =
139                     (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
140                     pdi_pcibus_info;
141                 pcireg_force_intr_set(pcibus_info, bit);
142         }
143 }
144
145 void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info)
146 {
147         struct pcidev_info *pcidev_info;
148         struct pcibus_info *pcibus_info;
149         int bit = sn_irq_info->irq_int_bit;
150         uint64_t xtalk_addr = sn_irq_info->irq_xtalkaddr;
151
152         pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
153         if (pcidev_info) {
154                 pcibus_info =
155                     (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
156                     pdi_pcibus_info;
157
158                 /* Disable the device's IRQ   */
159                 pcireg_intr_enable_bit_clr(pcibus_info, bit);
160
161                 /* Change the device's IRQ    */
162                 pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr);
163
164                 /* Re-enable the device's IRQ */
165                 pcireg_intr_enable_bit_set(pcibus_info, bit);
166
167                 pcibr_force_interrupt(sn_irq_info);
168         }
169 }
170
171 /*
172  * Provider entries for PIC/CP
173  */
174
175 struct sn_pcibus_provider pcibr_provider = {
176         .dma_map = pcibr_dma_map,
177         .dma_map_consistent = pcibr_dma_map_consistent,
178         .dma_unmap = pcibr_dma_unmap,
179         .bus_fixup = pcibr_bus_fixup,
180 };
181
182 int
183 pcibr_init_provider(void)
184 {
185         sn_pci_provider[PCIIO_ASIC_TYPE_PIC] = &pcibr_provider;
186         sn_pci_provider[PCIIO_ASIC_TYPE_TIOCP] = &pcibr_provider;
187
188         return 0;
189 }