[PATCH] lockdep: irqtrace subsystem, i386 support
[linux-2.6.git] / arch / i386 / kernel / irq.c
1 /*
2  *      linux/arch/i386/kernel/irq.c
3  *
4  *      Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
5  *
6  * This file contains the lowest level x86-specific interrupt
7  * entry, irq-stacks and irq statistics code. All the remaining
8  * irq logic is done by the generic kernel/irq/ code and
9  * by the x86-specific irq controller code. (e.g. i8259.c and
10  * io_apic.c.)
11  */
12
13 #include <asm/uaccess.h>
14 #include <linux/module.h>
15 #include <linux/seq_file.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 #include <linux/notifier.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21
22 DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp;
23 EXPORT_PER_CPU_SYMBOL(irq_stat);
24
25 #ifndef CONFIG_X86_LOCAL_APIC
26 /*
27  * 'what should we do if we get a hw irq event on an illegal vector'.
28  * each architecture has to answer this themselves.
29  */
30 void ack_bad_irq(unsigned int irq)
31 {
32         printk("unexpected IRQ trap at vector %02x\n", irq);
33 }
34 #endif
35
36 #ifdef CONFIG_4KSTACKS
37 /*
38  * per-CPU IRQ handling contexts (thread information and stack)
39  */
40 union irq_ctx {
41         struct thread_info      tinfo;
42         u32                     stack[THREAD_SIZE/sizeof(u32)];
43 };
44
45 static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
46 static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
47 #endif
48
49 /*
50  * do_IRQ handles all normal device IRQ's (the special
51  * SMP cross-CPU interrupts have their own specific
52  * handlers).
53  */
54 fastcall unsigned int do_IRQ(struct pt_regs *regs)
55 {       
56         /* high bit used in ret_from_ code */
57         int irq = ~regs->orig_eax;
58 #ifdef CONFIG_4KSTACKS
59         union irq_ctx *curctx, *irqctx;
60         u32 *isp;
61 #endif
62
63         if (unlikely((unsigned)irq >= NR_IRQS)) {
64                 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
65                                         __FUNCTION__, irq);
66                 BUG();
67         }
68
69         irq_enter();
70 #ifdef CONFIG_DEBUG_STACKOVERFLOW
71         /* Debugging check for stack overflow: is there less than 1KB free? */
72         {
73                 long esp;
74
75                 __asm__ __volatile__("andl %%esp,%0" :
76                                         "=r" (esp) : "0" (THREAD_SIZE - 1));
77                 if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
78                         printk("do_IRQ: stack overflow: %ld\n",
79                                 esp - sizeof(struct thread_info));
80                         dump_stack();
81                 }
82         }
83 #endif
84
85         if (!irq_desc[irq].handle_irq) {
86                 __do_IRQ(irq, regs);
87                 goto out_exit;
88         }
89 #ifdef CONFIG_4KSTACKS
90
91         curctx = (union irq_ctx *) current_thread_info();
92         irqctx = hardirq_ctx[smp_processor_id()];
93
94         /*
95          * this is where we switch to the IRQ stack. However, if we are
96          * already using the IRQ stack (because we interrupted a hardirq
97          * handler) we can't do that and just have to keep using the
98          * current stack (which is the irq stack already after all)
99          */
100         if (curctx != irqctx) {
101                 int arg1, arg2, ebx;
102
103                 /* build the stack frame on the IRQ stack */
104                 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
105                 irqctx->tinfo.task = curctx->tinfo.task;
106                 irqctx->tinfo.previous_esp = current_stack_pointer;
107
108                 /*
109                  * Copy the softirq bits in preempt_count so that the
110                  * softirq checks work in the hardirq context.
111                  */
112                 irqctx->tinfo.preempt_count =
113                         (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
114                         (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
115
116                 asm volatile(
117                         "       xchgl   %%ebx,%%esp      \n"
118                         "       call    __do_IRQ         \n"
119                         "       movl   %%ebx,%%esp      \n"
120                         : "=a" (arg1), "=d" (arg2), "=b" (ebx)
121                         :  "0" (irq),   "1" (regs),  "2" (isp)
122                         : "memory", "cc", "ecx"
123                 );
124         } else
125 #endif
126                 __do_IRQ(irq, regs);
127
128 out_exit:
129         irq_exit();
130
131         return 1;
132 }
133
134 #ifdef CONFIG_4KSTACKS
135
136 /*
137  * These should really be __section__(".bss.page_aligned") as well, but
138  * gcc's 3.0 and earlier don't handle that correctly.
139  */
140 static char softirq_stack[NR_CPUS * THREAD_SIZE]
141                 __attribute__((__aligned__(THREAD_SIZE)));
142
143 static char hardirq_stack[NR_CPUS * THREAD_SIZE]
144                 __attribute__((__aligned__(THREAD_SIZE)));
145
146 /*
147  * allocate per-cpu stacks for hardirq and for softirq processing
148  */
149 void irq_ctx_init(int cpu)
150 {
151         union irq_ctx *irqctx;
152
153         if (hardirq_ctx[cpu])
154                 return;
155
156         irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
157         irqctx->tinfo.task              = NULL;
158         irqctx->tinfo.exec_domain       = NULL;
159         irqctx->tinfo.cpu               = cpu;
160         irqctx->tinfo.preempt_count     = HARDIRQ_OFFSET;
161         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
162
163         hardirq_ctx[cpu] = irqctx;
164
165         irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
166         irqctx->tinfo.task              = NULL;
167         irqctx->tinfo.exec_domain       = NULL;
168         irqctx->tinfo.cpu               = cpu;
169         irqctx->tinfo.preempt_count     = 0;
170         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
171
172         softirq_ctx[cpu] = irqctx;
173
174         printk("CPU %u irqstacks, hard=%p soft=%p\n",
175                 cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
176 }
177
178 void irq_ctx_exit(int cpu)
179 {
180         hardirq_ctx[cpu] = NULL;
181 }
182
183 extern asmlinkage void __do_softirq(void);
184
185 asmlinkage void do_softirq(void)
186 {
187         unsigned long flags;
188         struct thread_info *curctx;
189         union irq_ctx *irqctx;
190         u32 *isp;
191
192         if (in_interrupt())
193                 return;
194
195         local_irq_save(flags);
196
197         if (local_softirq_pending()) {
198                 curctx = current_thread_info();
199                 irqctx = softirq_ctx[smp_processor_id()];
200                 irqctx->tinfo.task = curctx->task;
201                 irqctx->tinfo.previous_esp = current_stack_pointer;
202
203                 /* build the stack frame on the softirq stack */
204                 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
205
206                 asm volatile(
207                         "       xchgl   %%ebx,%%esp     \n"
208                         "       call    __do_softirq    \n"
209                         "       movl    %%ebx,%%esp     \n"
210                         : "=b"(isp)
211                         : "0"(isp)
212                         : "memory", "cc", "edx", "ecx", "eax"
213                 );
214                 /*
215                  * Shouldnt happen, we returned above if in_interrupt():
216                  */
217                 WARN_ON_ONCE(softirq_count());
218         }
219
220         local_irq_restore(flags);
221 }
222
223 EXPORT_SYMBOL(do_softirq);
224 #endif
225
226 /*
227  * Interrupt statistics:
228  */
229
230 atomic_t irq_err_count;
231
232 /*
233  * /proc/interrupts printing:
234  */
235
236 int show_interrupts(struct seq_file *p, void *v)
237 {
238         int i = *(loff_t *) v, j;
239         struct irqaction * action;
240         unsigned long flags;
241
242         if (i == 0) {
243                 seq_printf(p, "           ");
244                 for_each_online_cpu(j)
245                         seq_printf(p, "CPU%-8d",j);
246                 seq_putc(p, '\n');
247         }
248
249         if (i < NR_IRQS) {
250                 spin_lock_irqsave(&irq_desc[i].lock, flags);
251                 action = irq_desc[i].action;
252                 if (!action)
253                         goto skip;
254                 seq_printf(p, "%3d: ",i);
255 #ifndef CONFIG_SMP
256                 seq_printf(p, "%10u ", kstat_irqs(i));
257 #else
258                 for_each_online_cpu(j)
259                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
260 #endif
261                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
262                 seq_printf(p, "  %s", action->name);
263
264                 for (action=action->next; action; action = action->next)
265                         seq_printf(p, ", %s", action->name);
266
267                 seq_putc(p, '\n');
268 skip:
269                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
270         } else if (i == NR_IRQS) {
271                 seq_printf(p, "NMI: ");
272                 for_each_online_cpu(j)
273                         seq_printf(p, "%10u ", nmi_count(j));
274                 seq_putc(p, '\n');
275 #ifdef CONFIG_X86_LOCAL_APIC
276                 seq_printf(p, "LOC: ");
277                 for_each_online_cpu(j)
278                         seq_printf(p, "%10u ",
279                                 per_cpu(irq_stat,j).apic_timer_irqs);
280                 seq_putc(p, '\n');
281 #endif
282                 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
283 #if defined(CONFIG_X86_IO_APIC)
284                 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
285 #endif
286         }
287         return 0;
288 }
289
290 #ifdef CONFIG_HOTPLUG_CPU
291 #include <mach_apic.h>
292
293 void fixup_irqs(cpumask_t map)
294 {
295         unsigned int irq;
296         static int warned;
297
298         for (irq = 0; irq < NR_IRQS; irq++) {
299                 cpumask_t mask;
300                 if (irq == 2)
301                         continue;
302
303                 cpus_and(mask, irq_desc[irq].affinity, map);
304                 if (any_online_cpu(mask) == NR_CPUS) {
305                         printk("Breaking affinity for irq %i\n", irq);
306                         mask = map;
307                 }
308                 if (irq_desc[irq].chip->set_affinity)
309                         irq_desc[irq].chip->set_affinity(irq, mask);
310                 else if (irq_desc[irq].action && !(warned++))
311                         printk("Cannot set affinity for irq %i\n", irq);
312         }
313
314 #if 0
315         barrier();
316         /* Ingo Molnar says: "after the IO-APIC masks have been redirected
317            [note the nop - the interrupt-enable boundary on x86 is two
318            instructions from sti] - to flush out pending hardirqs and
319            IPIs. After this point nothing is supposed to reach this CPU." */
320         __asm__ __volatile__("sti; nop; cli");
321         barrier();
322 #else
323         /* That doesn't seem sufficient.  Give it 1ms. */
324         local_irq_enable();
325         mdelay(1);
326         local_irq_disable();
327 #endif
328 }
329 #endif
330