Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
[linux-2.6.git] / arch / blackfin / mach-bf548 / include / mach / cdefBF549.h
1 /*
2  * Copyright 2007-2010 Analog Devices Inc.
3  *
4  * Licensed under the GPL-2 or later.
5  */
6
7 #ifndef _CDEF_BF549_H
8 #define _CDEF_BF549_H
9
10 /* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */
11 #include "cdefBF54x_base.h"
12
13 /* The BF549 is like the BF544, but has MXVR */
14 #include "cdefBF547.h"
15
16 /* MXVR Registers */
17
18 #define bfin_read_MXVR_CONFIG()                 bfin_read16(MXVR_CONFIG)
19 #define bfin_write_MXVR_CONFIG(val)             bfin_write16(MXVR_CONFIG, val)
20 #define bfin_read_MXVR_STATE_0()                bfin_read32(MXVR_STATE_0)
21 #define bfin_write_MXVR_STATE_0(val)            bfin_write32(MXVR_STATE_0, val)
22 #define bfin_read_MXVR_STATE_1()                bfin_read32(MXVR_STATE_1)
23 #define bfin_write_MXVR_STATE_1(val)            bfin_write32(MXVR_STATE_1, val)
24 #define bfin_read_MXVR_INT_STAT_0()             bfin_read32(MXVR_INT_STAT_0)
25 #define bfin_write_MXVR_INT_STAT_0(val)         bfin_write32(MXVR_INT_STAT_0, val)
26 #define bfin_read_MXVR_INT_STAT_1()             bfin_read32(MXVR_INT_STAT_1)
27 #define bfin_write_MXVR_INT_STAT_1(val)         bfin_write32(MXVR_INT_STAT_1, val)
28 #define bfin_read_MXVR_INT_EN_0()               bfin_read32(MXVR_INT_EN_0)
29 #define bfin_write_MXVR_INT_EN_0(val)           bfin_write32(MXVR_INT_EN_0, val)
30 #define bfin_read_MXVR_INT_EN_1()               bfin_read32(MXVR_INT_EN_1)
31 #define bfin_write_MXVR_INT_EN_1(val)           bfin_write32(MXVR_INT_EN_1, val)
32 #define bfin_read_MXVR_POSITION()               bfin_read16(MXVR_POSITION)
33 #define bfin_write_MXVR_POSITION(val)           bfin_write16(MXVR_POSITION, val)
34 #define bfin_read_MXVR_MAX_POSITION()           bfin_read16(MXVR_MAX_POSITION)
35 #define bfin_write_MXVR_MAX_POSITION(val)       bfin_write16(MXVR_MAX_POSITION, val)
36 #define bfin_read_MXVR_DELAY()                  bfin_read16(MXVR_DELAY)
37 #define bfin_write_MXVR_DELAY(val)              bfin_write16(MXVR_DELAY, val)
38 #define bfin_read_MXVR_MAX_DELAY()              bfin_read16(MXVR_MAX_DELAY)
39 #define bfin_write_MXVR_MAX_DELAY(val)          bfin_write16(MXVR_MAX_DELAY, val)
40 #define bfin_read_MXVR_LADDR()                  bfin_read32(MXVR_LADDR)
41 #define bfin_write_MXVR_LADDR(val)              bfin_write32(MXVR_LADDR, val)
42 #define bfin_read_MXVR_GADDR()                  bfin_read16(MXVR_GADDR)
43 #define bfin_write_MXVR_GADDR(val)              bfin_write16(MXVR_GADDR, val)
44 #define bfin_read_MXVR_AADDR()                  bfin_read32(MXVR_AADDR)
45 #define bfin_write_MXVR_AADDR(val)              bfin_write32(MXVR_AADDR, val)
46
47 /* MXVR Allocation Table Registers */
48
49 #define bfin_read_MXVR_ALLOC_0()                bfin_read32(MXVR_ALLOC_0)
50 #define bfin_write_MXVR_ALLOC_0(val)            bfin_write32(MXVR_ALLOC_0, val)
51 #define bfin_read_MXVR_ALLOC_1()                bfin_read32(MXVR_ALLOC_1)
52 #define bfin_write_MXVR_ALLOC_1(val)            bfin_write32(MXVR_ALLOC_1, val)
53 #define bfin_read_MXVR_ALLOC_2()                bfin_read32(MXVR_ALLOC_2)
54 #define bfin_write_MXVR_ALLOC_2(val)            bfin_write32(MXVR_ALLOC_2, val)
55 #define bfin_read_MXVR_ALLOC_3()                bfin_read32(MXVR_ALLOC_3)
56 #define bfin_write_MXVR_ALLOC_3(val)            bfin_write32(MXVR_ALLOC_3, val)
57 #define bfin_read_MXVR_ALLOC_4()                bfin_read32(MXVR_ALLOC_4)
58 #define bfin_write_MXVR_ALLOC_4(val)            bfin_write32(MXVR_ALLOC_4, val)
59 #define bfin_read_MXVR_ALLOC_5()                bfin_read32(MXVR_ALLOC_5)
60 #define bfin_write_MXVR_ALLOC_5(val)            bfin_write32(MXVR_ALLOC_5, val)
61 #define bfin_read_MXVR_ALLOC_6()                bfin_read32(MXVR_ALLOC_6)
62 #define bfin_write_MXVR_ALLOC_6(val)            bfin_write32(MXVR_ALLOC_6, val)
63 #define bfin_read_MXVR_ALLOC_7()                bfin_read32(MXVR_ALLOC_7)
64 #define bfin_write_MXVR_ALLOC_7(val)            bfin_write32(MXVR_ALLOC_7, val)
65 #define bfin_read_MXVR_ALLOC_8()                bfin_read32(MXVR_ALLOC_8)
66 #define bfin_write_MXVR_ALLOC_8(val)            bfin_write32(MXVR_ALLOC_8, val)
67 #define bfin_read_MXVR_ALLOC_9()                bfin_read32(MXVR_ALLOC_9)
68 #define bfin_write_MXVR_ALLOC_9(val)            bfin_write32(MXVR_ALLOC_9, val)
69 #define bfin_read_MXVR_ALLOC_10()               bfin_read32(MXVR_ALLOC_10)
70 #define bfin_write_MXVR_ALLOC_10(val)           bfin_write32(MXVR_ALLOC_10, val)
71 #define bfin_read_MXVR_ALLOC_11()               bfin_read32(MXVR_ALLOC_11)
72 #define bfin_write_MXVR_ALLOC_11(val)           bfin_write32(MXVR_ALLOC_11, val)
73 #define bfin_read_MXVR_ALLOC_12()               bfin_read32(MXVR_ALLOC_12)
74 #define bfin_write_MXVR_ALLOC_12(val)           bfin_write32(MXVR_ALLOC_12, val)
75 #define bfin_read_MXVR_ALLOC_13()               bfin_read32(MXVR_ALLOC_13)
76 #define bfin_write_MXVR_ALLOC_13(val)           bfin_write32(MXVR_ALLOC_13, val)
77 #define bfin_read_MXVR_ALLOC_14()               bfin_read32(MXVR_ALLOC_14)
78 #define bfin_write_MXVR_ALLOC_14(val)           bfin_write32(MXVR_ALLOC_14, val)
79
80 /* MXVR Channel Assign Registers */
81
82 #define bfin_read_MXVR_SYNC_LCHAN_0()           bfin_read32(MXVR_SYNC_LCHAN_0)
83 #define bfin_write_MXVR_SYNC_LCHAN_0(val)       bfin_write32(MXVR_SYNC_LCHAN_0, val)
84 #define bfin_read_MXVR_SYNC_LCHAN_1()           bfin_read32(MXVR_SYNC_LCHAN_1)
85 #define bfin_write_MXVR_SYNC_LCHAN_1(val)       bfin_write32(MXVR_SYNC_LCHAN_1, val)
86 #define bfin_read_MXVR_SYNC_LCHAN_2()           bfin_read32(MXVR_SYNC_LCHAN_2)
87 #define bfin_write_MXVR_SYNC_LCHAN_2(val)       bfin_write32(MXVR_SYNC_LCHAN_2, val)
88 #define bfin_read_MXVR_SYNC_LCHAN_3()           bfin_read32(MXVR_SYNC_LCHAN_3)
89 #define bfin_write_MXVR_SYNC_LCHAN_3(val)       bfin_write32(MXVR_SYNC_LCHAN_3, val)
90 #define bfin_read_MXVR_SYNC_LCHAN_4()           bfin_read32(MXVR_SYNC_LCHAN_4)
91 #define bfin_write_MXVR_SYNC_LCHAN_4(val)       bfin_write32(MXVR_SYNC_LCHAN_4, val)
92 #define bfin_read_MXVR_SYNC_LCHAN_5()           bfin_read32(MXVR_SYNC_LCHAN_5)
93 #define bfin_write_MXVR_SYNC_LCHAN_5(val)       bfin_write32(MXVR_SYNC_LCHAN_5, val)
94 #define bfin_read_MXVR_SYNC_LCHAN_6()           bfin_read32(MXVR_SYNC_LCHAN_6)
95 #define bfin_write_MXVR_SYNC_LCHAN_6(val)       bfin_write32(MXVR_SYNC_LCHAN_6, val)
96 #define bfin_read_MXVR_SYNC_LCHAN_7()           bfin_read32(MXVR_SYNC_LCHAN_7)
97 #define bfin_write_MXVR_SYNC_LCHAN_7(val)       bfin_write32(MXVR_SYNC_LCHAN_7, val)
98
99 /* MXVR DMA0 Registers */
100
101 #define bfin_read_MXVR_DMA0_CONFIG()            bfin_read32(MXVR_DMA0_CONFIG)
102 #define bfin_write_MXVR_DMA0_CONFIG(val)        bfin_write32(MXVR_DMA0_CONFIG, val)
103 #define bfin_read_MXVR_DMA0_START_ADDR()        bfin_read32(MXVR_DMA0_START_ADDR)
104 #define bfin_write_MXVR_DMA0_START_ADDR(val)    bfin_write32(MXVR_DMA0_START_ADDR)
105 #define bfin_read_MXVR_DMA0_COUNT()             bfin_read16(MXVR_DMA0_COUNT)
106 #define bfin_write_MXVR_DMA0_COUNT(val)         bfin_write16(MXVR_DMA0_COUNT, val)
107 #define bfin_read_MXVR_DMA0_CURR_ADDR()         bfin_read32(MXVR_DMA0_CURR_ADDR)
108 #define bfin_write_MXVR_DMA0_CURR_ADDR(val)     bfin_write32(MXVR_DMA0_CURR_ADDR)
109 #define bfin_read_MXVR_DMA0_CURR_COUNT()        bfin_read16(MXVR_DMA0_CURR_COUNT)
110 #define bfin_write_MXVR_DMA0_CURR_COUNT(val)    bfin_write16(MXVR_DMA0_CURR_COUNT, val)
111
112 /* MXVR DMA1 Registers */
113
114 #define bfin_read_MXVR_DMA1_CONFIG()            bfin_read32(MXVR_DMA1_CONFIG)
115 #define bfin_write_MXVR_DMA1_CONFIG(val)        bfin_write32(MXVR_DMA1_CONFIG, val)
116 #define bfin_read_MXVR_DMA1_START_ADDR()        bfin_read32(MXVR_DMA1_START_ADDR)
117 #define bfin_write_MXVR_DMA1_START_ADDR(val)    bfin_write32(MXVR_DMA1_START_ADDR)
118 #define bfin_read_MXVR_DMA1_COUNT()             bfin_read16(MXVR_DMA1_COUNT)
119 #define bfin_write_MXVR_DMA1_COUNT(val)         bfin_write16(MXVR_DMA1_COUNT, val)
120 #define bfin_read_MXVR_DMA1_CURR_ADDR()         bfin_read32(MXVR_DMA1_CURR_ADDR)
121 #define bfin_write_MXVR_DMA1_CURR_ADDR(val)     bfin_write32(MXVR_DMA1_CURR_ADDR)
122 #define bfin_read_MXVR_DMA1_CURR_COUNT()        bfin_read16(MXVR_DMA1_CURR_COUNT)
123 #define bfin_write_MXVR_DMA1_CURR_COUNT(val)    bfin_write16(MXVR_DMA1_CURR_COUNT, val)
124
125 /* MXVR DMA2 Registers */
126
127 #define bfin_read_MXVR_DMA2_CONFIG()            bfin_read32(MXVR_DMA2_CONFIG)
128 #define bfin_write_MXVR_DMA2_CONFIG(val)        bfin_write32(MXVR_DMA2_CONFIG, val)
129 #define bfin_read_MXVR_DMA2_START_ADDR()        bfin_read32(MXVR_DMA2_START_ADDR)
130 #define bfin_write_MXVR_DMA2_START_ADDR(val)    bfin_write32(MXVR_DMA2_START_ADDR)
131 #define bfin_read_MXVR_DMA2_COUNT()             bfin_read16(MXVR_DMA2_COUNT)
132 #define bfin_write_MXVR_DMA2_COUNT(val)         bfin_write16(MXVR_DMA2_COUNT, val)
133 #define bfin_read_MXVR_DMA2_CURR_ADDR()         bfin_read32(MXVR_DMA2_CURR_ADDR)
134 #define bfin_write_MXVR_DMA2_CURR_ADDR(val)     bfin_write32(MXVR_DMA2_CURR_ADDR)
135 #define bfin_read_MXVR_DMA2_CURR_COUNT()        bfin_read16(MXVR_DMA2_CURR_COUNT)
136 #define bfin_write_MXVR_DMA2_CURR_COUNT(val)    bfin_write16(MXVR_DMA2_CURR_COUNT, val)
137
138 /* MXVR DMA3 Registers */
139
140 #define bfin_read_MXVR_DMA3_CONFIG()            bfin_read32(MXVR_DMA3_CONFIG)
141 #define bfin_write_MXVR_DMA3_CONFIG(val)        bfin_write32(MXVR_DMA3_CONFIG, val)
142 #define bfin_read_MXVR_DMA3_START_ADDR()        bfin_read32(MXVR_DMA3_START_ADDR)
143 #define bfin_write_MXVR_DMA3_START_ADDR(val)    bfin_write32(MXVR_DMA3_START_ADDR)
144 #define bfin_read_MXVR_DMA3_COUNT()             bfin_read16(MXVR_DMA3_COUNT)
145 #define bfin_write_MXVR_DMA3_COUNT(val)         bfin_write16(MXVR_DMA3_COUNT, val)
146 #define bfin_read_MXVR_DMA3_CURR_ADDR()         bfin_read32(MXVR_DMA3_CURR_ADDR)
147 #define bfin_write_MXVR_DMA3_CURR_ADDR(val)     bfin_write32(MXVR_DMA3_CURR_ADDR)
148 #define bfin_read_MXVR_DMA3_CURR_COUNT()        bfin_read16(MXVR_DMA3_CURR_COUNT)
149 #define bfin_write_MXVR_DMA3_CURR_COUNT(val)    bfin_write16(MXVR_DMA3_CURR_COUNT, val)
150
151 /* MXVR DMA4 Registers */
152
153 #define bfin_read_MXVR_DMA4_CONFIG()            bfin_read32(MXVR_DMA4_CONFIG)
154 #define bfin_write_MXVR_DMA4_CONFIG(val)        bfin_write32(MXVR_DMA4_CONFIG, val)
155 #define bfin_read_MXVR_DMA4_START_ADDR()        bfin_read32(MXVR_DMA4_START_ADDR)
156 #define bfin_write_MXVR_DMA4_START_ADDR(val)    bfin_write32(MXVR_DMA4_START_ADDR)
157 #define bfin_read_MXVR_DMA4_COUNT()             bfin_read16(MXVR_DMA4_COUNT)
158 #define bfin_write_MXVR_DMA4_COUNT(val)         bfin_write16(MXVR_DMA4_COUNT, val)
159 #define bfin_read_MXVR_DMA4_CURR_ADDR()         bfin_read32(MXVR_DMA4_CURR_ADDR)
160 #define bfin_write_MXVR_DMA4_CURR_ADDR(val)     bfin_write32(MXVR_DMA4_CURR_ADDR)
161 #define bfin_read_MXVR_DMA4_CURR_COUNT()        bfin_read16(MXVR_DMA4_CURR_COUNT)
162 #define bfin_write_MXVR_DMA4_CURR_COUNT(val)    bfin_write16(MXVR_DMA4_CURR_COUNT, val)
163
164 /* MXVR DMA5 Registers */
165
166 #define bfin_read_MXVR_DMA5_CONFIG()            bfin_read32(MXVR_DMA5_CONFIG)
167 #define bfin_write_MXVR_DMA5_CONFIG(val)        bfin_write32(MXVR_DMA5_CONFIG, val)
168 #define bfin_read_MXVR_DMA5_START_ADDR()        bfin_read32(MXVR_DMA5_START_ADDR)
169 #define bfin_write_MXVR_DMA5_START_ADDR(val)    bfin_write32(MXVR_DMA5_START_ADDR)
170 #define bfin_read_MXVR_DMA5_COUNT()             bfin_read16(MXVR_DMA5_COUNT)
171 #define bfin_write_MXVR_DMA5_COUNT(val)         bfin_write16(MXVR_DMA5_COUNT, val)
172 #define bfin_read_MXVR_DMA5_CURR_ADDR()         bfin_read32(MXVR_DMA5_CURR_ADDR)
173 #define bfin_write_MXVR_DMA5_CURR_ADDR(val)     bfin_write32(MXVR_DMA5_CURR_ADDR)
174 #define bfin_read_MXVR_DMA5_CURR_COUNT()        bfin_read16(MXVR_DMA5_CURR_COUNT)
175 #define bfin_write_MXVR_DMA5_CURR_COUNT(val)    bfin_write16(MXVR_DMA5_CURR_COUNT, val)
176
177 /* MXVR DMA6 Registers */
178
179 #define bfin_read_MXVR_DMA6_CONFIG()            bfin_read32(MXVR_DMA6_CONFIG)
180 #define bfin_write_MXVR_DMA6_CONFIG(val)        bfin_write32(MXVR_DMA6_CONFIG, val)
181 #define bfin_read_MXVR_DMA6_START_ADDR()        bfin_read32(MXVR_DMA6_START_ADDR)
182 #define bfin_write_MXVR_DMA6_START_ADDR(val)    bfin_write32(MXVR_DMA6_START_ADDR)
183 #define bfin_read_MXVR_DMA6_COUNT()             bfin_read16(MXVR_DMA6_COUNT)
184 #define bfin_write_MXVR_DMA6_COUNT(val)         bfin_write16(MXVR_DMA6_COUNT, val)
185 #define bfin_read_MXVR_DMA6_CURR_ADDR()         bfin_read32(MXVR_DMA6_CURR_ADDR)
186 #define bfin_write_MXVR_DMA6_CURR_ADDR(val)     bfin_write32(MXVR_DMA6_CURR_ADDR)
187 #define bfin_read_MXVR_DMA6_CURR_COUNT()        bfin_read16(MXVR_DMA6_CURR_COUNT)
188 #define bfin_write_MXVR_DMA6_CURR_COUNT(val)    bfin_write16(MXVR_DMA6_CURR_COUNT, val)
189
190 /* MXVR DMA7 Registers */
191
192 #define bfin_read_MXVR_DMA7_CONFIG()            bfin_read32(MXVR_DMA7_CONFIG)
193 #define bfin_write_MXVR_DMA7_CONFIG(val)        bfin_write32(MXVR_DMA7_CONFIG, val)
194 #define bfin_read_MXVR_DMA7_START_ADDR()        bfin_read32(MXVR_DMA7_START_ADDR)
195 #define bfin_write_MXVR_DMA7_START_ADDR(val)    bfin_write32(MXVR_DMA7_START_ADDR)
196 #define bfin_read_MXVR_DMA7_COUNT()             bfin_read16(MXVR_DMA7_COUNT)
197 #define bfin_write_MXVR_DMA7_COUNT(val)         bfin_write16(MXVR_DMA7_COUNT, val)
198 #define bfin_read_MXVR_DMA7_CURR_ADDR()         bfin_read32(MXVR_DMA7_CURR_ADDR)
199 #define bfin_write_MXVR_DMA7_CURR_ADDR(val)     bfin_write32(MXVR_DMA7_CURR_ADDR)
200 #define bfin_read_MXVR_DMA7_CURR_COUNT()        bfin_read16(MXVR_DMA7_CURR_COUNT)
201 #define bfin_write_MXVR_DMA7_CURR_COUNT(val)    bfin_write16(MXVR_DMA7_CURR_COUNT, val)
202
203 /* MXVR Asynch Packet Registers */
204
205 #define bfin_read_MXVR_AP_CTL()                 bfin_read16(MXVR_AP_CTL)
206 #define bfin_write_MXVR_AP_CTL(val)             bfin_write16(MXVR_AP_CTL, val)
207 #define bfin_read_MXVR_APRB_START_ADDR()        bfin_read32(MXVR_APRB_START_ADDR)
208 #define bfin_write_MXVR_APRB_START_ADDR(val)    bfin_write32(MXVR_APRB_START_ADDR)
209 #define bfin_read_MXVR_APRB_CURR_ADDR()         bfin_read32(MXVR_APRB_CURR_ADDR)
210 #define bfin_write_MXVR_APRB_CURR_ADDR(val)     bfin_write32(MXVR_APRB_CURR_ADDR)
211 #define bfin_read_MXVR_APTB_START_ADDR()        bfin_read32(MXVR_APTB_START_ADDR)
212 #define bfin_write_MXVR_APTB_START_ADDR(val)    bfin_write32(MXVR_APTB_START_ADDR)
213 #define bfin_read_MXVR_APTB_CURR_ADDR()         bfin_read32(MXVR_APTB_CURR_ADDR)
214 #define bfin_write_MXVR_APTB_CURR_ADDR(val)     bfin_write32(MXVR_APTB_CURR_ADDR)
215
216 /* MXVR Control Message Registers */
217
218 #define bfin_read_MXVR_CM_CTL()                 bfin_read32(MXVR_CM_CTL)
219 #define bfin_write_MXVR_CM_CTL(val)             bfin_write32(MXVR_CM_CTL, val)
220 #define bfin_read_MXVR_CMRB_START_ADDR()        bfin_read32(MXVR_CMRB_START_ADDR)
221 #define bfin_write_MXVR_CMRB_START_ADDR(val)    bfin_write32(MXVR_CMRB_START_ADDR)
222 #define bfin_read_MXVR_CMRB_CURR_ADDR()         bfin_read32(MXVR_CMRB_CURR_ADDR)
223 #define bfin_write_MXVR_CMRB_CURR_ADDR(val)     bfin_write32(MXVR_CMRB_CURR_ADDR)
224 #define bfin_read_MXVR_CMTB_START_ADDR()        bfin_read32(MXVR_CMTB_START_ADDR)
225 #define bfin_write_MXVR_CMTB_START_ADDR(val)    bfin_write32(MXVR_CMTB_START_ADDR)
226 #define bfin_read_MXVR_CMTB_CURR_ADDR()         bfin_read32(MXVR_CMTB_CURR_ADDR)
227 #define bfin_write_MXVR_CMTB_CURR_ADDR(val)     bfin_write32(MXVR_CMTB_CURR_ADDR)
228
229 /* MXVR Remote Read Registers */
230
231 #define bfin_read_MXVR_RRDB_START_ADDR()        bfin_read32(MXVR_RRDB_START_ADDR)
232 #define bfin_write_MXVR_RRDB_START_ADDR(val)    bfin_write32(MXVR_RRDB_START_ADDR)
233 #define bfin_read_MXVR_RRDB_CURR_ADDR()         bfin_read32(MXVR_RRDB_CURR_ADDR)
234 #define bfin_write_MXVR_RRDB_CURR_ADDR(val)     bfin_write32(MXVR_RRDB_CURR_ADDR)
235
236 /* MXVR Pattern Data Registers */
237
238 #define bfin_read_MXVR_PAT_DATA_0()             bfin_read32(MXVR_PAT_DATA_0)
239 #define bfin_write_MXVR_PAT_DATA_0(val)         bfin_write32(MXVR_PAT_DATA_0, val)
240 #define bfin_read_MXVR_PAT_EN_0()               bfin_read32(MXVR_PAT_EN_0)
241 #define bfin_write_MXVR_PAT_EN_0(val)           bfin_write32(MXVR_PAT_EN_0, val)
242 #define bfin_read_MXVR_PAT_DATA_1()             bfin_read32(MXVR_PAT_DATA_1)
243 #define bfin_write_MXVR_PAT_DATA_1(val)         bfin_write32(MXVR_PAT_DATA_1, val)
244 #define bfin_read_MXVR_PAT_EN_1()               bfin_read32(MXVR_PAT_EN_1)
245 #define bfin_write_MXVR_PAT_EN_1(val)           bfin_write32(MXVR_PAT_EN_1, val)
246
247 /* MXVR Frame Counter Registers */
248
249 #define bfin_read_MXVR_FRAME_CNT_0()            bfin_read16(MXVR_FRAME_CNT_0)
250 #define bfin_write_MXVR_FRAME_CNT_0(val)        bfin_write16(MXVR_FRAME_CNT_0, val)
251 #define bfin_read_MXVR_FRAME_CNT_1()            bfin_read16(MXVR_FRAME_CNT_1)
252 #define bfin_write_MXVR_FRAME_CNT_1(val)        bfin_write16(MXVR_FRAME_CNT_1, val)
253
254 /* MXVR Routing Table Registers */
255
256 #define bfin_read_MXVR_ROUTING_0()              bfin_read32(MXVR_ROUTING_0)
257 #define bfin_write_MXVR_ROUTING_0(val)          bfin_write32(MXVR_ROUTING_0, val)
258 #define bfin_read_MXVR_ROUTING_1()              bfin_read32(MXVR_ROUTING_1)
259 #define bfin_write_MXVR_ROUTING_1(val)          bfin_write32(MXVR_ROUTING_1, val)
260 #define bfin_read_MXVR_ROUTING_2()              bfin_read32(MXVR_ROUTING_2)
261 #define bfin_write_MXVR_ROUTING_2(val)          bfin_write32(MXVR_ROUTING_2, val)
262 #define bfin_read_MXVR_ROUTING_3()              bfin_read32(MXVR_ROUTING_3)
263 #define bfin_write_MXVR_ROUTING_3(val)          bfin_write32(MXVR_ROUTING_3, val)
264 #define bfin_read_MXVR_ROUTING_4()              bfin_read32(MXVR_ROUTING_4)
265 #define bfin_write_MXVR_ROUTING_4(val)          bfin_write32(MXVR_ROUTING_4, val)
266 #define bfin_read_MXVR_ROUTING_5()              bfin_read32(MXVR_ROUTING_5)
267 #define bfin_write_MXVR_ROUTING_5(val)          bfin_write32(MXVR_ROUTING_5, val)
268 #define bfin_read_MXVR_ROUTING_6()              bfin_read32(MXVR_ROUTING_6)
269 #define bfin_write_MXVR_ROUTING_6(val)          bfin_write32(MXVR_ROUTING_6, val)
270 #define bfin_read_MXVR_ROUTING_7()              bfin_read32(MXVR_ROUTING_7)
271 #define bfin_write_MXVR_ROUTING_7(val)          bfin_write32(MXVR_ROUTING_7, val)
272 #define bfin_read_MXVR_ROUTING_8()              bfin_read32(MXVR_ROUTING_8)
273 #define bfin_write_MXVR_ROUTING_8(val)          bfin_write32(MXVR_ROUTING_8, val)
274 #define bfin_read_MXVR_ROUTING_9()              bfin_read32(MXVR_ROUTING_9)
275 #define bfin_write_MXVR_ROUTING_9(val)          bfin_write32(MXVR_ROUTING_9, val)
276 #define bfin_read_MXVR_ROUTING_10()             bfin_read32(MXVR_ROUTING_10)
277 #define bfin_write_MXVR_ROUTING_10(val)         bfin_write32(MXVR_ROUTING_10, val)
278 #define bfin_read_MXVR_ROUTING_11()             bfin_read32(MXVR_ROUTING_11)
279 #define bfin_write_MXVR_ROUTING_11(val)         bfin_write32(MXVR_ROUTING_11, val)
280 #define bfin_read_MXVR_ROUTING_12()             bfin_read32(MXVR_ROUTING_12)
281 #define bfin_write_MXVR_ROUTING_12(val)         bfin_write32(MXVR_ROUTING_12, val)
282 #define bfin_read_MXVR_ROUTING_13()             bfin_read32(MXVR_ROUTING_13)
283 #define bfin_write_MXVR_ROUTING_13(val)         bfin_write32(MXVR_ROUTING_13, val)
284 #define bfin_read_MXVR_ROUTING_14()             bfin_read32(MXVR_ROUTING_14)
285 #define bfin_write_MXVR_ROUTING_14(val)         bfin_write32(MXVR_ROUTING_14, val)
286
287 /* MXVR Counter-Clock-Control Registers */
288
289 #define bfin_read_MXVR_BLOCK_CNT()              bfin_read16(MXVR_BLOCK_CNT)
290 #define bfin_write_MXVR_BLOCK_CNT(val)          bfin_write16(MXVR_BLOCK_CNT, val)
291 #define bfin_read_MXVR_CLK_CTL()                bfin_read32(MXVR_CLK_CTL)
292 #define bfin_write_MXVR_CLK_CTL(val)            bfin_write32(MXVR_CLK_CTL, val)
293 #define bfin_read_MXVR_CDRPLL_CTL()             bfin_read32(MXVR_CDRPLL_CTL)
294 #define bfin_write_MXVR_CDRPLL_CTL(val)         bfin_write32(MXVR_CDRPLL_CTL, val)
295 #define bfin_read_MXVR_FMPLL_CTL()              bfin_read32(MXVR_FMPLL_CTL)
296 #define bfin_write_MXVR_FMPLL_CTL(val)          bfin_write32(MXVR_FMPLL_CTL, val)
297 #define bfin_read_MXVR_PIN_CTL()                bfin_read16(MXVR_PIN_CTL)
298 #define bfin_write_MXVR_PIN_CTL(val)            bfin_write16(MXVR_PIN_CTL, val)
299 #define bfin_read_MXVR_SCLK_CNT()               bfin_read16(MXVR_SCLK_CNT)
300 #define bfin_write_MXVR_SCLK_CNT(val)           bfin_write16(MXVR_SCLK_CNT, val)
301
302 #endif /* _CDEF_BF549_H */