Blackfin: bf527-ezkit: add support for V2.1 boards
[linux-2.6.git] / arch / blackfin / mach-bf527 / boards / ezbrd.c
1 /*
2  * Copyright 2004-2009 Analog Devices Inc.
3  *                2005 National ICT Australia (NICTA)
4  *                      Aidan Williams <aidan@nicta.com.au>
5  *
6  * Licensed under the GPL-2 or later.
7  */
8
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16
17 #include <linux/i2c.h>
18 #include <linux/irq.h>
19 #include <linux/interrupt.h>
20 #include <linux/usb/musb.h>
21 #include <asm/dma.h>
22 #include <asm/bfin5xx_spi.h>
23 #include <asm/reboot.h>
24 #include <asm/nand.h>
25 #include <asm/portmux.h>
26 #include <asm/dpmc.h>
27 #include <linux/spi/ad7877.h>
28
29 /*
30  * Name the Board for the /proc/cpuinfo
31  */
32 const char bfin_board_name[] = "ADI BF526-EZBRD";
33
34 /*
35  *  Driver needs to know address, irq and flag pin.
36  */
37
38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
39 static struct resource musb_resources[] = {
40         [0] = {
41                 .start  = 0xffc03800,
42                 .end    = 0xffc03cff,
43                 .flags  = IORESOURCE_MEM,
44         },
45         [1] = { /* general IRQ */
46                 .start  = IRQ_USB_INT0,
47                 .end    = IRQ_USB_INT0,
48                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
49         },
50         [2] = { /* DMA IRQ */
51                 .start  = IRQ_USB_DMA,
52                 .end    = IRQ_USB_DMA,
53                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
54         },
55 };
56
57 static struct musb_hdrc_config musb_config = {
58         .multipoint     = 0,
59         .dyn_fifo       = 0,
60         .soft_con       = 1,
61         .dma            = 1,
62         .num_eps        = 8,
63         .dma_channels   = 8,
64         .gpio_vrsel     = GPIO_PG13,
65 };
66
67 static struct musb_hdrc_platform_data musb_plat = {
68 #if defined(CONFIG_USB_MUSB_OTG)
69         .mode           = MUSB_OTG,
70 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
71         .mode           = MUSB_HOST,
72 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
73         .mode           = MUSB_PERIPHERAL,
74 #endif
75         .config         = &musb_config,
76 };
77
78 static u64 musb_dmamask = ~(u32)0;
79
80 static struct platform_device musb_device = {
81         .name           = "musb_hdrc",
82         .id             = 0,
83         .dev = {
84                 .dma_mask               = &musb_dmamask,
85                 .coherent_dma_mask      = 0xffffffff,
86                 .platform_data          = &musb_plat,
87         },
88         .num_resources  = ARRAY_SIZE(musb_resources),
89         .resource       = musb_resources,
90 };
91 #endif
92
93 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
94 static struct mtd_partition ezbrd_partitions[] = {
95         {
96                 .name       = "bootloader(nor)",
97                 .size       = 0x40000,
98                 .offset     = 0,
99         }, {
100                 .name       = "linux kernel(nor)",
101                 .size       = 0x1C0000,
102                 .offset     = MTDPART_OFS_APPEND,
103         }, {
104                 .name       = "file system(nor)",
105                 .size       = MTDPART_SIZ_FULL,
106                 .offset     = MTDPART_OFS_APPEND,
107         }
108 };
109
110 static struct physmap_flash_data ezbrd_flash_data = {
111         .width      = 2,
112         .parts      = ezbrd_partitions,
113         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
114 };
115
116 static struct resource ezbrd_flash_resource = {
117         .start = 0x20000000,
118         .end   = 0x203fffff,
119         .flags = IORESOURCE_MEM,
120 };
121
122 static struct platform_device ezbrd_flash_device = {
123         .name          = "physmap-flash",
124         .id            = 0,
125         .dev = {
126                 .platform_data = &ezbrd_flash_data,
127         },
128         .num_resources = 1,
129         .resource      = &ezbrd_flash_resource,
130 };
131 #endif
132
133 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
134 static struct mtd_partition partition_info[] = {
135         {
136                 .name = "linux kernel(nand)",
137                 .offset = 0,
138                 .size = 4 * 1024 * 1024,
139         },
140         {
141                 .name = "file system(nand)",
142                 .offset = MTDPART_OFS_APPEND,
143                 .size = MTDPART_SIZ_FULL,
144         },
145 };
146
147 static struct bf5xx_nand_platform bf5xx_nand_platform = {
148         .page_size = NFC_PG_SIZE_256,
149         .data_width = NFC_NWIDTH_8,
150         .partitions = partition_info,
151         .nr_partitions = ARRAY_SIZE(partition_info),
152         .rd_dly = 3,
153         .wr_dly = 3,
154 };
155
156 static struct resource bf5xx_nand_resources[] = {
157         {
158                 .start = NFC_CTL,
159                 .end = NFC_DATA_RD + 2,
160                 .flags = IORESOURCE_MEM,
161         },
162         {
163                 .start = CH_NFC,
164                 .end = CH_NFC,
165                 .flags = IORESOURCE_IRQ,
166         },
167 };
168
169 static struct platform_device bf5xx_nand_device = {
170         .name = "bf5xx-nand",
171         .id = 0,
172         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
173         .resource = bf5xx_nand_resources,
174         .dev = {
175                 .platform_data = &bf5xx_nand_platform,
176         },
177 };
178 #endif
179
180 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
181 static struct platform_device rtc_device = {
182         .name = "rtc-bfin",
183         .id   = -1,
184 };
185 #endif
186
187
188 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
189 static struct platform_device bfin_mii_bus = {
190         .name = "bfin_mii_bus",
191 };
192
193 static struct platform_device bfin_mac_device = {
194         .name = "bfin_mac",
195         .dev.platform_data = &bfin_mii_bus,
196 };
197 #endif
198
199 #if defined(CONFIG_MTD_M25P80) \
200         || defined(CONFIG_MTD_M25P80_MODULE)
201 static struct mtd_partition bfin_spi_flash_partitions[] = {
202         {
203                 .name = "bootloader(spi)",
204                 .size = 0x00040000,
205                 .offset = 0,
206                 .mask_flags = MTD_CAP_ROM
207         }, {
208                 .name = "linux kernel(spi)",
209                 .size = MTDPART_SIZ_FULL,
210                 .offset = MTDPART_OFS_APPEND,
211         }
212 };
213
214 static struct flash_platform_data bfin_spi_flash_data = {
215         .name = "m25p80",
216         .parts = bfin_spi_flash_partitions,
217         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
218         .type = "sst25wf040",
219 };
220
221 /* SPI flash chip (sst25wf040) */
222 static struct bfin5xx_spi_chip spi_flash_chip_info = {
223         .enable_dma = 0,         /* use dma transfer with this chip*/
224         .bits_per_word = 8,
225 };
226 #endif
227
228 #if defined(CONFIG_BFIN_SPI_ADC) \
229         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
230 /* SPI ADC chip */
231 static struct bfin5xx_spi_chip spi_adc_chip_info = {
232         .enable_dma = 1,         /* use dma transfer with this chip*/
233         .bits_per_word = 16,
234 };
235 #endif
236
237 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
238 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
239         .enable_dma = 0,
240         .bits_per_word = 8,
241 };
242 #endif
243
244 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
245 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
246         .enable_dma = 0,
247         .bits_per_word = 16,
248 };
249
250 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
251         .model                  = 7877,
252         .vref_delay_usecs       = 50,   /* internal, no capacitor */
253         .x_plate_ohms           = 419,
254         .y_plate_ohms           = 486,
255         .pressure_max           = 1000,
256         .pressure_min           = 0,
257         .stopacq_polarity       = 1,
258         .first_conversion_delay = 3,
259         .acquisition_time       = 1,
260         .averaging              = 1,
261         .pen_down_acc_interval  = 1,
262 };
263 #endif
264
265 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
266 #include <linux/spi/ad7879.h>
267 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
268         .model                  = 7879, /* Model = AD7879 */
269         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
270         .pressure_max           = 10000,
271         .pressure_min           = 0,
272         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
273         .acquisition_time       = 1,    /* 4us acquisition time per sample */
274         .median                 = 2,    /* do 8 measurements */
275         .averaging              = 1,    /* take the average of 4 middle samples */
276         .pen_down_acc_interval  = 255,  /* 9.4 ms */
277         .gpio_output            = 1,    /* configure AUX/VBAT/GPIO as GPIO output */
278         .gpio_default           = 1,    /* During initialization set GPIO = HIGH */
279 };
280 #endif
281
282 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
283 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
284         .enable_dma = 0,
285         .bits_per_word = 16,
286 };
287 #endif
288
289 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
290          && defined(CONFIG_SND_SOC_WM8731_SPI)
291 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
292         .enable_dma = 0,
293         .bits_per_word = 16,
294 };
295 #endif
296
297 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
298 static struct bfin5xx_spi_chip spidev_chip_info = {
299         .enable_dma = 0,
300         .bits_per_word = 8,
301 };
302 #endif
303
304 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
305 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
306         .enable_dma = 0,
307         .bits_per_word = 8,
308 };
309 #endif
310
311 static struct spi_board_info bfin_spi_board_info[] __initdata = {
312 #if defined(CONFIG_MTD_M25P80) \
313         || defined(CONFIG_MTD_M25P80_MODULE)
314         {
315                 /* the modalias must be the same as spi device driver name */
316                 .modalias = "m25p80", /* Name of spi_driver for this device */
317                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
318                 .bus_num = 0, /* Framework bus number */
319                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
320                 .platform_data = &bfin_spi_flash_data,
321                 .controller_data = &spi_flash_chip_info,
322                 .mode = SPI_MODE_3,
323         },
324 #endif
325
326 #if defined(CONFIG_BFIN_SPI_ADC) \
327         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
328         {
329                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
330                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
331                 .bus_num = 0, /* Framework bus number */
332                 .chip_select = 1, /* Framework chip select. */
333                 .platform_data = NULL, /* No spi_driver specific config */
334                 .controller_data = &spi_adc_chip_info,
335         },
336 #endif
337
338 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
339         {
340                 .modalias = "mmc_spi",
341                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
342                 .bus_num = 0,
343                 .chip_select = 5,
344                 .controller_data = &mmc_spi_chip_info,
345                 .mode = SPI_MODE_3,
346         },
347 #endif
348 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
349         {
350                 .modalias               = "ad7877",
351                 .platform_data          = &bfin_ad7877_ts_info,
352                 .irq                    = IRQ_PF8,
353                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
354                 .bus_num        = 0,
355                 .chip_select  = 2,
356                 .controller_data = &spi_ad7877_chip_info,
357         },
358 #endif
359 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
360         {
361                 .modalias = "ad7879",
362                 .platform_data = &bfin_ad7879_ts_info,
363                 .irq = IRQ_PG0,
364                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
365                 .bus_num = 0,
366                 .chip_select = 5,
367                 .controller_data = &spi_ad7879_chip_info,
368                 .mode = SPI_CPHA | SPI_CPOL,
369         },
370 #endif
371 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
372          && defined(CONFIG_SND_SOC_WM8731_SPI)
373         {
374                 .modalias       = "wm8731",
375                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
376                 .bus_num        = 0,
377                 .chip_select    = 5,
378                 .controller_data = &spi_wm8731_chip_info,
379                 .mode = SPI_MODE_0,
380         },
381 #endif
382 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
383         {
384                 .modalias = "spidev",
385                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
386                 .bus_num = 0,
387                 .chip_select = 1,
388                 .controller_data = &spidev_chip_info,
389         },
390 #endif
391 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
392         {
393                 .modalias = "bfin-lq035q1-spi",
394                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
395                 .bus_num = 0,
396                 .chip_select = 1,
397                 .controller_data = &lq035q1_spi_chip_info,
398                 .mode = SPI_CPHA | SPI_CPOL,
399         },
400 #endif
401 };
402
403 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
404 /* SPI controller data */
405 static struct bfin5xx_spi_master bfin_spi0_info = {
406         .num_chipselect = 8,
407         .enable_dma = 1,  /* master has the ability to do dma transfer */
408         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
409 };
410
411 /* SPI (0) */
412 static struct resource bfin_spi0_resource[] = {
413         [0] = {
414                 .start = SPI0_REGBASE,
415                 .end   = SPI0_REGBASE + 0xFF,
416                 .flags = IORESOURCE_MEM,
417                 },
418         [1] = {
419                 .start = CH_SPI,
420                 .end   = CH_SPI,
421                 .flags = IORESOURCE_DMA,
422         },
423         [2] = {
424                 .start = IRQ_SPI,
425                 .end   = IRQ_SPI,
426                 .flags = IORESOURCE_IRQ,
427         },
428 };
429
430 static struct platform_device bfin_spi0_device = {
431         .name = "bfin-spi",
432         .id = 0, /* Bus number */
433         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
434         .resource = bfin_spi0_resource,
435         .dev = {
436                 .platform_data = &bfin_spi0_info, /* Passed to driver */
437         },
438 };
439 #endif  /* spi master and devices */
440
441 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
442 #ifdef CONFIG_SERIAL_BFIN_UART0
443 static struct resource bfin_uart0_resources[] = {
444         {
445                 .start = UART0_THR,
446                 .end = UART0_GCTL+2,
447                 .flags = IORESOURCE_MEM,
448         },
449         {
450                 .start = IRQ_UART0_RX,
451                 .end = IRQ_UART0_RX+1,
452                 .flags = IORESOURCE_IRQ,
453         },
454         {
455                 .start = IRQ_UART0_ERROR,
456                 .end = IRQ_UART0_ERROR,
457                 .flags = IORESOURCE_IRQ,
458         },
459         {
460                 .start = CH_UART0_TX,
461                 .end = CH_UART0_TX,
462                 .flags = IORESOURCE_DMA,
463         },
464         {
465                 .start = CH_UART0_RX,
466                 .end = CH_UART0_RX,
467                 .flags = IORESOURCE_DMA,
468         },
469 };
470
471 unsigned short bfin_uart0_peripherals[] = {
472         P_UART0_TX, P_UART0_RX, 0
473 };
474
475 static struct platform_device bfin_uart0_device = {
476         .name = "bfin-uart",
477         .id = 0,
478         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
479         .resource = bfin_uart0_resources,
480         .dev = {
481                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
482         },
483 };
484 #endif
485 #ifdef CONFIG_SERIAL_BFIN_UART1
486 static struct resource bfin_uart1_resources[] = {
487         {
488                 .start = UART1_THR,
489                 .end = UART1_GCTL+2,
490                 .flags = IORESOURCE_MEM,
491         },
492         {
493                 .start = IRQ_UART1_RX,
494                 .end = IRQ_UART1_RX+1,
495                 .flags = IORESOURCE_IRQ,
496         },
497         {
498                 .start = IRQ_UART1_ERROR,
499                 .end = IRQ_UART1_ERROR,
500                 .flags = IORESOURCE_IRQ,
501         },
502         {
503                 .start = CH_UART1_TX,
504                 .end = CH_UART1_TX,
505                 .flags = IORESOURCE_DMA,
506         },
507         {
508                 .start = CH_UART1_RX,
509                 .end = CH_UART1_RX,
510                 .flags = IORESOURCE_DMA,
511         },
512 #ifdef CONFIG_BFIN_UART1_CTSRTS
513         {       /* CTS pin */
514                 .start = GPIO_PG0,
515                 .end = GPIO_PG0,
516                 .flags = IORESOURCE_IO,
517         },
518         {       /* RTS pin */
519                 .start = GPIO_PF10,
520                 .end = GPIO_PF10,
521                 .flags = IORESOURCE_IO,
522         },
523 #endif
524 };
525
526 unsigned short bfin_uart1_peripherals[] = {
527         P_UART1_TX, P_UART1_RX, 0
528 };
529
530 static struct platform_device bfin_uart1_device = {
531         .name = "bfin-uart",
532         .id = 1,
533         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
534         .resource = bfin_uart1_resources,
535         .dev = {
536                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
537         },
538 };
539 #endif
540 #endif
541
542 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
543 #ifdef CONFIG_BFIN_SIR0
544 static struct resource bfin_sir0_resources[] = {
545         {
546                 .start = 0xFFC00400,
547                 .end = 0xFFC004FF,
548                 .flags = IORESOURCE_MEM,
549         },
550         {
551                 .start = IRQ_UART0_RX,
552                 .end = IRQ_UART0_RX+1,
553                 .flags = IORESOURCE_IRQ,
554         },
555         {
556                 .start = CH_UART0_RX,
557                 .end = CH_UART0_RX+1,
558                 .flags = IORESOURCE_DMA,
559         },
560 };
561
562 static struct platform_device bfin_sir0_device = {
563         .name = "bfin_sir",
564         .id = 0,
565         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
566         .resource = bfin_sir0_resources,
567 };
568 #endif
569 #ifdef CONFIG_BFIN_SIR1
570 static struct resource bfin_sir1_resources[] = {
571         {
572                 .start = 0xFFC02000,
573                 .end = 0xFFC020FF,
574                 .flags = IORESOURCE_MEM,
575         },
576         {
577                 .start = IRQ_UART1_RX,
578                 .end = IRQ_UART1_RX+1,
579                 .flags = IORESOURCE_IRQ,
580         },
581         {
582                 .start = CH_UART1_RX,
583                 .end = CH_UART1_RX+1,
584                 .flags = IORESOURCE_DMA,
585         },
586 };
587
588 static struct platform_device bfin_sir1_device = {
589         .name = "bfin_sir",
590         .id = 1,
591         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
592         .resource = bfin_sir1_resources,
593 };
594 #endif
595 #endif
596
597 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
598 static struct resource bfin_twi0_resource[] = {
599         [0] = {
600                 .start = TWI0_REGBASE,
601                 .end   = TWI0_REGBASE,
602                 .flags = IORESOURCE_MEM,
603         },
604         [1] = {
605                 .start = IRQ_TWI,
606                 .end   = IRQ_TWI,
607                 .flags = IORESOURCE_IRQ,
608         },
609 };
610
611 static struct platform_device i2c_bfin_twi_device = {
612         .name = "i2c-bfin-twi",
613         .id = 0,
614         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
615         .resource = bfin_twi0_resource,
616 };
617 #endif
618
619 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
620 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
621         {
622                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
623         },
624 #endif
625 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
626         {
627                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
628                 .irq = IRQ_PF8,
629         },
630 #endif
631 };
632
633 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
634 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
635 static struct resource bfin_sport0_uart_resources[] = {
636         {
637                 .start = SPORT0_TCR1,
638                 .end = SPORT0_MRCS3+4,
639                 .flags = IORESOURCE_MEM,
640         },
641         {
642                 .start = IRQ_SPORT0_RX,
643                 .end = IRQ_SPORT0_RX+1,
644                 .flags = IORESOURCE_IRQ,
645         },
646         {
647                 .start = IRQ_SPORT0_ERROR,
648                 .end = IRQ_SPORT0_ERROR,
649                 .flags = IORESOURCE_IRQ,
650         },
651 };
652
653 unsigned short bfin_sport0_peripherals[] = {
654         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
655         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
656 };
657
658 static struct platform_device bfin_sport0_uart_device = {
659         .name = "bfin-sport-uart",
660         .id = 0,
661         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
662         .resource = bfin_sport0_uart_resources,
663         .dev = {
664                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
665         },
666 };
667 #endif
668 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
669 static struct resource bfin_sport1_uart_resources[] = {
670         {
671                 .start = SPORT1_TCR1,
672                 .end = SPORT1_MRCS3+4,
673                 .flags = IORESOURCE_MEM,
674         },
675         {
676                 .start = IRQ_SPORT1_RX,
677                 .end = IRQ_SPORT1_RX+1,
678                 .flags = IORESOURCE_IRQ,
679         },
680         {
681                 .start = IRQ_SPORT1_ERROR,
682                 .end = IRQ_SPORT1_ERROR,
683                 .flags = IORESOURCE_IRQ,
684         },
685 };
686
687 unsigned short bfin_sport1_peripherals[] = {
688         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
689         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
690 };
691
692 static struct platform_device bfin_sport1_uart_device = {
693         .name = "bfin-sport-uart",
694         .id = 1,
695         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
696         .resource = bfin_sport1_uart_resources,
697         .dev = {
698                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
699         },
700 };
701 #endif
702 #endif
703
704 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
705 #include <linux/input.h>
706 #include <linux/gpio_keys.h>
707
708 static struct gpio_keys_button bfin_gpio_keys_table[] = {
709         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
710         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
711 };
712
713 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
714         .buttons        = bfin_gpio_keys_table,
715         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
716 };
717
718 static struct platform_device bfin_device_gpiokeys = {
719         .name      = "gpio-keys",
720         .dev = {
721                 .platform_data = &bfin_gpio_keys_data,
722         },
723 };
724 #endif
725
726 static const unsigned int cclk_vlev_datasheet[] =
727 {
728         VRPAIR(VLEV_100, 400000000),
729         VRPAIR(VLEV_105, 426000000),
730         VRPAIR(VLEV_110, 500000000),
731         VRPAIR(VLEV_115, 533000000),
732         VRPAIR(VLEV_120, 600000000),
733 };
734
735 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
736         .tuple_tab = cclk_vlev_datasheet,
737         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
738         .vr_settling_time = 25 /* us */,
739 };
740
741 static struct platform_device bfin_dpmc = {
742         .name = "bfin dpmc",
743         .dev = {
744                 .platform_data = &bfin_dmpc_vreg_data,
745         },
746 };
747
748 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
749 #include <asm/bfin-lq035q1.h>
750
751 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
752         .mode =         LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
753         .use_bl =       1,
754         .gpio_bl =      GPIO_PG12,
755 };
756
757 static struct resource bfin_lq035q1_resources[] = {
758         {
759                 .start = IRQ_PPI_ERROR,
760                 .end = IRQ_PPI_ERROR,
761                 .flags = IORESOURCE_IRQ,
762         },
763 };
764
765 static struct platform_device bfin_lq035q1_device = {
766         .name           = "bfin-lq035q1",
767         .id             = -1,
768         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
769         .resource       = bfin_lq035q1_resources,
770         .dev            = {
771                 .platform_data = &bfin_lq035q1_data,
772         },
773 };
774 #endif
775
776 static struct platform_device *stamp_devices[] __initdata = {
777
778         &bfin_dpmc,
779
780 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
781         &bf5xx_nand_device,
782 #endif
783
784 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
785         &rtc_device,
786 #endif
787
788 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
789         &musb_device,
790 #endif
791
792 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
793         &bfin_mii_bus,
794         &bfin_mac_device,
795 #endif
796
797 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
798         &bfin_spi0_device,
799 #endif
800
801 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
802 #ifdef CONFIG_SERIAL_BFIN_UART0
803         &bfin_uart0_device,
804 #endif
805 #ifdef CONFIG_SERIAL_BFIN_UART1
806         &bfin_uart1_device,
807 #endif
808 #endif
809
810 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
811         &bfin_lq035q1_device,
812 #endif
813
814 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
815 #ifdef CONFIG_BFIN_SIR0
816         &bfin_sir0_device,
817 #endif
818 #ifdef CONFIG_BFIN_SIR1
819         &bfin_sir1_device,
820 #endif
821 #endif
822
823 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
824         &i2c_bfin_twi_device,
825 #endif
826
827 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
828 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
829         &bfin_sport0_uart_device,
830 #endif
831 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
832         &bfin_sport1_uart_device,
833 #endif
834 #endif
835
836 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
837         &bfin_device_gpiokeys,
838 #endif
839
840 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
841         &ezbrd_flash_device,
842 #endif
843 };
844
845 static int __init ezbrd_init(void)
846 {
847         printk(KERN_INFO "%s(): registering device resources\n", __func__);
848         i2c_register_board_info(0, bfin_i2c_board_info,
849                                 ARRAY_SIZE(bfin_i2c_board_info));
850         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
851         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
852         return 0;
853 }
854
855 arch_initcall(ezbrd_init);
856
857 static struct platform_device *ezbrd_early_devices[] __initdata = {
858 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
859 #ifdef CONFIG_SERIAL_BFIN_UART0
860         &bfin_uart0_device,
861 #endif
862 #ifdef CONFIG_SERIAL_BFIN_UART1
863         &bfin_uart1_device,
864 #endif
865 #endif
866
867 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
868 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
869         &bfin_sport0_uart_device,
870 #endif
871 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
872         &bfin_sport1_uart_device,
873 #endif
874 #endif
875 };
876
877 void __init native_machine_early_platform_add_devices(void)
878 {
879         printk(KERN_INFO "register early platform devices\n");
880         early_platform_add_devices(ezbrd_early_devices,
881                 ARRAY_SIZE(ezbrd_early_devices));
882 }
883
884 void native_machine_restart(char *cmd)
885 {
886         /* workaround reboot hang when booting from SPI */
887         if ((bfin_read_SYSCR() & 0x7) == 0x3)
888                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
889 }
890
891 void bfin_get_ether_addr(char *addr)
892 {
893         /* the MAC is stored in OTP memory page 0xDF */
894         u32 ret;
895         u64 otp_mac;
896         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
897
898         ret = otp_read(0xDF, 0x00, &otp_mac);
899         if (!(ret & 0x1)) {
900                 char *otp_mac_p = (char *)&otp_mac;
901                 for (ret = 0; ret < 6; ++ret)
902                         addr[ret] = otp_mac_p[5 - ret];
903         }
904 }
905 EXPORT_SYMBOL(bfin_get_ether_addr);