Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
[linux-2.6.git] / arch / blackfin / kernel / setup.c
1 /*
2  * Copyright 2004-2009 Analog Devices Inc.
3  *
4  * Licensed under the GPL-2 or later.
5  */
6
7 #include <linux/delay.h>
8 #include <linux/console.h>
9 #include <linux/bootmem.h>
10 #include <linux/seq_file.h>
11 #include <linux/cpu.h>
12 #include <linux/mm.h>
13 #include <linux/module.h>
14 #include <linux/tty.h>
15 #include <linux/pfn.h>
16
17 #ifdef CONFIG_MTD_UCLINUX
18 #include <linux/mtd/map.h>
19 #include <linux/ext2_fs.h>
20 #include <linux/cramfs_fs.h>
21 #include <linux/romfs_fs.h>
22 #endif
23
24 #include <asm/cplb.h>
25 #include <asm/cacheflush.h>
26 #include <asm/blackfin.h>
27 #include <asm/cplbinit.h>
28 #include <asm/div64.h>
29 #include <asm/cpu.h>
30 #include <asm/fixed_code.h>
31 #include <asm/early_printk.h>
32
33 u16 _bfin_swrst;
34 EXPORT_SYMBOL(_bfin_swrst);
35
36 unsigned long memory_start, memory_end, physical_mem_end;
37 unsigned long _rambase, _ramstart, _ramend;
38 unsigned long reserved_mem_dcache_on;
39 unsigned long reserved_mem_icache_on;
40 EXPORT_SYMBOL(memory_start);
41 EXPORT_SYMBOL(memory_end);
42 EXPORT_SYMBOL(physical_mem_end);
43 EXPORT_SYMBOL(_ramend);
44 EXPORT_SYMBOL(reserved_mem_dcache_on);
45
46 #ifdef CONFIG_MTD_UCLINUX
47 extern struct map_info uclinux_ram_map;
48 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
49 unsigned long _ebss;
50 EXPORT_SYMBOL(memory_mtd_end);
51 EXPORT_SYMBOL(memory_mtd_start);
52 EXPORT_SYMBOL(mtd_size);
53 #endif
54
55 char __initdata command_line[COMMAND_LINE_SIZE];
56 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
57         *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
58
59 /* boot memmap, for parsing "memmap=" */
60 #define BFIN_MEMMAP_MAX         128 /* number of entries in bfin_memmap */
61 #define BFIN_MEMMAP_RAM         1
62 #define BFIN_MEMMAP_RESERVED    2
63 static struct bfin_memmap {
64         int nr_map;
65         struct bfin_memmap_entry {
66                 unsigned long long addr; /* start of memory segment */
67                 unsigned long long size;
68                 unsigned long type;
69         } map[BFIN_MEMMAP_MAX];
70 } bfin_memmap __initdata;
71
72 /* for memmap sanitization */
73 struct change_member {
74         struct bfin_memmap_entry *pentry; /* pointer to original entry */
75         unsigned long long addr; /* address for this change point */
76 };
77 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
78 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
79 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
80 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
81
82 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
83
84 static int early_init_clkin_hz(char *buf);
85
86 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
87 void __init generate_cplb_tables(void)
88 {
89         unsigned int cpu;
90
91         generate_cplb_tables_all();
92         /* Generate per-CPU I&D CPLB tables */
93         for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
94                 generate_cplb_tables_cpu(cpu);
95 }
96 #endif
97
98 void __cpuinit bfin_setup_caches(unsigned int cpu)
99 {
100 #ifdef CONFIG_BFIN_ICACHE
101         bfin_icache_init(icplb_tbl[cpu]);
102 #endif
103
104 #ifdef CONFIG_BFIN_DCACHE
105         bfin_dcache_init(dcplb_tbl[cpu]);
106 #endif
107
108         /*
109          * In cache coherence emulation mode, we need to have the
110          * D-cache enabled before running any atomic operation which
111          * might involve cache invalidation (i.e. spinlock, rwlock).
112          * So printk's are deferred until then.
113          */
114 #ifdef CONFIG_BFIN_ICACHE
115         printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
116         printk(KERN_INFO "  External memory:"
117 # ifdef CONFIG_BFIN_EXTMEM_ICACHEABLE
118                " cacheable"
119 # else
120                " uncacheable"
121 # endif
122                " in instruction cache\n");
123         if (L2_LENGTH)
124                 printk(KERN_INFO "  L2 SRAM        :"
125 # ifdef CONFIG_BFIN_L2_ICACHEABLE
126                        " cacheable"
127 # else
128                        " uncacheable"
129 # endif
130                        " in instruction cache\n");
131
132 #else
133         printk(KERN_INFO "Instruction Cache Disabled for CPU%u\n", cpu);
134 #endif
135
136 #ifdef CONFIG_BFIN_DCACHE
137         printk(KERN_INFO "Data Cache Enabled for CPU%u\n", cpu);
138         printk(KERN_INFO "  External memory:"
139 # if defined CONFIG_BFIN_EXTMEM_WRITEBACK
140                " cacheable (write-back)"
141 # elif defined CONFIG_BFIN_EXTMEM_WRITETHROUGH
142                " cacheable (write-through)"
143 # else
144                " uncacheable"
145 # endif
146                " in data cache\n");
147         if (L2_LENGTH)
148                 printk(KERN_INFO "  L2 SRAM        :"
149 # if defined CONFIG_BFIN_L2_WRITEBACK
150                        " cacheable (write-back)"
151 # elif defined CONFIG_BFIN_L2_WRITETHROUGH
152                        " cacheable (write-through)"
153 # else
154                        " uncacheable"
155 # endif
156                        " in data cache\n");
157 #else
158         printk(KERN_INFO "Data Cache Disabled for CPU%u\n", cpu);
159 #endif
160 }
161
162 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
163 {
164         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
165
166         cpudata->idle = current;
167         cpudata->imemctl = bfin_read_IMEM_CONTROL();
168         cpudata->dmemctl = bfin_read_DMEM_CONTROL();
169 }
170
171 void __init bfin_cache_init(void)
172 {
173 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
174         generate_cplb_tables();
175 #endif
176         bfin_setup_caches(0);
177 }
178
179 void __init bfin_relocate_l1_mem(void)
180 {
181         unsigned long text_l1_len = (unsigned long)_text_l1_len;
182         unsigned long data_l1_len = (unsigned long)_data_l1_len;
183         unsigned long data_b_l1_len = (unsigned long)_data_b_l1_len;
184         unsigned long l2_len = (unsigned long)_l2_len;
185
186         early_shadow_stamp();
187
188         /*
189          * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S
190          * we know that everything about l1 text/data is nice and aligned,
191          * so copy by 4 byte chunks, and don't worry about overlapping
192          * src/dest.
193          *
194          * We can't use the dma_memcpy functions, since they can call
195          * scheduler functions which might be in L1 :( and core writes
196          * into L1 instruction cause bad access errors, so we are stuck,
197          * we are required to use DMA, but can't use the common dma
198          * functions. We can't use memcpy either - since that might be
199          * going to be in the relocated L1
200          */
201
202         blackfin_dma_early_init();
203
204         /* if necessary, copy L1 text to L1 instruction SRAM */
205         if (L1_CODE_LENGTH && text_l1_len)
206                 early_dma_memcpy(_stext_l1, _text_l1_lma, text_l1_len);
207
208         /* if necessary, copy L1 data to L1 data bank A SRAM */
209         if (L1_DATA_A_LENGTH && data_l1_len)
210                 early_dma_memcpy(_sdata_l1, _data_l1_lma, data_l1_len);
211
212         /* if necessary, copy L1 data B to L1 data bank B SRAM */
213         if (L1_DATA_B_LENGTH && data_b_l1_len)
214                 early_dma_memcpy(_sdata_b_l1, _data_b_l1_lma, data_b_l1_len);
215
216         early_dma_memcpy_done();
217
218         /* if necessary, copy L2 text/data to L2 SRAM */
219         if (L2_LENGTH && l2_len)
220                 memcpy(_stext_l2, _l2_lma, l2_len);
221 }
222
223 #ifdef CONFIG_ROMKERNEL
224 void __init bfin_relocate_xip_data(void)
225 {
226         early_shadow_stamp();
227
228         memcpy(_sdata, _data_lma, (unsigned long)_data_len - THREAD_SIZE + sizeof(struct thread_info));
229         memcpy(_sinitdata, _init_data_lma, (unsigned long)_init_data_len);
230 }
231 #endif
232
233 /* add_memory_region to memmap */
234 static void __init add_memory_region(unsigned long long start,
235                               unsigned long long size, int type)
236 {
237         int i;
238
239         i = bfin_memmap.nr_map;
240
241         if (i == BFIN_MEMMAP_MAX) {
242                 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
243                 return;
244         }
245
246         bfin_memmap.map[i].addr = start;
247         bfin_memmap.map[i].size = size;
248         bfin_memmap.map[i].type = type;
249         bfin_memmap.nr_map++;
250 }
251
252 /*
253  * Sanitize the boot memmap, removing overlaps.
254  */
255 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
256 {
257         struct change_member *change_tmp;
258         unsigned long current_type, last_type;
259         unsigned long long last_addr;
260         int chgidx, still_changing;
261         int overlap_entries;
262         int new_entry;
263         int old_nr, new_nr, chg_nr;
264         int i;
265
266         /*
267                 Visually we're performing the following (1,2,3,4 = memory types)
268
269                 Sample memory map (w/overlaps):
270                    ____22__________________
271                    ______________________4_
272                    ____1111________________
273                    _44_____________________
274                    11111111________________
275                    ____________________33__
276                    ___________44___________
277                    __________33333_________
278                    ______________22________
279                    ___________________2222_
280                    _________111111111______
281                    _____________________11_
282                    _________________4______
283
284                 Sanitized equivalent (no overlap):
285                    1_______________________
286                    _44_____________________
287                    ___1____________________
288                    ____22__________________
289                    ______11________________
290                    _________1______________
291                    __________3_____________
292                    ___________44___________
293                    _____________33_________
294                    _______________2________
295                    ________________1_______
296                    _________________4______
297                    ___________________2____
298                    ____________________33__
299                    ______________________4_
300         */
301         /* if there's only one memory region, don't bother */
302         if (*pnr_map < 2)
303                 return -1;
304
305         old_nr = *pnr_map;
306
307         /* bail out if we find any unreasonable addresses in memmap */
308         for (i = 0; i < old_nr; i++)
309                 if (map[i].addr + map[i].size < map[i].addr)
310                         return -1;
311
312         /* create pointers for initial change-point information (for sorting) */
313         for (i = 0; i < 2*old_nr; i++)
314                 change_point[i] = &change_point_list[i];
315
316         /* record all known change-points (starting and ending addresses),
317            omitting those that are for empty memory regions */
318         chgidx = 0;
319         for (i = 0; i < old_nr; i++) {
320                 if (map[i].size != 0) {
321                         change_point[chgidx]->addr = map[i].addr;
322                         change_point[chgidx++]->pentry = &map[i];
323                         change_point[chgidx]->addr = map[i].addr + map[i].size;
324                         change_point[chgidx++]->pentry = &map[i];
325                 }
326         }
327         chg_nr = chgidx;        /* true number of change-points */
328
329         /* sort change-point list by memory addresses (low -> high) */
330         still_changing = 1;
331         while (still_changing) {
332                 still_changing = 0;
333                 for (i = 1; i < chg_nr; i++) {
334                         /* if <current_addr> > <last_addr>, swap */
335                         /* or, if current=<start_addr> & last=<end_addr>, swap */
336                         if ((change_point[i]->addr < change_point[i-1]->addr) ||
337                                 ((change_point[i]->addr == change_point[i-1]->addr) &&
338                                  (change_point[i]->addr == change_point[i]->pentry->addr) &&
339                                  (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
340                            ) {
341                                 change_tmp = change_point[i];
342                                 change_point[i] = change_point[i-1];
343                                 change_point[i-1] = change_tmp;
344                                 still_changing = 1;
345                         }
346                 }
347         }
348
349         /* create a new memmap, removing overlaps */
350         overlap_entries = 0;    /* number of entries in the overlap table */
351         new_entry = 0;          /* index for creating new memmap entries */
352         last_type = 0;          /* start with undefined memory type */
353         last_addr = 0;          /* start with 0 as last starting address */
354         /* loop through change-points, determining affect on the new memmap */
355         for (chgidx = 0; chgidx < chg_nr; chgidx++) {
356                 /* keep track of all overlapping memmap entries */
357                 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
358                         /* add map entry to overlap list (> 1 entry implies an overlap) */
359                         overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
360                 } else {
361                         /* remove entry from list (order independent, so swap with last) */
362                         for (i = 0; i < overlap_entries; i++) {
363                                 if (overlap_list[i] == change_point[chgidx]->pentry)
364                                         overlap_list[i] = overlap_list[overlap_entries-1];
365                         }
366                         overlap_entries--;
367                 }
368                 /* if there are overlapping entries, decide which "type" to use */
369                 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
370                 current_type = 0;
371                 for (i = 0; i < overlap_entries; i++)
372                         if (overlap_list[i]->type > current_type)
373                                 current_type = overlap_list[i]->type;
374                 /* continue building up new memmap based on this information */
375                 if (current_type != last_type) {
376                         if (last_type != 0) {
377                                 new_map[new_entry].size =
378                                         change_point[chgidx]->addr - last_addr;
379                                 /* move forward only if the new size was non-zero */
380                                 if (new_map[new_entry].size != 0)
381                                         if (++new_entry >= BFIN_MEMMAP_MAX)
382                                                 break;  /* no more space left for new entries */
383                         }
384                         if (current_type != 0) {
385                                 new_map[new_entry].addr = change_point[chgidx]->addr;
386                                 new_map[new_entry].type = current_type;
387                                 last_addr = change_point[chgidx]->addr;
388                         }
389                         last_type = current_type;
390                 }
391         }
392         new_nr = new_entry;     /* retain count for new entries */
393
394         /* copy new mapping into original location */
395         memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
396         *pnr_map = new_nr;
397
398         return 0;
399 }
400
401 static void __init print_memory_map(char *who)
402 {
403         int i;
404
405         for (i = 0; i < bfin_memmap.nr_map; i++) {
406                 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
407                         bfin_memmap.map[i].addr,
408                         bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
409                 switch (bfin_memmap.map[i].type) {
410                 case BFIN_MEMMAP_RAM:
411                         printk(KERN_CONT "(usable)\n");
412                         break;
413                 case BFIN_MEMMAP_RESERVED:
414                         printk(KERN_CONT "(reserved)\n");
415                         break;
416                 default:
417                         printk(KERN_CONT "type %lu\n", bfin_memmap.map[i].type);
418                         break;
419                 }
420         }
421 }
422
423 static __init int parse_memmap(char *arg)
424 {
425         unsigned long long start_at, mem_size;
426
427         if (!arg)
428                 return -EINVAL;
429
430         mem_size = memparse(arg, &arg);
431         if (*arg == '@') {
432                 start_at = memparse(arg+1, &arg);
433                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
434         } else if (*arg == '$') {
435                 start_at = memparse(arg+1, &arg);
436                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
437         }
438
439         return 0;
440 }
441
442 /*
443  * Initial parsing of the command line.  Currently, we support:
444  *  - Controlling the linux memory size: mem=xxx[KMG]
445  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
446  *       $ -> reserved memory is dcacheable
447  *       # -> reserved memory is icacheable
448  *  - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
449  *       @ from <start> to <start>+<mem>, type RAM
450  *       $ from <start> to <start>+<mem>, type RESERVED
451  */
452 static __init void parse_cmdline_early(char *cmdline_p)
453 {
454         char c = ' ', *to = cmdline_p;
455         unsigned int memsize;
456         for (;;) {
457                 if (c == ' ') {
458                         if (!memcmp(to, "mem=", 4)) {
459                                 to += 4;
460                                 memsize = memparse(to, &to);
461                                 if (memsize)
462                                         _ramend = memsize;
463
464                         } else if (!memcmp(to, "max_mem=", 8)) {
465                                 to += 8;
466                                 memsize = memparse(to, &to);
467                                 if (memsize) {
468                                         physical_mem_end = memsize;
469                                         if (*to != ' ') {
470                                                 if (*to == '$'
471                                                     || *(to + 1) == '$')
472                                                         reserved_mem_dcache_on = 1;
473                                                 if (*to == '#'
474                                                     || *(to + 1) == '#')
475                                                         reserved_mem_icache_on = 1;
476                                         }
477                                 }
478                         } else if (!memcmp(to, "clkin_hz=", 9)) {
479                                 to += 9;
480                                 early_init_clkin_hz(to);
481 #ifdef CONFIG_EARLY_PRINTK
482                         } else if (!memcmp(to, "earlyprintk=", 12)) {
483                                 to += 12;
484                                 setup_early_printk(to);
485 #endif
486                         } else if (!memcmp(to, "memmap=", 7)) {
487                                 to += 7;
488                                 parse_memmap(to);
489                         }
490                 }
491                 c = *(to++);
492                 if (!c)
493                         break;
494         }
495 }
496
497 /*
498  * Setup memory defaults from user config.
499  * The physical memory layout looks like:
500  *
501  *  [_rambase, _ramstart]:              kernel image
502  *  [memory_start, memory_end]:         dynamic memory managed by kernel
503  *  [memory_end, _ramend]:              reserved memory
504  *      [memory_mtd_start(memory_end),
505  *              memory_mtd_start + mtd_size]:   rootfs (if any)
506  *      [_ramend - DMA_UNCACHED_REGION,
507  *              _ramend]:                       uncached DMA region
508  *  [_ramend, physical_mem_end]:        memory not managed by kernel
509  */
510 static __init void memory_setup(void)
511 {
512 #ifdef CONFIG_MTD_UCLINUX
513         unsigned long mtd_phys = 0;
514 #endif
515         unsigned long max_mem;
516
517         _rambase = CONFIG_BOOT_LOAD;
518         _ramstart = (unsigned long)_end;
519
520         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
521                 console_init();
522                 panic("DMA region exceeds memory limit: %lu.",
523                         _ramend - _ramstart);
524         }
525         max_mem = memory_end = _ramend - DMA_UNCACHED_REGION;
526
527 #if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
528         /* Due to a Hardware Anomaly we need to limit the size of usable
529          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
530          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
531          */
532 # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
533         if (max_mem >= 56 * 1024 * 1024)
534                 max_mem = 56 * 1024 * 1024;
535 # else
536         if (max_mem >= 60 * 1024 * 1024)
537                 max_mem = 60 * 1024 * 1024;
538 # endif                         /* CONFIG_DEBUG_HUNT_FOR_ZERO */
539 #endif                          /* ANOMALY_05000263 */
540
541
542 #ifdef CONFIG_MPU
543         /* Round up to multiple of 4MB */
544         memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
545 #else
546         memory_start = PAGE_ALIGN(_ramstart);
547 #endif
548
549 #if defined(CONFIG_MTD_UCLINUX)
550         /* generic memory mapped MTD driver */
551         memory_mtd_end = memory_end;
552
553         mtd_phys = _ramstart;
554         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
555
556 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
557         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
558                 mtd_size =
559                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
560 # endif
561
562 # if defined(CONFIG_CRAMFS)
563         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
564                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
565 # endif
566
567 # if defined(CONFIG_ROMFS_FS)
568         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
569             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) {
570                 mtd_size =
571                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
572
573                 /* ROM_FS is XIP, so if we found it, we need to limit memory */
574                 if (memory_end > max_mem) {
575                         pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", max_mem >> 20);
576                         memory_end = max_mem;
577                 }
578         }
579 # endif                         /* CONFIG_ROMFS_FS */
580
581         /* Since the default MTD_UCLINUX has no magic number, we just blindly
582          * read 8 past the end of the kernel's image, and look at it.
583          * When no image is attached, mtd_size is set to a random number
584          * Do some basic sanity checks before operating on things
585          */
586         if (mtd_size == 0 || memory_end <= mtd_size) {
587                 pr_emerg("Could not find valid ram mtd attached.\n");
588         } else {
589                 memory_end -= mtd_size;
590
591                 /* Relocate MTD image to the top of memory after the uncached memory area */
592                 uclinux_ram_map.phys = memory_mtd_start = memory_end;
593                 uclinux_ram_map.size = mtd_size;
594                 pr_info("Found mtd parition at 0x%p, (len=0x%lx), moving to 0x%p\n",
595                         _end, mtd_size, (void *)memory_mtd_start);
596                 dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
597         }
598 #endif                          /* CONFIG_MTD_UCLINUX */
599
600         /* We need lo limit memory, since everything could have a text section
601          * of userspace in it, and expose anomaly 05000263. If the anomaly
602          * doesn't exist, or we don't need to - then dont.
603          */
604         if (memory_end > max_mem) {
605                 pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", max_mem >> 20);
606                 memory_end = max_mem;
607         }
608
609 #ifdef CONFIG_MPU
610 #if defined(CONFIG_ROMFS_ON_MTD) && defined(CONFIG_MTD_ROM)
611         page_mask_nelts = (((_ramend + ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE -
612                                         ASYNC_BANK0_BASE) >> PAGE_SHIFT) + 31) / 32;
613 #else
614         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
615 #endif
616         page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
617 #endif
618
619         init_mm.start_code = (unsigned long)_stext;
620         init_mm.end_code = (unsigned long)_etext;
621         init_mm.end_data = (unsigned long)_edata;
622         init_mm.brk = (unsigned long)0;
623
624         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
625         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
626
627         printk(KERN_INFO "Memory map:\n"
628                "  fixedcode = 0x%p-0x%p\n"
629                "  text      = 0x%p-0x%p\n"
630                "  rodata    = 0x%p-0x%p\n"
631                "  bss       = 0x%p-0x%p\n"
632                "  data      = 0x%p-0x%p\n"
633                "    stack   = 0x%p-0x%p\n"
634                "  init      = 0x%p-0x%p\n"
635                "  available = 0x%p-0x%p\n"
636 #ifdef CONFIG_MTD_UCLINUX
637                "  rootfs    = 0x%p-0x%p\n"
638 #endif
639 #if DMA_UNCACHED_REGION > 0
640                "  DMA Zone  = 0x%p-0x%p\n"
641 #endif
642                 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
643                 _stext, _etext,
644                 __start_rodata, __end_rodata,
645                 __bss_start, __bss_stop,
646                 _sdata, _edata,
647                 (void *)&init_thread_union,
648                 (void *)((int)(&init_thread_union) + THREAD_SIZE),
649                 __init_begin, __init_end,
650                 (void *)_ramstart, (void *)memory_end
651 #ifdef CONFIG_MTD_UCLINUX
652                 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
653 #endif
654 #if DMA_UNCACHED_REGION > 0
655                 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
656 #endif
657                 );
658 }
659
660 /*
661  * Find the lowest, highest page frame number we have available
662  */
663 void __init find_min_max_pfn(void)
664 {
665         int i;
666
667         max_pfn = 0;
668         min_low_pfn = memory_end;
669
670         for (i = 0; i < bfin_memmap.nr_map; i++) {
671                 unsigned long start, end;
672                 /* RAM? */
673                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
674                         continue;
675                 start = PFN_UP(bfin_memmap.map[i].addr);
676                 end = PFN_DOWN(bfin_memmap.map[i].addr +
677                                 bfin_memmap.map[i].size);
678                 if (start >= end)
679                         continue;
680                 if (end > max_pfn)
681                         max_pfn = end;
682                 if (start < min_low_pfn)
683                         min_low_pfn = start;
684         }
685 }
686
687 static __init void setup_bootmem_allocator(void)
688 {
689         int bootmap_size;
690         int i;
691         unsigned long start_pfn, end_pfn;
692         unsigned long curr_pfn, last_pfn, size;
693
694         /* mark memory between memory_start and memory_end usable */
695         add_memory_region(memory_start,
696                 memory_end - memory_start, BFIN_MEMMAP_RAM);
697         /* sanity check for overlap */
698         sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
699         print_memory_map("boot memmap");
700
701         /* initialize globals in linux/bootmem.h */
702         find_min_max_pfn();
703         /* pfn of the last usable page frame */
704         if (max_pfn > memory_end >> PAGE_SHIFT)
705                 max_pfn = memory_end >> PAGE_SHIFT;
706         /* pfn of last page frame directly mapped by kernel */
707         max_low_pfn = max_pfn;
708         /* pfn of the first usable page frame after kernel image*/
709         if (min_low_pfn < memory_start >> PAGE_SHIFT)
710                 min_low_pfn = memory_start >> PAGE_SHIFT;
711
712         start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
713         end_pfn = memory_end >> PAGE_SHIFT;
714
715         /*
716          * give all the memory to the bootmap allocator, tell it to put the
717          * boot mem_map at the start of memory.
718          */
719         bootmap_size = init_bootmem_node(NODE_DATA(0),
720                         memory_start >> PAGE_SHIFT,     /* map goes here */
721                         start_pfn, end_pfn);
722
723         /* register the memmap regions with the bootmem allocator */
724         for (i = 0; i < bfin_memmap.nr_map; i++) {
725                 /*
726                  * Reserve usable memory
727                  */
728                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
729                         continue;
730                 /*
731                  * We are rounding up the start address of usable memory:
732                  */
733                 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
734                 if (curr_pfn >= end_pfn)
735                         continue;
736                 /*
737                  * ... and at the end of the usable range downwards:
738                  */
739                 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
740                                          bfin_memmap.map[i].size);
741
742                 if (last_pfn > end_pfn)
743                         last_pfn = end_pfn;
744
745                 /*
746                  * .. finally, did all the rounding and playing
747                  * around just make the area go away?
748                  */
749                 if (last_pfn <= curr_pfn)
750                         continue;
751
752                 size = last_pfn - curr_pfn;
753                 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
754         }
755
756         /* reserve memory before memory_start, including bootmap */
757         reserve_bootmem(PAGE_OFFSET,
758                 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
759                 BOOTMEM_DEFAULT);
760 }
761
762 #define EBSZ_TO_MEG(ebsz) \
763 ({ \
764         int meg = 0; \
765         switch (ebsz & 0xf) { \
766                 case 0x1: meg =  16; break; \
767                 case 0x3: meg =  32; break; \
768                 case 0x5: meg =  64; break; \
769                 case 0x7: meg = 128; break; \
770                 case 0x9: meg = 256; break; \
771                 case 0xb: meg = 512; break; \
772         } \
773         meg; \
774 })
775 static inline int __init get_mem_size(void)
776 {
777 #if defined(EBIU_SDBCTL)
778 # if defined(BF561_FAMILY)
779         int ret = 0;
780         u32 sdbctl = bfin_read_EBIU_SDBCTL();
781         ret += EBSZ_TO_MEG(sdbctl >>  0);
782         ret += EBSZ_TO_MEG(sdbctl >>  8);
783         ret += EBSZ_TO_MEG(sdbctl >> 16);
784         ret += EBSZ_TO_MEG(sdbctl >> 24);
785         return ret;
786 # else
787         return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
788 # endif
789 #elif defined(EBIU_DDRCTL1)
790         u32 ddrctl = bfin_read_EBIU_DDRCTL1();
791         int ret = 0;
792         switch (ddrctl & 0xc0000) {
793                 case DEVSZ_64:  ret = 64 / 8;
794                 case DEVSZ_128: ret = 128 / 8;
795                 case DEVSZ_256: ret = 256 / 8;
796                 case DEVSZ_512: ret = 512 / 8;
797         }
798         switch (ddrctl & 0x30000) {
799                 case DEVWD_4:  ret *= 2;
800                 case DEVWD_8:  ret *= 2;
801                 case DEVWD_16: break;
802         }
803         if ((ddrctl & 0xc000) == 0x4000)
804                 ret *= 2;
805         return ret;
806 #endif
807         BUG();
808 }
809
810 __attribute__((weak))
811 void __init native_machine_early_platform_add_devices(void)
812 {
813 }
814
815 void __init setup_arch(char **cmdline_p)
816 {
817         unsigned long sclk, cclk;
818
819         native_machine_early_platform_add_devices();
820
821         enable_shadow_console();
822
823         /* Check to make sure we are running on the right processor */
824         if (unlikely(CPUID != bfin_cpuid()))
825                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
826                         CPU, bfin_cpuid(), bfin_revid());
827
828 #ifdef CONFIG_DUMMY_CONSOLE
829         conswitchp = &dummy_con;
830 #endif
831
832 #if defined(CONFIG_CMDLINE_BOOL)
833         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
834         command_line[sizeof(command_line) - 1] = 0;
835 #endif
836
837         /* Keep a copy of command line */
838         *cmdline_p = &command_line[0];
839         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
840         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
841
842         memset(&bfin_memmap, 0, sizeof(bfin_memmap));
843
844         /* If the user does not specify things on the command line, use
845          * what the bootloader set things up as
846          */
847         physical_mem_end = 0;
848         parse_cmdline_early(&command_line[0]);
849
850         if (_ramend == 0)
851                 _ramend = get_mem_size() * 1024 * 1024;
852
853         if (physical_mem_end == 0)
854                 physical_mem_end = _ramend;
855
856         memory_setup();
857
858         /* Initialize Async memory banks */
859         bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
860         bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
861         bfin_write_EBIU_AMGCTL(AMGCTLVAL);
862 #ifdef CONFIG_EBIU_MBSCTLVAL
863         bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
864         bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
865         bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
866 #endif
867
868         cclk = get_cclk();
869         sclk = get_sclk();
870
871         if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk)
872                 panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK");
873
874 #ifdef BF561_FAMILY
875         if (ANOMALY_05000266) {
876                 bfin_read_IMDMA_D0_IRQ_STATUS();
877                 bfin_read_IMDMA_D1_IRQ_STATUS();
878         }
879 #endif
880         printk(KERN_INFO "Hardware Trace ");
881         if (bfin_read_TBUFCTL() & 0x1)
882                 printk(KERN_CONT "Active ");
883         else
884                 printk(KERN_CONT "Off ");
885         if (bfin_read_TBUFCTL() & 0x2)
886                 printk(KERN_CONT "and Enabled\n");
887         else
888                 printk(KERN_CONT "and Disabled\n");
889
890         printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
891
892         /* Newer parts mirror SWRST bits in SYSCR */
893 #if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
894     defined(CONFIG_BF538) || defined(CONFIG_BF539)
895         _bfin_swrst = bfin_read_SWRST();
896 #else
897         /* Clear boot mode field */
898         _bfin_swrst = bfin_read_SYSCR() & ~0xf;
899 #endif
900
901 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
902         bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
903 #endif
904 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
905         bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
906 #endif
907
908 #ifdef CONFIG_SMP
909         if (_bfin_swrst & SWRST_DBL_FAULT_A) {
910 #else
911         if (_bfin_swrst & RESET_DOUBLE) {
912 #endif
913                 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
914 #ifdef CONFIG_DEBUG_DOUBLEFAULT
915                 /* We assume the crashing kernel, and the current symbol table match */
916                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
917                         (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
918                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
919                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
920 #endif
921                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
922                         init_retx);
923         } else if (_bfin_swrst & RESET_WDOG)
924                 printk(KERN_INFO "Recovering from Watchdog event\n");
925         else if (_bfin_swrst & RESET_SOFTWARE)
926                 printk(KERN_NOTICE "Reset caused by Software reset\n");
927
928         printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
929         if (bfin_compiled_revid() == 0xffff)
930                 printk(KERN_INFO "Compiled for ADSP-%s Rev any, running on 0.%d\n", CPU, bfin_revid());
931         else if (bfin_compiled_revid() == -1)
932                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
933         else
934                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
935
936         if (likely(CPUID == bfin_cpuid())) {
937                 if (bfin_revid() != bfin_compiled_revid()) {
938                         if (bfin_compiled_revid() == -1)
939                                 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
940                                        bfin_revid());
941                         else if (bfin_compiled_revid() != 0xffff) {
942                                 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
943                                        bfin_compiled_revid(), bfin_revid());
944                                 if (bfin_compiled_revid() > bfin_revid())
945                                         panic("Error: you are missing anomaly workarounds for this rev");
946                         }
947                 }
948                 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
949                         printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
950                                CPU, bfin_revid());
951         }
952
953         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
954
955         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
956                cclk / 1000000, sclk / 1000000);
957
958         setup_bootmem_allocator();
959
960         paging_init();
961
962         /* Copy atomic sequences to their fixed location, and sanity check that
963            these locations are the ones that we advertise to userspace.  */
964         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
965                FIXED_CODE_END - FIXED_CODE_START);
966         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
967                != SIGRETURN_STUB - FIXED_CODE_START);
968         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
969                != ATOMIC_XCHG32 - FIXED_CODE_START);
970         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
971                != ATOMIC_CAS32 - FIXED_CODE_START);
972         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
973                != ATOMIC_ADD32 - FIXED_CODE_START);
974         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
975                != ATOMIC_SUB32 - FIXED_CODE_START);
976         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
977                != ATOMIC_IOR32 - FIXED_CODE_START);
978         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
979                != ATOMIC_AND32 - FIXED_CODE_START);
980         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
981                != ATOMIC_XOR32 - FIXED_CODE_START);
982         BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
983                 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
984
985 #ifdef CONFIG_SMP
986         platform_init_cpus();
987 #endif
988         init_exception_vectors();
989         bfin_cache_init();      /* Initialize caches for the boot CPU */
990 }
991
992 static int __init topology_init(void)
993 {
994         unsigned int cpu;
995         /* Record CPU-private information for the boot processor. */
996         bfin_setup_cpudata(0);
997
998         for_each_possible_cpu(cpu) {
999                 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
1000         }
1001
1002         return 0;
1003 }
1004
1005 subsys_initcall(topology_init);
1006
1007 /* Get the input clock frequency */
1008 static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
1009 static u_long get_clkin_hz(void)
1010 {
1011         return cached_clkin_hz;
1012 }
1013 static int __init early_init_clkin_hz(char *buf)
1014 {
1015         cached_clkin_hz = simple_strtoul(buf, NULL, 0);
1016 #ifdef BFIN_KERNEL_CLOCK
1017         if (cached_clkin_hz != CONFIG_CLKIN_HZ)
1018                 panic("cannot change clkin_hz when reprogramming clocks");
1019 #endif
1020         return 1;
1021 }
1022 early_param("clkin_hz=", early_init_clkin_hz);
1023
1024 /* Get the voltage input multiplier */
1025 static u_long get_vco(void)
1026 {
1027         static u_long cached_vco;
1028         u_long msel, pll_ctl;
1029
1030         /* The assumption here is that VCO never changes at runtime.
1031          * If, someday, we support that, then we'll have to change this.
1032          */
1033         if (cached_vco)
1034                 return cached_vco;
1035
1036         pll_ctl = bfin_read_PLL_CTL();
1037         msel = (pll_ctl >> 9) & 0x3F;
1038         if (0 == msel)
1039                 msel = 64;
1040
1041         cached_vco = get_clkin_hz();
1042         cached_vco >>= (1 & pll_ctl);   /* DF bit */
1043         cached_vco *= msel;
1044         return cached_vco;
1045 }
1046
1047 /* Get the Core clock */
1048 u_long get_cclk(void)
1049 {
1050         static u_long cached_cclk_pll_div, cached_cclk;
1051         u_long csel, ssel;
1052
1053         if (bfin_read_PLL_STAT() & 0x1)
1054                 return get_clkin_hz();
1055
1056         ssel = bfin_read_PLL_DIV();
1057         if (ssel == cached_cclk_pll_div)
1058                 return cached_cclk;
1059         else
1060                 cached_cclk_pll_div = ssel;
1061
1062         csel = ((ssel >> 4) & 0x03);
1063         ssel &= 0xf;
1064         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
1065                 cached_cclk = get_vco() / ssel;
1066         else
1067                 cached_cclk = get_vco() >> csel;
1068         return cached_cclk;
1069 }
1070 EXPORT_SYMBOL(get_cclk);
1071
1072 /* Get the System clock */
1073 u_long get_sclk(void)
1074 {
1075         static u_long cached_sclk;
1076         u_long ssel;
1077
1078         /* The assumption here is that SCLK never changes at runtime.
1079          * If, someday, we support that, then we'll have to change this.
1080          */
1081         if (cached_sclk)
1082                 return cached_sclk;
1083
1084         if (bfin_read_PLL_STAT() & 0x1)
1085                 return get_clkin_hz();
1086
1087         ssel = bfin_read_PLL_DIV() & 0xf;
1088         if (0 == ssel) {
1089                 printk(KERN_WARNING "Invalid System Clock\n");
1090                 ssel = 1;
1091         }
1092
1093         cached_sclk = get_vco() / ssel;
1094         return cached_sclk;
1095 }
1096 EXPORT_SYMBOL(get_sclk);
1097
1098 unsigned long sclk_to_usecs(unsigned long sclk)
1099 {
1100         u64 tmp = USEC_PER_SEC * (u64)sclk;
1101         do_div(tmp, get_sclk());
1102         return tmp;
1103 }
1104 EXPORT_SYMBOL(sclk_to_usecs);
1105
1106 unsigned long usecs_to_sclk(unsigned long usecs)
1107 {
1108         u64 tmp = get_sclk() * (u64)usecs;
1109         do_div(tmp, USEC_PER_SEC);
1110         return tmp;
1111 }
1112 EXPORT_SYMBOL(usecs_to_sclk);
1113
1114 /*
1115  *      Get CPU information for use by the procfs.
1116  */
1117 static int show_cpuinfo(struct seq_file *m, void *v)
1118 {
1119         char *cpu, *mmu, *fpu, *vendor, *cache;
1120         uint32_t revid;
1121         int cpu_num = *(unsigned int *)v;
1122         u_long sclk, cclk;
1123         u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1124         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
1125
1126         cpu = CPU;
1127         mmu = "none";
1128         fpu = "none";
1129         revid = bfin_revid();
1130
1131         sclk = get_sclk();
1132         cclk = get_cclk();
1133
1134         switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1135         case 0xca:
1136                 vendor = "Analog Devices";
1137                 break;
1138         default:
1139                 vendor = "unknown";
1140                 break;
1141         }
1142
1143         seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
1144
1145         if (CPUID == bfin_cpuid())
1146                 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1147         else
1148                 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1149                         CPUID, bfin_cpuid());
1150
1151         seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1152                 "stepping\t: %d ",
1153                 cpu, cclk/1000000, sclk/1000000,
1154 #ifdef CONFIG_MPU
1155                 "mpu on",
1156 #else
1157                 "mpu off",
1158 #endif
1159                 revid);
1160
1161         if (bfin_revid() != bfin_compiled_revid()) {
1162                 if (bfin_compiled_revid() == -1)
1163                         seq_printf(m, "(Compiled for Rev none)");
1164                 else if (bfin_compiled_revid() == 0xffff)
1165                         seq_printf(m, "(Compiled for Rev any)");
1166                 else
1167                         seq_printf(m, "(Compiled for Rev %d)", bfin_compiled_revid());
1168         }
1169
1170         seq_printf(m, "\ncpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1171                 cclk/1000000, cclk%1000000,
1172                 sclk/1000000, sclk%1000000);
1173         seq_printf(m, "bogomips\t: %lu.%02lu\n"
1174                 "Calibration\t: %lu loops\n",
1175                 (loops_per_jiffy * HZ) / 500000,
1176                 ((loops_per_jiffy * HZ) / 5000) % 100,
1177                 (loops_per_jiffy * HZ));
1178
1179         /* Check Cache configutation */
1180         switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1181         case ACACHE_BSRAM:
1182                 cache = "dbank-A/B\t: cache/sram";
1183                 dcache_size = 16;
1184                 dsup_banks = 1;
1185                 break;
1186         case ACACHE_BCACHE:
1187                 cache = "dbank-A/B\t: cache/cache";
1188                 dcache_size = 32;
1189                 dsup_banks = 2;
1190                 break;
1191         case ASRAM_BSRAM:
1192                 cache = "dbank-A/B\t: sram/sram";
1193                 dcache_size = 0;
1194                 dsup_banks = 0;
1195                 break;
1196         default:
1197                 cache = "unknown";
1198                 dcache_size = 0;
1199                 dsup_banks = 0;
1200                 break;
1201         }
1202
1203         /* Is it turned on? */
1204         if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1205                 dcache_size = 0;
1206
1207         if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1208                 icache_size = 0;
1209
1210         seq_printf(m, "cache size\t: %d KB(L1 icache) "
1211                 "%d KB(L1 dcache) %d KB(L2 cache)\n",
1212                 icache_size, dcache_size, 0);
1213         seq_printf(m, "%s\n", cache);
1214         seq_printf(m, "external memory\t: "
1215 #if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE)
1216                    "cacheable"
1217 #else
1218                    "uncacheable"
1219 #endif
1220                    " in instruction cache\n");
1221         seq_printf(m, "external memory\t: "
1222 #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK)
1223                       "cacheable (write-back)"
1224 #elif defined(CONFIG_BFIN_EXTMEM_WRITETHROUGH)
1225                       "cacheable (write-through)"
1226 #else
1227                       "uncacheable"
1228 #endif
1229                       " in data cache\n");
1230
1231         if (icache_size)
1232                 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1233                            BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1234         else
1235                 seq_printf(m, "icache setup\t: off\n");
1236
1237         seq_printf(m,
1238                    "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1239                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1240                    BFIN_DLINES);
1241 #ifdef __ARCH_SYNC_CORE_DCACHE
1242         seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", dcache_invld_count[cpu_num]);
1243 #endif
1244 #ifdef __ARCH_SYNC_CORE_ICACHE
1245         seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", icache_invld_count[cpu_num]);
1246 #endif
1247
1248         if (cpu_num != num_possible_cpus() - 1)
1249                 return 0;
1250
1251         if (L2_LENGTH) {
1252                 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1253                 seq_printf(m, "L2 SRAM\t\t: "
1254 #if defined(CONFIG_BFIN_L2_ICACHEABLE)
1255                               "cacheable"
1256 #else
1257                               "uncacheable"
1258 #endif
1259                               " in instruction cache\n");
1260                 seq_printf(m, "L2 SRAM\t\t: "
1261 #if defined(CONFIG_BFIN_L2_WRITEBACK)
1262                               "cacheable (write-back)"
1263 #elif defined(CONFIG_BFIN_L2_WRITETHROUGH)
1264                               "cacheable (write-through)"
1265 #else
1266                               "uncacheable"
1267 #endif
1268                               " in data cache\n");
1269         }
1270         seq_printf(m, "board name\t: %s\n", bfin_board_name);
1271         seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1272                  physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1273         seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1274                 ((int)memory_end - (int)_rambase) >> 10,
1275                 (void *)_rambase,
1276                 (void *)memory_end);
1277         seq_printf(m, "\n");
1278
1279         return 0;
1280 }
1281
1282 static void *c_start(struct seq_file *m, loff_t *pos)
1283 {
1284         if (*pos == 0)
1285                 *pos = first_cpu(cpu_online_map);
1286         if (*pos >= num_online_cpus())
1287                 return NULL;
1288
1289         return pos;
1290 }
1291
1292 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1293 {
1294         *pos = next_cpu(*pos, cpu_online_map);
1295
1296         return c_start(m, pos);
1297 }
1298
1299 static void c_stop(struct seq_file *m, void *v)
1300 {
1301 }
1302
1303 const struct seq_operations cpuinfo_op = {
1304         .start = c_start,
1305         .next = c_next,
1306         .stop = c_stop,
1307         .show = show_cpuinfo,
1308 };
1309
1310 void __init cmdline_init(const char *r0)
1311 {
1312         early_shadow_stamp();
1313         if (r0)
1314                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1315 }