Blackfin: decouple unrelated cache settings to get exact behavior
[linux-2.6.git] / arch / blackfin / kernel / setup.c
1 /*
2  * arch/blackfin/kernel/setup.c
3  *
4  * Copyright 2004-2006 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #include <linux/delay.h>
12 #include <linux/console.h>
13 #include <linux/bootmem.h>
14 #include <linux/seq_file.h>
15 #include <linux/cpu.h>
16 #include <linux/mm.h>
17 #include <linux/module.h>
18 #include <linux/tty.h>
19 #include <linux/pfn.h>
20
21 #ifdef CONFIG_MTD_UCLINUX
22 #include <linux/mtd/map.h>
23 #include <linux/ext2_fs.h>
24 #include <linux/cramfs_fs.h>
25 #include <linux/romfs_fs.h>
26 #endif
27
28 #include <asm/cplb.h>
29 #include <asm/cacheflush.h>
30 #include <asm/blackfin.h>
31 #include <asm/cplbinit.h>
32 #include <asm/div64.h>
33 #include <asm/cpu.h>
34 #include <asm/fixed_code.h>
35 #include <asm/early_printk.h>
36
37 u16 _bfin_swrst;
38 EXPORT_SYMBOL(_bfin_swrst);
39
40 unsigned long memory_start, memory_end, physical_mem_end;
41 unsigned long _rambase, _ramstart, _ramend;
42 unsigned long reserved_mem_dcache_on;
43 unsigned long reserved_mem_icache_on;
44 EXPORT_SYMBOL(memory_start);
45 EXPORT_SYMBOL(memory_end);
46 EXPORT_SYMBOL(physical_mem_end);
47 EXPORT_SYMBOL(_ramend);
48 EXPORT_SYMBOL(reserved_mem_dcache_on);
49
50 #ifdef CONFIG_MTD_UCLINUX
51 extern struct map_info uclinux_ram_map;
52 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
53 unsigned long _ebss;
54 EXPORT_SYMBOL(memory_mtd_end);
55 EXPORT_SYMBOL(memory_mtd_start);
56 EXPORT_SYMBOL(mtd_size);
57 #endif
58
59 char __initdata command_line[COMMAND_LINE_SIZE];
60 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
61         *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
62
63 /* boot memmap, for parsing "memmap=" */
64 #define BFIN_MEMMAP_MAX         128 /* number of entries in bfin_memmap */
65 #define BFIN_MEMMAP_RAM         1
66 #define BFIN_MEMMAP_RESERVED    2
67 static struct bfin_memmap {
68         int nr_map;
69         struct bfin_memmap_entry {
70                 unsigned long long addr; /* start of memory segment */
71                 unsigned long long size;
72                 unsigned long type;
73         } map[BFIN_MEMMAP_MAX];
74 } bfin_memmap __initdata;
75
76 /* for memmap sanitization */
77 struct change_member {
78         struct bfin_memmap_entry *pentry; /* pointer to original entry */
79         unsigned long long addr; /* address for this change point */
80 };
81 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
82 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
83 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
84 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
85
86 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
87
88 static int early_init_clkin_hz(char *buf);
89
90 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
91 void __init generate_cplb_tables(void)
92 {
93         unsigned int cpu;
94
95         generate_cplb_tables_all();
96         /* Generate per-CPU I&D CPLB tables */
97         for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
98                 generate_cplb_tables_cpu(cpu);
99 }
100 #endif
101
102 void __cpuinit bfin_setup_caches(unsigned int cpu)
103 {
104 #ifdef CONFIG_BFIN_ICACHE
105         bfin_icache_init(icplb_tbl[cpu]);
106 #endif
107
108 #ifdef CONFIG_BFIN_DCACHE
109         bfin_dcache_init(dcplb_tbl[cpu]);
110 #endif
111
112         /*
113          * In cache coherence emulation mode, we need to have the
114          * D-cache enabled before running any atomic operation which
115          * might invove cache invalidation (i.e. spinlock, rwlock).
116          * So printk's are deferred until then.
117          */
118 #ifdef CONFIG_BFIN_ICACHE
119         printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
120         printk(KERN_INFO "  External memory:"
121 # ifdef CONFIG_BFIN_EXTMEM_ICACHEABLE
122                " cacheable"
123 # else
124                " uncacheable"
125 # endif
126                " in instruction cache\n");
127         if (L2_LENGTH)
128                 printk(KERN_INFO "  L2 SRAM        :"
129 # ifdef CONFIG_BFIN_L2_ICACHEABLE
130                        " cacheable"
131 # else
132                        " uncacheable"
133 # endif
134                        " in instruction cache\n");
135
136 #else
137         printk(KERN_INFO "Instruction Cache Disabled for CPU%u\n", cpu);
138 #endif
139
140 #ifdef CONFIG_BFIN_DCACHE
141         printk(KERN_INFO "Data Cache Enabled for CPU%u\n", cpu);
142         printk(KERN_INFO "  External memory:"
143 # if defined CONFIG_BFIN_EXTMEM_WRITEBACK
144                " cacheable (write-back)"
145 # elif defined CONFIG_BFIN_EXTMEM_WRITETHROUGH
146                " cacheable (write-through)"
147 # else
148                " uncacheable"
149 # endif
150                " in data cache\n");
151         if (L2_LENGTH)
152                 printk(KERN_INFO "  L2 SRAM        :"
153 # if defined CONFIG_BFIN_L2_WRITEBACK
154                        " cacheable (write-back)"
155 # elif defined CONFIG_BFIN_L2_WRITETHROUGH
156                        " cacheable (write-through)"
157 # else
158                        " uncacheable"
159 # endif
160                        " in data cache\n");
161 #else
162         printk(KERN_INFO "Data Cache Disabled for CPU%u\n", cpu);
163 #endif
164 }
165
166 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
167 {
168         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
169
170         cpudata->idle = current;
171         cpudata->loops_per_jiffy = loops_per_jiffy;
172         cpudata->imemctl = bfin_read_IMEM_CONTROL();
173         cpudata->dmemctl = bfin_read_DMEM_CONTROL();
174 }
175
176 void __init bfin_cache_init(void)
177 {
178 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
179         generate_cplb_tables();
180 #endif
181         bfin_setup_caches(0);
182 }
183
184 void __init bfin_relocate_l1_mem(void)
185 {
186         unsigned long l1_code_length;
187         unsigned long l1_data_a_length;
188         unsigned long l1_data_b_length;
189         unsigned long l2_length;
190
191         /*
192          * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S
193          * we know that everything about l1 text/data is nice and aligned,
194          * so copy by 4 byte chunks, and don't worry about overlapping
195          * src/dest.
196          *
197          * We can't use the dma_memcpy functions, since they can call
198          * scheduler functions which might be in L1 :( and core writes
199          * into L1 instruction cause bad access errors, so we are stuck,
200          * we are required to use DMA, but can't use the common dma
201          * functions. We can't use memcpy either - since that might be
202          * going to be in the relocated L1
203          */
204
205         blackfin_dma_early_init();
206
207         /* if necessary, copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
208         l1_code_length = _etext_l1 - _stext_l1;
209         if (l1_code_length)
210                 early_dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
211
212         /* if necessary, copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
213         l1_data_a_length = _sbss_l1 - _sdata_l1;
214         if (l1_data_a_length)
215                 early_dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
216
217         /* if necessary, copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
218         l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
219         if (l1_data_b_length)
220                 early_dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
221                         l1_data_a_length, l1_data_b_length);
222
223         early_dma_memcpy_done();
224
225         /* if necessary, copy _stext_l2 to _edata_l2 to L2 SRAM */
226         if (L2_LENGTH != 0) {
227                 l2_length = _sbss_l2 - _stext_l2;
228                 if (l2_length)
229                         memcpy(_stext_l2, _l2_lma_start, l2_length);
230         }
231 }
232
233 /* add_memory_region to memmap */
234 static void __init add_memory_region(unsigned long long start,
235                               unsigned long long size, int type)
236 {
237         int i;
238
239         i = bfin_memmap.nr_map;
240
241         if (i == BFIN_MEMMAP_MAX) {
242                 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
243                 return;
244         }
245
246         bfin_memmap.map[i].addr = start;
247         bfin_memmap.map[i].size = size;
248         bfin_memmap.map[i].type = type;
249         bfin_memmap.nr_map++;
250 }
251
252 /*
253  * Sanitize the boot memmap, removing overlaps.
254  */
255 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
256 {
257         struct change_member *change_tmp;
258         unsigned long current_type, last_type;
259         unsigned long long last_addr;
260         int chgidx, still_changing;
261         int overlap_entries;
262         int new_entry;
263         int old_nr, new_nr, chg_nr;
264         int i;
265
266         /*
267                 Visually we're performing the following (1,2,3,4 = memory types)
268
269                 Sample memory map (w/overlaps):
270                    ____22__________________
271                    ______________________4_
272                    ____1111________________
273                    _44_____________________
274                    11111111________________
275                    ____________________33__
276                    ___________44___________
277                    __________33333_________
278                    ______________22________
279                    ___________________2222_
280                    _________111111111______
281                    _____________________11_
282                    _________________4______
283
284                 Sanitized equivalent (no overlap):
285                    1_______________________
286                    _44_____________________
287                    ___1____________________
288                    ____22__________________
289                    ______11________________
290                    _________1______________
291                    __________3_____________
292                    ___________44___________
293                    _____________33_________
294                    _______________2________
295                    ________________1_______
296                    _________________4______
297                    ___________________2____
298                    ____________________33__
299                    ______________________4_
300         */
301         /* if there's only one memory region, don't bother */
302         if (*pnr_map < 2)
303                 return -1;
304
305         old_nr = *pnr_map;
306
307         /* bail out if we find any unreasonable addresses in memmap */
308         for (i = 0; i < old_nr; i++)
309                 if (map[i].addr + map[i].size < map[i].addr)
310                         return -1;
311
312         /* create pointers for initial change-point information (for sorting) */
313         for (i = 0; i < 2*old_nr; i++)
314                 change_point[i] = &change_point_list[i];
315
316         /* record all known change-points (starting and ending addresses),
317            omitting those that are for empty memory regions */
318         chgidx = 0;
319         for (i = 0; i < old_nr; i++) {
320                 if (map[i].size != 0) {
321                         change_point[chgidx]->addr = map[i].addr;
322                         change_point[chgidx++]->pentry = &map[i];
323                         change_point[chgidx]->addr = map[i].addr + map[i].size;
324                         change_point[chgidx++]->pentry = &map[i];
325                 }
326         }
327         chg_nr = chgidx;        /* true number of change-points */
328
329         /* sort change-point list by memory addresses (low -> high) */
330         still_changing = 1;
331         while (still_changing) {
332                 still_changing = 0;
333                 for (i = 1; i < chg_nr; i++) {
334                         /* if <current_addr> > <last_addr>, swap */
335                         /* or, if current=<start_addr> & last=<end_addr>, swap */
336                         if ((change_point[i]->addr < change_point[i-1]->addr) ||
337                                 ((change_point[i]->addr == change_point[i-1]->addr) &&
338                                  (change_point[i]->addr == change_point[i]->pentry->addr) &&
339                                  (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
340                            ) {
341                                 change_tmp = change_point[i];
342                                 change_point[i] = change_point[i-1];
343                                 change_point[i-1] = change_tmp;
344                                 still_changing = 1;
345                         }
346                 }
347         }
348
349         /* create a new memmap, removing overlaps */
350         overlap_entries = 0;    /* number of entries in the overlap table */
351         new_entry = 0;          /* index for creating new memmap entries */
352         last_type = 0;          /* start with undefined memory type */
353         last_addr = 0;          /* start with 0 as last starting address */
354         /* loop through change-points, determining affect on the new memmap */
355         for (chgidx = 0; chgidx < chg_nr; chgidx++) {
356                 /* keep track of all overlapping memmap entries */
357                 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
358                         /* add map entry to overlap list (> 1 entry implies an overlap) */
359                         overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
360                 } else {
361                         /* remove entry from list (order independent, so swap with last) */
362                         for (i = 0; i < overlap_entries; i++) {
363                                 if (overlap_list[i] == change_point[chgidx]->pentry)
364                                         overlap_list[i] = overlap_list[overlap_entries-1];
365                         }
366                         overlap_entries--;
367                 }
368                 /* if there are overlapping entries, decide which "type" to use */
369                 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
370                 current_type = 0;
371                 for (i = 0; i < overlap_entries; i++)
372                         if (overlap_list[i]->type > current_type)
373                                 current_type = overlap_list[i]->type;
374                 /* continue building up new memmap based on this information */
375                 if (current_type != last_type) {
376                         if (last_type != 0) {
377                                 new_map[new_entry].size =
378                                         change_point[chgidx]->addr - last_addr;
379                                 /* move forward only if the new size was non-zero */
380                                 if (new_map[new_entry].size != 0)
381                                         if (++new_entry >= BFIN_MEMMAP_MAX)
382                                                 break;  /* no more space left for new entries */
383                         }
384                         if (current_type != 0) {
385                                 new_map[new_entry].addr = change_point[chgidx]->addr;
386                                 new_map[new_entry].type = current_type;
387                                 last_addr = change_point[chgidx]->addr;
388                         }
389                         last_type = current_type;
390                 }
391         }
392         new_nr = new_entry;     /* retain count for new entries */
393
394         /* copy new mapping into original location */
395         memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
396         *pnr_map = new_nr;
397
398         return 0;
399 }
400
401 static void __init print_memory_map(char *who)
402 {
403         int i;
404
405         for (i = 0; i < bfin_memmap.nr_map; i++) {
406                 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
407                         bfin_memmap.map[i].addr,
408                         bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
409                 switch (bfin_memmap.map[i].type) {
410                 case BFIN_MEMMAP_RAM:
411                                 printk("(usable)\n");
412                                 break;
413                 case BFIN_MEMMAP_RESERVED:
414                                 printk("(reserved)\n");
415                                 break;
416                 default:        printk("type %lu\n", bfin_memmap.map[i].type);
417                                 break;
418                 }
419         }
420 }
421
422 static __init int parse_memmap(char *arg)
423 {
424         unsigned long long start_at, mem_size;
425
426         if (!arg)
427                 return -EINVAL;
428
429         mem_size = memparse(arg, &arg);
430         if (*arg == '@') {
431                 start_at = memparse(arg+1, &arg);
432                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
433         } else if (*arg == '$') {
434                 start_at = memparse(arg+1, &arg);
435                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
436         }
437
438         return 0;
439 }
440
441 /*
442  * Initial parsing of the command line.  Currently, we support:
443  *  - Controlling the linux memory size: mem=xxx[KMG]
444  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
445  *       $ -> reserved memory is dcacheable
446  *       # -> reserved memory is icacheable
447  *  - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
448  *       @ from <start> to <start>+<mem>, type RAM
449  *       $ from <start> to <start>+<mem>, type RESERVED
450  */
451 static __init void parse_cmdline_early(char *cmdline_p)
452 {
453         char c = ' ', *to = cmdline_p;
454         unsigned int memsize;
455         for (;;) {
456                 if (c == ' ') {
457                         if (!memcmp(to, "mem=", 4)) {
458                                 to += 4;
459                                 memsize = memparse(to, &to);
460                                 if (memsize)
461                                         _ramend = memsize;
462
463                         } else if (!memcmp(to, "max_mem=", 8)) {
464                                 to += 8;
465                                 memsize = memparse(to, &to);
466                                 if (memsize) {
467                                         physical_mem_end = memsize;
468                                         if (*to != ' ') {
469                                                 if (*to == '$'
470                                                     || *(to + 1) == '$')
471                                                         reserved_mem_dcache_on = 1;
472                                                 if (*to == '#'
473                                                     || *(to + 1) == '#')
474                                                         reserved_mem_icache_on = 1;
475                                         }
476                                 }
477                         } else if (!memcmp(to, "clkin_hz=", 9)) {
478                                 to += 9;
479                                 early_init_clkin_hz(to);
480                         } else if (!memcmp(to, "earlyprintk=", 12)) {
481                                 to += 12;
482                                 setup_early_printk(to);
483                         } else if (!memcmp(to, "memmap=", 7)) {
484                                 to += 7;
485                                 parse_memmap(to);
486                         }
487                 }
488                 c = *(to++);
489                 if (!c)
490                         break;
491         }
492 }
493
494 /*
495  * Setup memory defaults from user config.
496  * The physical memory layout looks like:
497  *
498  *  [_rambase, _ramstart]:              kernel image
499  *  [memory_start, memory_end]:         dynamic memory managed by kernel
500  *  [memory_end, _ramend]:              reserved memory
501  *      [memory_mtd_start(memory_end),
502  *              memory_mtd_start + mtd_size]:   rootfs (if any)
503  *      [_ramend - DMA_UNCACHED_REGION,
504  *              _ramend]:                       uncached DMA region
505  *  [_ramend, physical_mem_end]:        memory not managed by kernel
506  */
507 static __init void memory_setup(void)
508 {
509 #ifdef CONFIG_MTD_UCLINUX
510         unsigned long mtd_phys = 0;
511 #endif
512
513         _rambase = (unsigned long)_stext;
514         _ramstart = (unsigned long)_end;
515
516         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
517                 console_init();
518                 panic("DMA region exceeds memory limit: %lu.",
519                         _ramend - _ramstart);
520         }
521         memory_end = _ramend - DMA_UNCACHED_REGION;
522
523 #ifdef CONFIG_MPU
524         /* Round up to multiple of 4MB */
525         memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
526 #else
527         memory_start = PAGE_ALIGN(_ramstart);
528 #endif
529
530 #if defined(CONFIG_MTD_UCLINUX)
531         /* generic memory mapped MTD driver */
532         memory_mtd_end = memory_end;
533
534         mtd_phys = _ramstart;
535         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
536
537 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
538         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
539                 mtd_size =
540                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
541 # endif
542
543 # if defined(CONFIG_CRAMFS)
544         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
545                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
546 # endif
547
548 # if defined(CONFIG_ROMFS_FS)
549         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
550             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
551                 mtd_size =
552                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
553 #  if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
554         /* Due to a Hardware Anomaly we need to limit the size of usable
555          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
556          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
557          */
558 #   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
559         if (memory_end >= 56 * 1024 * 1024)
560                 memory_end = 56 * 1024 * 1024;
561 #   else
562         if (memory_end >= 60 * 1024 * 1024)
563                 memory_end = 60 * 1024 * 1024;
564 #   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
565 #  endif                                /* ANOMALY_05000263 */
566 # endif                         /* CONFIG_ROMFS_FS */
567
568         memory_end -= mtd_size;
569
570         if (mtd_size == 0) {
571                 console_init();
572                 panic("Don't boot kernel without rootfs attached.");
573         }
574
575         /* Relocate MTD image to the top of memory after the uncached memory area */
576         uclinux_ram_map.phys = memory_mtd_start = memory_end;
577         uclinux_ram_map.size = mtd_size;
578         dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
579 #endif                          /* CONFIG_MTD_UCLINUX */
580
581 #if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
582         /* Due to a Hardware Anomaly we need to limit the size of usable
583          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
584          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
585          */
586 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
587         if (memory_end >= 56 * 1024 * 1024)
588                 memory_end = 56 * 1024 * 1024;
589 #else
590         if (memory_end >= 60 * 1024 * 1024)
591                 memory_end = 60 * 1024 * 1024;
592 #endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
593         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
594 #endif                          /* ANOMALY_05000263 */
595
596 #ifdef CONFIG_MPU
597         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
598         page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
599 #endif
600
601 #if !defined(CONFIG_MTD_UCLINUX)
602         /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
603         memory_end -= SIZE_4K;
604 #endif
605
606         init_mm.start_code = (unsigned long)_stext;
607         init_mm.end_code = (unsigned long)_etext;
608         init_mm.end_data = (unsigned long)_edata;
609         init_mm.brk = (unsigned long)0;
610
611         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
612         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
613
614         printk(KERN_INFO "Memory map:\n"
615                 KERN_INFO "  fixedcode = 0x%p-0x%p\n"
616                 KERN_INFO "  text      = 0x%p-0x%p\n"
617                 KERN_INFO "  rodata    = 0x%p-0x%p\n"
618                 KERN_INFO "  bss       = 0x%p-0x%p\n"
619                 KERN_INFO "  data      = 0x%p-0x%p\n"
620                 KERN_INFO "    stack   = 0x%p-0x%p\n"
621                 KERN_INFO "  init      = 0x%p-0x%p\n"
622                 KERN_INFO "  available = 0x%p-0x%p\n"
623 #ifdef CONFIG_MTD_UCLINUX
624                 KERN_INFO "  rootfs    = 0x%p-0x%p\n"
625 #endif
626 #if DMA_UNCACHED_REGION > 0
627                 KERN_INFO "  DMA Zone  = 0x%p-0x%p\n"
628 #endif
629                 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
630                 _stext, _etext,
631                 __start_rodata, __end_rodata,
632                 __bss_start, __bss_stop,
633                 _sdata, _edata,
634                 (void *)&init_thread_union,
635                 (void *)((int)(&init_thread_union) + 0x2000),
636                 __init_begin, __init_end,
637                 (void *)_ramstart, (void *)memory_end
638 #ifdef CONFIG_MTD_UCLINUX
639                 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
640 #endif
641 #if DMA_UNCACHED_REGION > 0
642                 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
643 #endif
644                 );
645 }
646
647 /*
648  * Find the lowest, highest page frame number we have available
649  */
650 void __init find_min_max_pfn(void)
651 {
652         int i;
653
654         max_pfn = 0;
655         min_low_pfn = memory_end;
656
657         for (i = 0; i < bfin_memmap.nr_map; i++) {
658                 unsigned long start, end;
659                 /* RAM? */
660                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
661                         continue;
662                 start = PFN_UP(bfin_memmap.map[i].addr);
663                 end = PFN_DOWN(bfin_memmap.map[i].addr +
664                                 bfin_memmap.map[i].size);
665                 if (start >= end)
666                         continue;
667                 if (end > max_pfn)
668                         max_pfn = end;
669                 if (start < min_low_pfn)
670                         min_low_pfn = start;
671         }
672 }
673
674 static __init void setup_bootmem_allocator(void)
675 {
676         int bootmap_size;
677         int i;
678         unsigned long start_pfn, end_pfn;
679         unsigned long curr_pfn, last_pfn, size;
680
681         /* mark memory between memory_start and memory_end usable */
682         add_memory_region(memory_start,
683                 memory_end - memory_start, BFIN_MEMMAP_RAM);
684         /* sanity check for overlap */
685         sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
686         print_memory_map("boot memmap");
687
688         /* intialize globals in linux/bootmem.h */
689         find_min_max_pfn();
690         /* pfn of the last usable page frame */
691         if (max_pfn > memory_end >> PAGE_SHIFT)
692                 max_pfn = memory_end >> PAGE_SHIFT;
693         /* pfn of last page frame directly mapped by kernel */
694         max_low_pfn = max_pfn;
695         /* pfn of the first usable page frame after kernel image*/
696         if (min_low_pfn < memory_start >> PAGE_SHIFT)
697                 min_low_pfn = memory_start >> PAGE_SHIFT;
698
699         start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
700         end_pfn = memory_end >> PAGE_SHIFT;
701
702         /*
703          * give all the memory to the bootmap allocator, tell it to put the
704          * boot mem_map at the start of memory.
705          */
706         bootmap_size = init_bootmem_node(NODE_DATA(0),
707                         memory_start >> PAGE_SHIFT,     /* map goes here */
708                         start_pfn, end_pfn);
709
710         /* register the memmap regions with the bootmem allocator */
711         for (i = 0; i < bfin_memmap.nr_map; i++) {
712                 /*
713                  * Reserve usable memory
714                  */
715                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
716                         continue;
717                 /*
718                  * We are rounding up the start address of usable memory:
719                  */
720                 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
721                 if (curr_pfn >= end_pfn)
722                         continue;
723                 /*
724                  * ... and at the end of the usable range downwards:
725                  */
726                 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
727                                          bfin_memmap.map[i].size);
728
729                 if (last_pfn > end_pfn)
730                         last_pfn = end_pfn;
731
732                 /*
733                  * .. finally, did all the rounding and playing
734                  * around just make the area go away?
735                  */
736                 if (last_pfn <= curr_pfn)
737                         continue;
738
739                 size = last_pfn - curr_pfn;
740                 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
741         }
742
743         /* reserve memory before memory_start, including bootmap */
744         reserve_bootmem(PAGE_OFFSET,
745                 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
746                 BOOTMEM_DEFAULT);
747 }
748
749 #define EBSZ_TO_MEG(ebsz) \
750 ({ \
751         int meg = 0; \
752         switch (ebsz & 0xf) { \
753                 case 0x1: meg =  16; break; \
754                 case 0x3: meg =  32; break; \
755                 case 0x5: meg =  64; break; \
756                 case 0x7: meg = 128; break; \
757                 case 0x9: meg = 256; break; \
758                 case 0xb: meg = 512; break; \
759         } \
760         meg; \
761 })
762 static inline int __init get_mem_size(void)
763 {
764 #if defined(EBIU_SDBCTL)
765 # if defined(BF561_FAMILY)
766         int ret = 0;
767         u32 sdbctl = bfin_read_EBIU_SDBCTL();
768         ret += EBSZ_TO_MEG(sdbctl >>  0);
769         ret += EBSZ_TO_MEG(sdbctl >>  8);
770         ret += EBSZ_TO_MEG(sdbctl >> 16);
771         ret += EBSZ_TO_MEG(sdbctl >> 24);
772         return ret;
773 # else
774         return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
775 # endif
776 #elif defined(EBIU_DDRCTL1)
777         u32 ddrctl = bfin_read_EBIU_DDRCTL1();
778         int ret = 0;
779         switch (ddrctl & 0xc0000) {
780                 case DEVSZ_64:  ret = 64 / 8;
781                 case DEVSZ_128: ret = 128 / 8;
782                 case DEVSZ_256: ret = 256 / 8;
783                 case DEVSZ_512: ret = 512 / 8;
784         }
785         switch (ddrctl & 0x30000) {
786                 case DEVWD_4:  ret *= 2;
787                 case DEVWD_8:  ret *= 2;
788                 case DEVWD_16: break;
789         }
790         if ((ddrctl & 0xc000) == 0x4000)
791                 ret *= 2;
792         return ret;
793 #endif
794         BUG();
795 }
796
797 void __init setup_arch(char **cmdline_p)
798 {
799         unsigned long sclk, cclk;
800
801 #ifdef CONFIG_DUMMY_CONSOLE
802         conswitchp = &dummy_con;
803 #endif
804
805 #if defined(CONFIG_CMDLINE_BOOL)
806         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
807         command_line[sizeof(command_line) - 1] = 0;
808 #endif
809
810         /* Keep a copy of command line */
811         *cmdline_p = &command_line[0];
812         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
813         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
814
815         /* setup memory defaults from the user config */
816         physical_mem_end = 0;
817         _ramend = get_mem_size() * 1024 * 1024;
818
819         memset(&bfin_memmap, 0, sizeof(bfin_memmap));
820
821         parse_cmdline_early(&command_line[0]);
822
823         if (physical_mem_end == 0)
824                 physical_mem_end = _ramend;
825
826         memory_setup();
827
828         /* Initialize Async memory banks */
829         bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
830         bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
831         bfin_write_EBIU_AMGCTL(AMGCTLVAL);
832 #ifdef CONFIG_EBIU_MBSCTLVAL
833         bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
834         bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
835         bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
836 #endif
837
838         cclk = get_cclk();
839         sclk = get_sclk();
840
841         if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk)
842                 panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK");
843
844 #ifdef BF561_FAMILY
845         if (ANOMALY_05000266) {
846                 bfin_read_IMDMA_D0_IRQ_STATUS();
847                 bfin_read_IMDMA_D1_IRQ_STATUS();
848         }
849 #endif
850         printk(KERN_INFO "Hardware Trace ");
851         if (bfin_read_TBUFCTL() & 0x1)
852                 printk("Active ");
853         else
854                 printk("Off ");
855         if (bfin_read_TBUFCTL() & 0x2)
856                 printk("and Enabled\n");
857         else
858         printk("and Disabled\n");
859
860 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
861         /* we need to initialize the Flashrom device here since we might
862          * do things with flash early on in the boot
863          */
864         flash_probe();
865 #endif
866
867         printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
868
869         /* Newer parts mirror SWRST bits in SYSCR */
870 #if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
871     defined(CONFIG_BF538) || defined(CONFIG_BF539)
872         _bfin_swrst = bfin_read_SWRST();
873 #else
874         /* Clear boot mode field */
875         _bfin_swrst = bfin_read_SYSCR() & ~0xf;
876 #endif
877
878 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
879         bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
880 #endif
881 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
882         bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
883 #endif
884
885 #ifdef CONFIG_SMP
886         if (_bfin_swrst & SWRST_DBL_FAULT_A) {
887 #else
888         if (_bfin_swrst & RESET_DOUBLE) {
889 #endif
890                 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
891 #ifdef CONFIG_DEBUG_DOUBLEFAULT
892                 /* We assume the crashing kernel, and the current symbol table match */
893                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
894                         (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
895                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
896                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
897 #endif
898                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
899                         init_retx);
900         } else if (_bfin_swrst & RESET_WDOG)
901                 printk(KERN_INFO "Recovering from Watchdog event\n");
902         else if (_bfin_swrst & RESET_SOFTWARE)
903                 printk(KERN_NOTICE "Reset caused by Software reset\n");
904
905         printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
906         if (bfin_compiled_revid() == 0xffff)
907                 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
908         else if (bfin_compiled_revid() == -1)
909                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
910         else
911                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
912
913         if (unlikely(CPUID != bfin_cpuid()))
914                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
915                         CPU, bfin_cpuid(), bfin_revid());
916         else {
917                 if (bfin_revid() != bfin_compiled_revid()) {
918                         if (bfin_compiled_revid() == -1)
919                                 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
920                                        bfin_revid());
921                         else if (bfin_compiled_revid() != 0xffff) {
922                                 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
923                                        bfin_compiled_revid(), bfin_revid());
924                                 if (bfin_compiled_revid() > bfin_revid())
925                                         panic("Error: you are missing anomaly workarounds for this rev");
926                         }
927                 }
928                 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
929                         printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
930                                CPU, bfin_revid());
931         }
932
933         /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
934         if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
935                 panic("You can't run on this processor due to 05000448");
936
937         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
938
939         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
940                cclk / 1000000, sclk / 1000000);
941
942         setup_bootmem_allocator();
943
944         paging_init();
945
946         /* Copy atomic sequences to their fixed location, and sanity check that
947            these locations are the ones that we advertise to userspace.  */
948         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
949                FIXED_CODE_END - FIXED_CODE_START);
950         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
951                != SIGRETURN_STUB - FIXED_CODE_START);
952         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
953                != ATOMIC_XCHG32 - FIXED_CODE_START);
954         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
955                != ATOMIC_CAS32 - FIXED_CODE_START);
956         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
957                != ATOMIC_ADD32 - FIXED_CODE_START);
958         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
959                != ATOMIC_SUB32 - FIXED_CODE_START);
960         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
961                != ATOMIC_IOR32 - FIXED_CODE_START);
962         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
963                != ATOMIC_AND32 - FIXED_CODE_START);
964         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
965                != ATOMIC_XOR32 - FIXED_CODE_START);
966         BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
967                 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
968
969 #ifdef CONFIG_SMP
970         platform_init_cpus();
971 #endif
972         init_exception_vectors();
973         bfin_cache_init();      /* Initialize caches for the boot CPU */
974 }
975
976 static int __init topology_init(void)
977 {
978         unsigned int cpu;
979         /* Record CPU-private information for the boot processor. */
980         bfin_setup_cpudata(0);
981
982         for_each_possible_cpu(cpu) {
983                 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
984         }
985
986         return 0;
987 }
988
989 subsys_initcall(topology_init);
990
991 /* Get the input clock frequency */
992 static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
993 static u_long get_clkin_hz(void)
994 {
995         return cached_clkin_hz;
996 }
997 static int __init early_init_clkin_hz(char *buf)
998 {
999         cached_clkin_hz = simple_strtoul(buf, NULL, 0);
1000 #ifdef BFIN_KERNEL_CLOCK
1001         if (cached_clkin_hz != CONFIG_CLKIN_HZ)
1002                 panic("cannot change clkin_hz when reprogramming clocks");
1003 #endif
1004         return 1;
1005 }
1006 early_param("clkin_hz=", early_init_clkin_hz);
1007
1008 /* Get the voltage input multiplier */
1009 static u_long get_vco(void)
1010 {
1011         static u_long cached_vco;
1012         u_long msel, pll_ctl;
1013
1014         /* The assumption here is that VCO never changes at runtime.
1015          * If, someday, we support that, then we'll have to change this.
1016          */
1017         if (cached_vco)
1018                 return cached_vco;
1019
1020         pll_ctl = bfin_read_PLL_CTL();
1021         msel = (pll_ctl >> 9) & 0x3F;
1022         if (0 == msel)
1023                 msel = 64;
1024
1025         cached_vco = get_clkin_hz();
1026         cached_vco >>= (1 & pll_ctl);   /* DF bit */
1027         cached_vco *= msel;
1028         return cached_vco;
1029 }
1030
1031 /* Get the Core clock */
1032 u_long get_cclk(void)
1033 {
1034         static u_long cached_cclk_pll_div, cached_cclk;
1035         u_long csel, ssel;
1036
1037         if (bfin_read_PLL_STAT() & 0x1)
1038                 return get_clkin_hz();
1039
1040         ssel = bfin_read_PLL_DIV();
1041         if (ssel == cached_cclk_pll_div)
1042                 return cached_cclk;
1043         else
1044                 cached_cclk_pll_div = ssel;
1045
1046         csel = ((ssel >> 4) & 0x03);
1047         ssel &= 0xf;
1048         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
1049                 cached_cclk = get_vco() / ssel;
1050         else
1051                 cached_cclk = get_vco() >> csel;
1052         return cached_cclk;
1053 }
1054 EXPORT_SYMBOL(get_cclk);
1055
1056 /* Get the System clock */
1057 u_long get_sclk(void)
1058 {
1059         static u_long cached_sclk;
1060         u_long ssel;
1061
1062         /* The assumption here is that SCLK never changes at runtime.
1063          * If, someday, we support that, then we'll have to change this.
1064          */
1065         if (cached_sclk)
1066                 return cached_sclk;
1067
1068         if (bfin_read_PLL_STAT() & 0x1)
1069                 return get_clkin_hz();
1070
1071         ssel = bfin_read_PLL_DIV() & 0xf;
1072         if (0 == ssel) {
1073                 printk(KERN_WARNING "Invalid System Clock\n");
1074                 ssel = 1;
1075         }
1076
1077         cached_sclk = get_vco() / ssel;
1078         return cached_sclk;
1079 }
1080 EXPORT_SYMBOL(get_sclk);
1081
1082 unsigned long sclk_to_usecs(unsigned long sclk)
1083 {
1084         u64 tmp = USEC_PER_SEC * (u64)sclk;
1085         do_div(tmp, get_sclk());
1086         return tmp;
1087 }
1088 EXPORT_SYMBOL(sclk_to_usecs);
1089
1090 unsigned long usecs_to_sclk(unsigned long usecs)
1091 {
1092         u64 tmp = get_sclk() * (u64)usecs;
1093         do_div(tmp, USEC_PER_SEC);
1094         return tmp;
1095 }
1096 EXPORT_SYMBOL(usecs_to_sclk);
1097
1098 /*
1099  *      Get CPU information for use by the procfs.
1100  */
1101 static int show_cpuinfo(struct seq_file *m, void *v)
1102 {
1103         char *cpu, *mmu, *fpu, *vendor, *cache;
1104         uint32_t revid;
1105         int cpu_num = *(unsigned int *)v;
1106         u_long sclk, cclk;
1107         u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1108         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
1109
1110         cpu = CPU;
1111         mmu = "none";
1112         fpu = "none";
1113         revid = bfin_revid();
1114
1115         sclk = get_sclk();
1116         cclk = get_cclk();
1117
1118         switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1119         case 0xca:
1120                 vendor = "Analog Devices";
1121                 break;
1122         default:
1123                 vendor = "unknown";
1124                 break;
1125         }
1126
1127         seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
1128
1129         if (CPUID == bfin_cpuid())
1130                 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1131         else
1132                 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1133                         CPUID, bfin_cpuid());
1134
1135         seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1136                 "stepping\t: %d ",
1137                 cpu, cclk/1000000, sclk/1000000,
1138 #ifdef CONFIG_MPU
1139                 "mpu on",
1140 #else
1141                 "mpu off",
1142 #endif
1143                 revid);
1144
1145         if (bfin_revid() != bfin_compiled_revid()) {
1146                 if (bfin_compiled_revid() == -1)
1147                         seq_printf(m, "(Compiled for Rev none)");
1148                 else if (bfin_compiled_revid() == 0xffff)
1149                         seq_printf(m, "(Compiled for Rev any)");
1150                 else
1151                         seq_printf(m, "(Compiled for Rev %d)", bfin_compiled_revid());
1152         }
1153
1154         seq_printf(m, "\ncpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1155                 cclk/1000000, cclk%1000000,
1156                 sclk/1000000, sclk%1000000);
1157         seq_printf(m, "bogomips\t: %lu.%02lu\n"
1158                 "Calibration\t: %lu loops\n",
1159                 (cpudata->loops_per_jiffy * HZ) / 500000,
1160                 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1161                 (cpudata->loops_per_jiffy * HZ));
1162
1163         /* Check Cache configutation */
1164         switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1165         case ACACHE_BSRAM:
1166                 cache = "dbank-A/B\t: cache/sram";
1167                 dcache_size = 16;
1168                 dsup_banks = 1;
1169                 break;
1170         case ACACHE_BCACHE:
1171                 cache = "dbank-A/B\t: cache/cache";
1172                 dcache_size = 32;
1173                 dsup_banks = 2;
1174                 break;
1175         case ASRAM_BSRAM:
1176                 cache = "dbank-A/B\t: sram/sram";
1177                 dcache_size = 0;
1178                 dsup_banks = 0;
1179                 break;
1180         default:
1181                 cache = "unknown";
1182                 dcache_size = 0;
1183                 dsup_banks = 0;
1184                 break;
1185         }
1186
1187         /* Is it turned on? */
1188         if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1189                 dcache_size = 0;
1190
1191         if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1192                 icache_size = 0;
1193
1194         seq_printf(m, "cache size\t: %d KB(L1 icache) "
1195                 "%d KB(L1 dcache) %d KB(L2 cache)\n",
1196                 icache_size, dcache_size, 0);
1197         seq_printf(m, "%s\n", cache);
1198         seq_printf(m, "external memory\t: "
1199 #if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE)
1200                    "cacheable"
1201 #else
1202                    "uncacheable"
1203 #endif
1204                    " in instruction cache\n");
1205         seq_printf(m, "external memory\t: "
1206 #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK)
1207                       "cacheable (write-back)"
1208 #elif defined(CONFIG_BFIN_EXTMEM_WRITETHROUGH)
1209                       "cacheable (write-through)"
1210 #else
1211                       "uncacheable"
1212 #endif
1213                       " in data cache\n");
1214
1215         if (icache_size)
1216                 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1217                            BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1218         else
1219                 seq_printf(m, "icache setup\t: off\n");
1220
1221         seq_printf(m,
1222                    "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1223                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1224                    BFIN_DLINES);
1225 #ifdef __ARCH_SYNC_CORE_DCACHE
1226         seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
1227 #endif
1228 #ifdef __ARCH_SYNC_CORE_ICACHE
1229         seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count);
1230 #endif
1231 #ifdef CONFIG_BFIN_ICACHE_LOCK
1232         switch ((cpudata->imemctl >> 3) & WAYALL_L) {
1233         case WAY0_L:
1234                 seq_printf(m, "Way0 Locked-Down\n");
1235                 break;
1236         case WAY1_L:
1237                 seq_printf(m, "Way1 Locked-Down\n");
1238                 break;
1239         case WAY01_L:
1240                 seq_printf(m, "Way0,Way1 Locked-Down\n");
1241                 break;
1242         case WAY2_L:
1243                 seq_printf(m, "Way2 Locked-Down\n");
1244                 break;
1245         case WAY02_L:
1246                 seq_printf(m, "Way0,Way2 Locked-Down\n");
1247                 break;
1248         case WAY12_L:
1249                 seq_printf(m, "Way1,Way2 Locked-Down\n");
1250                 break;
1251         case WAY012_L:
1252                 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1253                 break;
1254         case WAY3_L:
1255                 seq_printf(m, "Way3 Locked-Down\n");
1256                 break;
1257         case WAY03_L:
1258                 seq_printf(m, "Way0,Way3 Locked-Down\n");
1259                 break;
1260         case WAY13_L:
1261                 seq_printf(m, "Way1,Way3 Locked-Down\n");
1262                 break;
1263         case WAY013_L:
1264                 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1265                 break;
1266         case WAY32_L:
1267                 seq_printf(m, "Way3,Way2 Locked-Down\n");
1268                 break;
1269         case WAY320_L:
1270                 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1271                 break;
1272         case WAY321_L:
1273                 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1274                 break;
1275         case WAYALL_L:
1276                 seq_printf(m, "All Ways are locked\n");
1277                 break;
1278         default:
1279                 seq_printf(m, "No Ways are locked\n");
1280         }
1281 #endif
1282
1283         if (cpu_num != num_possible_cpus() - 1)
1284                 return 0;
1285
1286         if (L2_LENGTH) {
1287                 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1288                 seq_printf(m, "L2 SRAM\t\t: "
1289 #if defined(CONFIG_BFIN_L2_ICACHEABLE)
1290                               "cacheable"
1291 #else
1292                               "uncacheable"
1293 #endif
1294                               " in instruction cache\n");
1295                 seq_printf(m, "L2 SRAM\t\t: "
1296 #if defined(CONFIG_BFIN_L2_WRITEBACK)
1297                               "cacheable (write-back)"
1298 #elif defined(CONFIG_BFIN_L2_WRITETHROUGH)
1299                               "cacheable (write-through)"
1300 #else
1301                               "uncacheable"
1302 #endif
1303                               " in data cache\n");
1304         }
1305         seq_printf(m, "board name\t: %s\n", bfin_board_name);
1306         seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1307                  physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1308         seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1309                 ((int)memory_end - (int)_stext) >> 10,
1310                 _stext,
1311                 (void *)memory_end);
1312         seq_printf(m, "\n");
1313
1314         return 0;
1315 }
1316
1317 static void *c_start(struct seq_file *m, loff_t *pos)
1318 {
1319         if (*pos == 0)
1320                 *pos = first_cpu(cpu_online_map);
1321         if (*pos >= num_online_cpus())
1322                 return NULL;
1323
1324         return pos;
1325 }
1326
1327 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1328 {
1329         *pos = next_cpu(*pos, cpu_online_map);
1330
1331         return c_start(m, pos);
1332 }
1333
1334 static void c_stop(struct seq_file *m, void *v)
1335 {
1336 }
1337
1338 const struct seq_operations cpuinfo_op = {
1339         .start = c_start,
1340         .next = c_next,
1341         .stop = c_stop,
1342         .show = show_cpuinfo,
1343 };
1344
1345 void __init cmdline_init(const char *r0)
1346 {
1347         if (r0)
1348                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1349 }