Remove multiple KERN_ prefixes from printk formats
[linux-2.6.git] / arch / blackfin / kernel / setup.c
1 /*
2  * arch/blackfin/kernel/setup.c
3  *
4  * Copyright 2004-2006 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #include <linux/delay.h>
12 #include <linux/console.h>
13 #include <linux/bootmem.h>
14 #include <linux/seq_file.h>
15 #include <linux/cpu.h>
16 #include <linux/mm.h>
17 #include <linux/module.h>
18 #include <linux/tty.h>
19 #include <linux/pfn.h>
20
21 #ifdef CONFIG_MTD_UCLINUX
22 #include <linux/mtd/map.h>
23 #include <linux/ext2_fs.h>
24 #include <linux/cramfs_fs.h>
25 #include <linux/romfs_fs.h>
26 #endif
27
28 #include <asm/cplb.h>
29 #include <asm/cacheflush.h>
30 #include <asm/blackfin.h>
31 #include <asm/cplbinit.h>
32 #include <asm/div64.h>
33 #include <asm/cpu.h>
34 #include <asm/fixed_code.h>
35 #include <asm/early_printk.h>
36
37 u16 _bfin_swrst;
38 EXPORT_SYMBOL(_bfin_swrst);
39
40 unsigned long memory_start, memory_end, physical_mem_end;
41 unsigned long _rambase, _ramstart, _ramend;
42 unsigned long reserved_mem_dcache_on;
43 unsigned long reserved_mem_icache_on;
44 EXPORT_SYMBOL(memory_start);
45 EXPORT_SYMBOL(memory_end);
46 EXPORT_SYMBOL(physical_mem_end);
47 EXPORT_SYMBOL(_ramend);
48 EXPORT_SYMBOL(reserved_mem_dcache_on);
49
50 #ifdef CONFIG_MTD_UCLINUX
51 extern struct map_info uclinux_ram_map;
52 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
53 unsigned long _ebss;
54 EXPORT_SYMBOL(memory_mtd_end);
55 EXPORT_SYMBOL(memory_mtd_start);
56 EXPORT_SYMBOL(mtd_size);
57 #endif
58
59 char __initdata command_line[COMMAND_LINE_SIZE];
60 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
61         *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
62
63 /* boot memmap, for parsing "memmap=" */
64 #define BFIN_MEMMAP_MAX         128 /* number of entries in bfin_memmap */
65 #define BFIN_MEMMAP_RAM         1
66 #define BFIN_MEMMAP_RESERVED    2
67 static struct bfin_memmap {
68         int nr_map;
69         struct bfin_memmap_entry {
70                 unsigned long long addr; /* start of memory segment */
71                 unsigned long long size;
72                 unsigned long type;
73         } map[BFIN_MEMMAP_MAX];
74 } bfin_memmap __initdata;
75
76 /* for memmap sanitization */
77 struct change_member {
78         struct bfin_memmap_entry *pentry; /* pointer to original entry */
79         unsigned long long addr; /* address for this change point */
80 };
81 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
82 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
83 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
84 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
85
86 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
87
88 static int early_init_clkin_hz(char *buf);
89
90 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
91 void __init generate_cplb_tables(void)
92 {
93         unsigned int cpu;
94
95         generate_cplb_tables_all();
96         /* Generate per-CPU I&D CPLB tables */
97         for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
98                 generate_cplb_tables_cpu(cpu);
99 }
100 #endif
101
102 void __cpuinit bfin_setup_caches(unsigned int cpu)
103 {
104 #ifdef CONFIG_BFIN_ICACHE
105         bfin_icache_init(icplb_tbl[cpu]);
106 #endif
107
108 #ifdef CONFIG_BFIN_DCACHE
109         bfin_dcache_init(dcplb_tbl[cpu]);
110 #endif
111
112         /*
113          * In cache coherence emulation mode, we need to have the
114          * D-cache enabled before running any atomic operation which
115          * might invove cache invalidation (i.e. spinlock, rwlock).
116          * So printk's are deferred until then.
117          */
118 #ifdef CONFIG_BFIN_ICACHE
119         printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
120         printk(KERN_INFO "  External memory:"
121 # ifdef CONFIG_BFIN_EXTMEM_ICACHEABLE
122                " cacheable"
123 # else
124                " uncacheable"
125 # endif
126                " in instruction cache\n");
127         if (L2_LENGTH)
128                 printk(KERN_INFO "  L2 SRAM        :"
129 # ifdef CONFIG_BFIN_L2_ICACHEABLE
130                        " cacheable"
131 # else
132                        " uncacheable"
133 # endif
134                        " in instruction cache\n");
135
136 #else
137         printk(KERN_INFO "Instruction Cache Disabled for CPU%u\n", cpu);
138 #endif
139
140 #ifdef CONFIG_BFIN_DCACHE
141         printk(KERN_INFO "Data Cache Enabled for CPU%u\n", cpu);
142         printk(KERN_INFO "  External memory:"
143 # if defined CONFIG_BFIN_EXTMEM_WRITEBACK
144                " cacheable (write-back)"
145 # elif defined CONFIG_BFIN_EXTMEM_WRITETHROUGH
146                " cacheable (write-through)"
147 # else
148                " uncacheable"
149 # endif
150                " in data cache\n");
151         if (L2_LENGTH)
152                 printk(KERN_INFO "  L2 SRAM        :"
153 # if defined CONFIG_BFIN_L2_WRITEBACK
154                        " cacheable (write-back)"
155 # elif defined CONFIG_BFIN_L2_WRITETHROUGH
156                        " cacheable (write-through)"
157 # else
158                        " uncacheable"
159 # endif
160                        " in data cache\n");
161 #else
162         printk(KERN_INFO "Data Cache Disabled for CPU%u\n", cpu);
163 #endif
164 }
165
166 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
167 {
168         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
169
170         cpudata->idle = current;
171         cpudata->loops_per_jiffy = loops_per_jiffy;
172         cpudata->imemctl = bfin_read_IMEM_CONTROL();
173         cpudata->dmemctl = bfin_read_DMEM_CONTROL();
174 }
175
176 void __init bfin_cache_init(void)
177 {
178 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
179         generate_cplb_tables();
180 #endif
181         bfin_setup_caches(0);
182 }
183
184 void __init bfin_relocate_l1_mem(void)
185 {
186         unsigned long l1_code_length;
187         unsigned long l1_data_a_length;
188         unsigned long l1_data_b_length;
189         unsigned long l2_length;
190
191         /*
192          * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S
193          * we know that everything about l1 text/data is nice and aligned,
194          * so copy by 4 byte chunks, and don't worry about overlapping
195          * src/dest.
196          *
197          * We can't use the dma_memcpy functions, since they can call
198          * scheduler functions which might be in L1 :( and core writes
199          * into L1 instruction cause bad access errors, so we are stuck,
200          * we are required to use DMA, but can't use the common dma
201          * functions. We can't use memcpy either - since that might be
202          * going to be in the relocated L1
203          */
204
205         blackfin_dma_early_init();
206
207         /* if necessary, copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
208         l1_code_length = _etext_l1 - _stext_l1;
209         if (l1_code_length)
210                 early_dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
211
212         /* if necessary, copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
213         l1_data_a_length = _sbss_l1 - _sdata_l1;
214         if (l1_data_a_length)
215                 early_dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
216
217         /* if necessary, copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
218         l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
219         if (l1_data_b_length)
220                 early_dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
221                         l1_data_a_length, l1_data_b_length);
222
223         early_dma_memcpy_done();
224
225         /* if necessary, copy _stext_l2 to _edata_l2 to L2 SRAM */
226         if (L2_LENGTH != 0) {
227                 l2_length = _sbss_l2 - _stext_l2;
228                 if (l2_length)
229                         memcpy(_stext_l2, _l2_lma_start, l2_length);
230         }
231 }
232
233 /* add_memory_region to memmap */
234 static void __init add_memory_region(unsigned long long start,
235                               unsigned long long size, int type)
236 {
237         int i;
238
239         i = bfin_memmap.nr_map;
240
241         if (i == BFIN_MEMMAP_MAX) {
242                 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
243                 return;
244         }
245
246         bfin_memmap.map[i].addr = start;
247         bfin_memmap.map[i].size = size;
248         bfin_memmap.map[i].type = type;
249         bfin_memmap.nr_map++;
250 }
251
252 /*
253  * Sanitize the boot memmap, removing overlaps.
254  */
255 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
256 {
257         struct change_member *change_tmp;
258         unsigned long current_type, last_type;
259         unsigned long long last_addr;
260         int chgidx, still_changing;
261         int overlap_entries;
262         int new_entry;
263         int old_nr, new_nr, chg_nr;
264         int i;
265
266         /*
267                 Visually we're performing the following (1,2,3,4 = memory types)
268
269                 Sample memory map (w/overlaps):
270                    ____22__________________
271                    ______________________4_
272                    ____1111________________
273                    _44_____________________
274                    11111111________________
275                    ____________________33__
276                    ___________44___________
277                    __________33333_________
278                    ______________22________
279                    ___________________2222_
280                    _________111111111______
281                    _____________________11_
282                    _________________4______
283
284                 Sanitized equivalent (no overlap):
285                    1_______________________
286                    _44_____________________
287                    ___1____________________
288                    ____22__________________
289                    ______11________________
290                    _________1______________
291                    __________3_____________
292                    ___________44___________
293                    _____________33_________
294                    _______________2________
295                    ________________1_______
296                    _________________4______
297                    ___________________2____
298                    ____________________33__
299                    ______________________4_
300         */
301         /* if there's only one memory region, don't bother */
302         if (*pnr_map < 2)
303                 return -1;
304
305         old_nr = *pnr_map;
306
307         /* bail out if we find any unreasonable addresses in memmap */
308         for (i = 0; i < old_nr; i++)
309                 if (map[i].addr + map[i].size < map[i].addr)
310                         return -1;
311
312         /* create pointers for initial change-point information (for sorting) */
313         for (i = 0; i < 2*old_nr; i++)
314                 change_point[i] = &change_point_list[i];
315
316         /* record all known change-points (starting and ending addresses),
317            omitting those that are for empty memory regions */
318         chgidx = 0;
319         for (i = 0; i < old_nr; i++) {
320                 if (map[i].size != 0) {
321                         change_point[chgidx]->addr = map[i].addr;
322                         change_point[chgidx++]->pentry = &map[i];
323                         change_point[chgidx]->addr = map[i].addr + map[i].size;
324                         change_point[chgidx++]->pentry = &map[i];
325                 }
326         }
327         chg_nr = chgidx;        /* true number of change-points */
328
329         /* sort change-point list by memory addresses (low -> high) */
330         still_changing = 1;
331         while (still_changing) {
332                 still_changing = 0;
333                 for (i = 1; i < chg_nr; i++) {
334                         /* if <current_addr> > <last_addr>, swap */
335                         /* or, if current=<start_addr> & last=<end_addr>, swap */
336                         if ((change_point[i]->addr < change_point[i-1]->addr) ||
337                                 ((change_point[i]->addr == change_point[i-1]->addr) &&
338                                  (change_point[i]->addr == change_point[i]->pentry->addr) &&
339                                  (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
340                            ) {
341                                 change_tmp = change_point[i];
342                                 change_point[i] = change_point[i-1];
343                                 change_point[i-1] = change_tmp;
344                                 still_changing = 1;
345                         }
346                 }
347         }
348
349         /* create a new memmap, removing overlaps */
350         overlap_entries = 0;    /* number of entries in the overlap table */
351         new_entry = 0;          /* index for creating new memmap entries */
352         last_type = 0;          /* start with undefined memory type */
353         last_addr = 0;          /* start with 0 as last starting address */
354         /* loop through change-points, determining affect on the new memmap */
355         for (chgidx = 0; chgidx < chg_nr; chgidx++) {
356                 /* keep track of all overlapping memmap entries */
357                 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
358                         /* add map entry to overlap list (> 1 entry implies an overlap) */
359                         overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
360                 } else {
361                         /* remove entry from list (order independent, so swap with last) */
362                         for (i = 0; i < overlap_entries; i++) {
363                                 if (overlap_list[i] == change_point[chgidx]->pentry)
364                                         overlap_list[i] = overlap_list[overlap_entries-1];
365                         }
366                         overlap_entries--;
367                 }
368                 /* if there are overlapping entries, decide which "type" to use */
369                 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
370                 current_type = 0;
371                 for (i = 0; i < overlap_entries; i++)
372                         if (overlap_list[i]->type > current_type)
373                                 current_type = overlap_list[i]->type;
374                 /* continue building up new memmap based on this information */
375                 if (current_type != last_type) {
376                         if (last_type != 0) {
377                                 new_map[new_entry].size =
378                                         change_point[chgidx]->addr - last_addr;
379                                 /* move forward only if the new size was non-zero */
380                                 if (new_map[new_entry].size != 0)
381                                         if (++new_entry >= BFIN_MEMMAP_MAX)
382                                                 break;  /* no more space left for new entries */
383                         }
384                         if (current_type != 0) {
385                                 new_map[new_entry].addr = change_point[chgidx]->addr;
386                                 new_map[new_entry].type = current_type;
387                                 last_addr = change_point[chgidx]->addr;
388                         }
389                         last_type = current_type;
390                 }
391         }
392         new_nr = new_entry;     /* retain count for new entries */
393
394         /* copy new mapping into original location */
395         memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
396         *pnr_map = new_nr;
397
398         return 0;
399 }
400
401 static void __init print_memory_map(char *who)
402 {
403         int i;
404
405         for (i = 0; i < bfin_memmap.nr_map; i++) {
406                 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
407                         bfin_memmap.map[i].addr,
408                         bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
409                 switch (bfin_memmap.map[i].type) {
410                 case BFIN_MEMMAP_RAM:
411                         printk(KERN_CONT "(usable)\n");
412                         break;
413                 case BFIN_MEMMAP_RESERVED:
414                         printk(KERN_CONT "(reserved)\n");
415                         break;
416                 default:
417                         printk(KERN_CONT "type %lu\n", bfin_memmap.map[i].type);
418                         break;
419                 }
420         }
421 }
422
423 static __init int parse_memmap(char *arg)
424 {
425         unsigned long long start_at, mem_size;
426
427         if (!arg)
428                 return -EINVAL;
429
430         mem_size = memparse(arg, &arg);
431         if (*arg == '@') {
432                 start_at = memparse(arg+1, &arg);
433                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
434         } else if (*arg == '$') {
435                 start_at = memparse(arg+1, &arg);
436                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
437         }
438
439         return 0;
440 }
441
442 /*
443  * Initial parsing of the command line.  Currently, we support:
444  *  - Controlling the linux memory size: mem=xxx[KMG]
445  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
446  *       $ -> reserved memory is dcacheable
447  *       # -> reserved memory is icacheable
448  *  - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
449  *       @ from <start> to <start>+<mem>, type RAM
450  *       $ from <start> to <start>+<mem>, type RESERVED
451  */
452 static __init void parse_cmdline_early(char *cmdline_p)
453 {
454         char c = ' ', *to = cmdline_p;
455         unsigned int memsize;
456         for (;;) {
457                 if (c == ' ') {
458                         if (!memcmp(to, "mem=", 4)) {
459                                 to += 4;
460                                 memsize = memparse(to, &to);
461                                 if (memsize)
462                                         _ramend = memsize;
463
464                         } else if (!memcmp(to, "max_mem=", 8)) {
465                                 to += 8;
466                                 memsize = memparse(to, &to);
467                                 if (memsize) {
468                                         physical_mem_end = memsize;
469                                         if (*to != ' ') {
470                                                 if (*to == '$'
471                                                     || *(to + 1) == '$')
472                                                         reserved_mem_dcache_on = 1;
473                                                 if (*to == '#'
474                                                     || *(to + 1) == '#')
475                                                         reserved_mem_icache_on = 1;
476                                         }
477                                 }
478                         } else if (!memcmp(to, "clkin_hz=", 9)) {
479                                 to += 9;
480                                 early_init_clkin_hz(to);
481 #ifdef CONFIG_EARLY_PRINTK
482                         } else if (!memcmp(to, "earlyprintk=", 12)) {
483                                 to += 12;
484                                 setup_early_printk(to);
485 #endif
486                         } else if (!memcmp(to, "memmap=", 7)) {
487                                 to += 7;
488                                 parse_memmap(to);
489                         }
490                 }
491                 c = *(to++);
492                 if (!c)
493                         break;
494         }
495 }
496
497 /*
498  * Setup memory defaults from user config.
499  * The physical memory layout looks like:
500  *
501  *  [_rambase, _ramstart]:              kernel image
502  *  [memory_start, memory_end]:         dynamic memory managed by kernel
503  *  [memory_end, _ramend]:              reserved memory
504  *      [memory_mtd_start(memory_end),
505  *              memory_mtd_start + mtd_size]:   rootfs (if any)
506  *      [_ramend - DMA_UNCACHED_REGION,
507  *              _ramend]:                       uncached DMA region
508  *  [_ramend, physical_mem_end]:        memory not managed by kernel
509  */
510 static __init void memory_setup(void)
511 {
512 #ifdef CONFIG_MTD_UCLINUX
513         unsigned long mtd_phys = 0;
514 #endif
515
516         _rambase = (unsigned long)_stext;
517         _ramstart = (unsigned long)_end;
518
519         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
520                 console_init();
521                 panic("DMA region exceeds memory limit: %lu.",
522                         _ramend - _ramstart);
523         }
524         memory_end = _ramend - DMA_UNCACHED_REGION;
525
526 #ifdef CONFIG_MPU
527         /* Round up to multiple of 4MB */
528         memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
529 #else
530         memory_start = PAGE_ALIGN(_ramstart);
531 #endif
532
533 #if defined(CONFIG_MTD_UCLINUX)
534         /* generic memory mapped MTD driver */
535         memory_mtd_end = memory_end;
536
537         mtd_phys = _ramstart;
538         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
539
540 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
541         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
542                 mtd_size =
543                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
544 # endif
545
546 # if defined(CONFIG_CRAMFS)
547         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
548                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
549 # endif
550
551 # if defined(CONFIG_ROMFS_FS)
552         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
553             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
554                 mtd_size =
555                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
556 #  if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
557         /* Due to a Hardware Anomaly we need to limit the size of usable
558          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
559          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
560          */
561 #   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
562         if (memory_end >= 56 * 1024 * 1024)
563                 memory_end = 56 * 1024 * 1024;
564 #   else
565         if (memory_end >= 60 * 1024 * 1024)
566                 memory_end = 60 * 1024 * 1024;
567 #   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
568 #  endif                                /* ANOMALY_05000263 */
569 # endif                         /* CONFIG_ROMFS_FS */
570
571         memory_end -= mtd_size;
572
573         if (mtd_size == 0) {
574                 console_init();
575                 panic("Don't boot kernel without rootfs attached.");
576         }
577
578         /* Relocate MTD image to the top of memory after the uncached memory area */
579         uclinux_ram_map.phys = memory_mtd_start = memory_end;
580         uclinux_ram_map.size = mtd_size;
581         dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
582 #endif                          /* CONFIG_MTD_UCLINUX */
583
584 #if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
585         /* Due to a Hardware Anomaly we need to limit the size of usable
586          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
587          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
588          */
589 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
590         if (memory_end >= 56 * 1024 * 1024)
591                 memory_end = 56 * 1024 * 1024;
592 #else
593         if (memory_end >= 60 * 1024 * 1024)
594                 memory_end = 60 * 1024 * 1024;
595 #endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
596         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
597 #endif                          /* ANOMALY_05000263 */
598
599 #ifdef CONFIG_MPU
600         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
601         page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
602 #endif
603
604 #if !defined(CONFIG_MTD_UCLINUX)
605         /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
606         memory_end -= SIZE_4K;
607 #endif
608
609         init_mm.start_code = (unsigned long)_stext;
610         init_mm.end_code = (unsigned long)_etext;
611         init_mm.end_data = (unsigned long)_edata;
612         init_mm.brk = (unsigned long)0;
613
614         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
615         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
616
617         printk(KERN_INFO "Memory map:\n"
618                "  fixedcode = 0x%p-0x%p\n"
619                "  text      = 0x%p-0x%p\n"
620                "  rodata    = 0x%p-0x%p\n"
621                "  bss       = 0x%p-0x%p\n"
622                "  data      = 0x%p-0x%p\n"
623                "    stack   = 0x%p-0x%p\n"
624                "  init      = 0x%p-0x%p\n"
625                "  available = 0x%p-0x%p\n"
626 #ifdef CONFIG_MTD_UCLINUX
627                "  rootfs    = 0x%p-0x%p\n"
628 #endif
629 #if DMA_UNCACHED_REGION > 0
630                "  DMA Zone  = 0x%p-0x%p\n"
631 #endif
632                 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
633                 _stext, _etext,
634                 __start_rodata, __end_rodata,
635                 __bss_start, __bss_stop,
636                 _sdata, _edata,
637                 (void *)&init_thread_union,
638                 (void *)((int)(&init_thread_union) + 0x2000),
639                 __init_begin, __init_end,
640                 (void *)_ramstart, (void *)memory_end
641 #ifdef CONFIG_MTD_UCLINUX
642                 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
643 #endif
644 #if DMA_UNCACHED_REGION > 0
645                 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
646 #endif
647                 );
648 }
649
650 /*
651  * Find the lowest, highest page frame number we have available
652  */
653 void __init find_min_max_pfn(void)
654 {
655         int i;
656
657         max_pfn = 0;
658         min_low_pfn = memory_end;
659
660         for (i = 0; i < bfin_memmap.nr_map; i++) {
661                 unsigned long start, end;
662                 /* RAM? */
663                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
664                         continue;
665                 start = PFN_UP(bfin_memmap.map[i].addr);
666                 end = PFN_DOWN(bfin_memmap.map[i].addr +
667                                 bfin_memmap.map[i].size);
668                 if (start >= end)
669                         continue;
670                 if (end > max_pfn)
671                         max_pfn = end;
672                 if (start < min_low_pfn)
673                         min_low_pfn = start;
674         }
675 }
676
677 static __init void setup_bootmem_allocator(void)
678 {
679         int bootmap_size;
680         int i;
681         unsigned long start_pfn, end_pfn;
682         unsigned long curr_pfn, last_pfn, size;
683
684         /* mark memory between memory_start and memory_end usable */
685         add_memory_region(memory_start,
686                 memory_end - memory_start, BFIN_MEMMAP_RAM);
687         /* sanity check for overlap */
688         sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
689         print_memory_map("boot memmap");
690
691         /* intialize globals in linux/bootmem.h */
692         find_min_max_pfn();
693         /* pfn of the last usable page frame */
694         if (max_pfn > memory_end >> PAGE_SHIFT)
695                 max_pfn = memory_end >> PAGE_SHIFT;
696         /* pfn of last page frame directly mapped by kernel */
697         max_low_pfn = max_pfn;
698         /* pfn of the first usable page frame after kernel image*/
699         if (min_low_pfn < memory_start >> PAGE_SHIFT)
700                 min_low_pfn = memory_start >> PAGE_SHIFT;
701
702         start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
703         end_pfn = memory_end >> PAGE_SHIFT;
704
705         /*
706          * give all the memory to the bootmap allocator, tell it to put the
707          * boot mem_map at the start of memory.
708          */
709         bootmap_size = init_bootmem_node(NODE_DATA(0),
710                         memory_start >> PAGE_SHIFT,     /* map goes here */
711                         start_pfn, end_pfn);
712
713         /* register the memmap regions with the bootmem allocator */
714         for (i = 0; i < bfin_memmap.nr_map; i++) {
715                 /*
716                  * Reserve usable memory
717                  */
718                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
719                         continue;
720                 /*
721                  * We are rounding up the start address of usable memory:
722                  */
723                 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
724                 if (curr_pfn >= end_pfn)
725                         continue;
726                 /*
727                  * ... and at the end of the usable range downwards:
728                  */
729                 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
730                                          bfin_memmap.map[i].size);
731
732                 if (last_pfn > end_pfn)
733                         last_pfn = end_pfn;
734
735                 /*
736                  * .. finally, did all the rounding and playing
737                  * around just make the area go away?
738                  */
739                 if (last_pfn <= curr_pfn)
740                         continue;
741
742                 size = last_pfn - curr_pfn;
743                 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
744         }
745
746         /* reserve memory before memory_start, including bootmap */
747         reserve_bootmem(PAGE_OFFSET,
748                 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
749                 BOOTMEM_DEFAULT);
750 }
751
752 #define EBSZ_TO_MEG(ebsz) \
753 ({ \
754         int meg = 0; \
755         switch (ebsz & 0xf) { \
756                 case 0x1: meg =  16; break; \
757                 case 0x3: meg =  32; break; \
758                 case 0x5: meg =  64; break; \
759                 case 0x7: meg = 128; break; \
760                 case 0x9: meg = 256; break; \
761                 case 0xb: meg = 512; break; \
762         } \
763         meg; \
764 })
765 static inline int __init get_mem_size(void)
766 {
767 #if defined(EBIU_SDBCTL)
768 # if defined(BF561_FAMILY)
769         int ret = 0;
770         u32 sdbctl = bfin_read_EBIU_SDBCTL();
771         ret += EBSZ_TO_MEG(sdbctl >>  0);
772         ret += EBSZ_TO_MEG(sdbctl >>  8);
773         ret += EBSZ_TO_MEG(sdbctl >> 16);
774         ret += EBSZ_TO_MEG(sdbctl >> 24);
775         return ret;
776 # else
777         return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
778 # endif
779 #elif defined(EBIU_DDRCTL1)
780         u32 ddrctl = bfin_read_EBIU_DDRCTL1();
781         int ret = 0;
782         switch (ddrctl & 0xc0000) {
783                 case DEVSZ_64:  ret = 64 / 8;
784                 case DEVSZ_128: ret = 128 / 8;
785                 case DEVSZ_256: ret = 256 / 8;
786                 case DEVSZ_512: ret = 512 / 8;
787         }
788         switch (ddrctl & 0x30000) {
789                 case DEVWD_4:  ret *= 2;
790                 case DEVWD_8:  ret *= 2;
791                 case DEVWD_16: break;
792         }
793         if ((ddrctl & 0xc000) == 0x4000)
794                 ret *= 2;
795         return ret;
796 #endif
797         BUG();
798 }
799
800 void __init setup_arch(char **cmdline_p)
801 {
802         unsigned long sclk, cclk;
803
804         /* Check to make sure we are running on the right processor */
805         if (unlikely(CPUID != bfin_cpuid()))
806                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
807                         CPU, bfin_cpuid(), bfin_revid());
808
809 #ifdef CONFIG_DUMMY_CONSOLE
810         conswitchp = &dummy_con;
811 #endif
812
813 #if defined(CONFIG_CMDLINE_BOOL)
814         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
815         command_line[sizeof(command_line) - 1] = 0;
816 #endif
817
818         /* Keep a copy of command line */
819         *cmdline_p = &command_line[0];
820         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
821         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
822
823         memset(&bfin_memmap, 0, sizeof(bfin_memmap));
824
825         /* If the user does not specify things on the command line, use
826          * what the bootloader set things up as
827          */
828         physical_mem_end = 0;
829         parse_cmdline_early(&command_line[0]);
830
831         if (_ramend == 0)
832                 _ramend = get_mem_size() * 1024 * 1024;
833
834         if (physical_mem_end == 0)
835                 physical_mem_end = _ramend;
836
837         memory_setup();
838
839         /* Initialize Async memory banks */
840         bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
841         bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
842         bfin_write_EBIU_AMGCTL(AMGCTLVAL);
843 #ifdef CONFIG_EBIU_MBSCTLVAL
844         bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
845         bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
846         bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
847 #endif
848
849         cclk = get_cclk();
850         sclk = get_sclk();
851
852         if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk)
853                 panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK");
854
855 #ifdef BF561_FAMILY
856         if (ANOMALY_05000266) {
857                 bfin_read_IMDMA_D0_IRQ_STATUS();
858                 bfin_read_IMDMA_D1_IRQ_STATUS();
859         }
860 #endif
861         printk(KERN_INFO "Hardware Trace ");
862         if (bfin_read_TBUFCTL() & 0x1)
863                 printk(KERN_CONT "Active ");
864         else
865                 printk(KERN_CONT "Off ");
866         if (bfin_read_TBUFCTL() & 0x2)
867                 printk(KERN_CONT "and Enabled\n");
868         else
869                 printk(KERN_CONT "and Disabled\n");
870
871 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
872         /* we need to initialize the Flashrom device here since we might
873          * do things with flash early on in the boot
874          */
875         flash_probe();
876 #endif
877
878         printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
879
880         /* Newer parts mirror SWRST bits in SYSCR */
881 #if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
882     defined(CONFIG_BF538) || defined(CONFIG_BF539)
883         _bfin_swrst = bfin_read_SWRST();
884 #else
885         /* Clear boot mode field */
886         _bfin_swrst = bfin_read_SYSCR() & ~0xf;
887 #endif
888
889 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
890         bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
891 #endif
892 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
893         bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
894 #endif
895
896 #ifdef CONFIG_SMP
897         if (_bfin_swrst & SWRST_DBL_FAULT_A) {
898 #else
899         if (_bfin_swrst & RESET_DOUBLE) {
900 #endif
901                 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
902 #ifdef CONFIG_DEBUG_DOUBLEFAULT
903                 /* We assume the crashing kernel, and the current symbol table match */
904                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
905                         (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
906                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
907                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
908 #endif
909                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
910                         init_retx);
911         } else if (_bfin_swrst & RESET_WDOG)
912                 printk(KERN_INFO "Recovering from Watchdog event\n");
913         else if (_bfin_swrst & RESET_SOFTWARE)
914                 printk(KERN_NOTICE "Reset caused by Software reset\n");
915
916         printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
917         if (bfin_compiled_revid() == 0xffff)
918                 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
919         else if (bfin_compiled_revid() == -1)
920                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
921         else
922                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
923
924         if (likely(CPUID == bfin_cpuid())) {
925                 if (bfin_revid() != bfin_compiled_revid()) {
926                         if (bfin_compiled_revid() == -1)
927                                 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
928                                        bfin_revid());
929                         else if (bfin_compiled_revid() != 0xffff) {
930                                 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
931                                        bfin_compiled_revid(), bfin_revid());
932                                 if (bfin_compiled_revid() > bfin_revid())
933                                         panic("Error: you are missing anomaly workarounds for this rev");
934                         }
935                 }
936                 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
937                         printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
938                                CPU, bfin_revid());
939         }
940
941         /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
942         if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
943                 panic("You can't run on this processor due to 05000448");
944
945         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
946
947         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
948                cclk / 1000000, sclk / 1000000);
949
950         setup_bootmem_allocator();
951
952         paging_init();
953
954         /* Copy atomic sequences to their fixed location, and sanity check that
955            these locations are the ones that we advertise to userspace.  */
956         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
957                FIXED_CODE_END - FIXED_CODE_START);
958         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
959                != SIGRETURN_STUB - FIXED_CODE_START);
960         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
961                != ATOMIC_XCHG32 - FIXED_CODE_START);
962         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
963                != ATOMIC_CAS32 - FIXED_CODE_START);
964         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
965                != ATOMIC_ADD32 - FIXED_CODE_START);
966         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
967                != ATOMIC_SUB32 - FIXED_CODE_START);
968         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
969                != ATOMIC_IOR32 - FIXED_CODE_START);
970         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
971                != ATOMIC_AND32 - FIXED_CODE_START);
972         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
973                != ATOMIC_XOR32 - FIXED_CODE_START);
974         BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
975                 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
976
977 #ifdef CONFIG_SMP
978         platform_init_cpus();
979 #endif
980         init_exception_vectors();
981         bfin_cache_init();      /* Initialize caches for the boot CPU */
982 }
983
984 static int __init topology_init(void)
985 {
986         unsigned int cpu;
987         /* Record CPU-private information for the boot processor. */
988         bfin_setup_cpudata(0);
989
990         for_each_possible_cpu(cpu) {
991                 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
992         }
993
994         return 0;
995 }
996
997 subsys_initcall(topology_init);
998
999 /* Get the input clock frequency */
1000 static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
1001 static u_long get_clkin_hz(void)
1002 {
1003         return cached_clkin_hz;
1004 }
1005 static int __init early_init_clkin_hz(char *buf)
1006 {
1007         cached_clkin_hz = simple_strtoul(buf, NULL, 0);
1008 #ifdef BFIN_KERNEL_CLOCK
1009         if (cached_clkin_hz != CONFIG_CLKIN_HZ)
1010                 panic("cannot change clkin_hz when reprogramming clocks");
1011 #endif
1012         return 1;
1013 }
1014 early_param("clkin_hz=", early_init_clkin_hz);
1015
1016 /* Get the voltage input multiplier */
1017 static u_long get_vco(void)
1018 {
1019         static u_long cached_vco;
1020         u_long msel, pll_ctl;
1021
1022         /* The assumption here is that VCO never changes at runtime.
1023          * If, someday, we support that, then we'll have to change this.
1024          */
1025         if (cached_vco)
1026                 return cached_vco;
1027
1028         pll_ctl = bfin_read_PLL_CTL();
1029         msel = (pll_ctl >> 9) & 0x3F;
1030         if (0 == msel)
1031                 msel = 64;
1032
1033         cached_vco = get_clkin_hz();
1034         cached_vco >>= (1 & pll_ctl);   /* DF bit */
1035         cached_vco *= msel;
1036         return cached_vco;
1037 }
1038
1039 /* Get the Core clock */
1040 u_long get_cclk(void)
1041 {
1042         static u_long cached_cclk_pll_div, cached_cclk;
1043         u_long csel, ssel;
1044
1045         if (bfin_read_PLL_STAT() & 0x1)
1046                 return get_clkin_hz();
1047
1048         ssel = bfin_read_PLL_DIV();
1049         if (ssel == cached_cclk_pll_div)
1050                 return cached_cclk;
1051         else
1052                 cached_cclk_pll_div = ssel;
1053
1054         csel = ((ssel >> 4) & 0x03);
1055         ssel &= 0xf;
1056         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
1057                 cached_cclk = get_vco() / ssel;
1058         else
1059                 cached_cclk = get_vco() >> csel;
1060         return cached_cclk;
1061 }
1062 EXPORT_SYMBOL(get_cclk);
1063
1064 /* Get the System clock */
1065 u_long get_sclk(void)
1066 {
1067         static u_long cached_sclk;
1068         u_long ssel;
1069
1070         /* The assumption here is that SCLK never changes at runtime.
1071          * If, someday, we support that, then we'll have to change this.
1072          */
1073         if (cached_sclk)
1074                 return cached_sclk;
1075
1076         if (bfin_read_PLL_STAT() & 0x1)
1077                 return get_clkin_hz();
1078
1079         ssel = bfin_read_PLL_DIV() & 0xf;
1080         if (0 == ssel) {
1081                 printk(KERN_WARNING "Invalid System Clock\n");
1082                 ssel = 1;
1083         }
1084
1085         cached_sclk = get_vco() / ssel;
1086         return cached_sclk;
1087 }
1088 EXPORT_SYMBOL(get_sclk);
1089
1090 unsigned long sclk_to_usecs(unsigned long sclk)
1091 {
1092         u64 tmp = USEC_PER_SEC * (u64)sclk;
1093         do_div(tmp, get_sclk());
1094         return tmp;
1095 }
1096 EXPORT_SYMBOL(sclk_to_usecs);
1097
1098 unsigned long usecs_to_sclk(unsigned long usecs)
1099 {
1100         u64 tmp = get_sclk() * (u64)usecs;
1101         do_div(tmp, USEC_PER_SEC);
1102         return tmp;
1103 }
1104 EXPORT_SYMBOL(usecs_to_sclk);
1105
1106 /*
1107  *      Get CPU information for use by the procfs.
1108  */
1109 static int show_cpuinfo(struct seq_file *m, void *v)
1110 {
1111         char *cpu, *mmu, *fpu, *vendor, *cache;
1112         uint32_t revid;
1113         int cpu_num = *(unsigned int *)v;
1114         u_long sclk, cclk;
1115         u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1116         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
1117
1118         cpu = CPU;
1119         mmu = "none";
1120         fpu = "none";
1121         revid = bfin_revid();
1122
1123         sclk = get_sclk();
1124         cclk = get_cclk();
1125
1126         switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1127         case 0xca:
1128                 vendor = "Analog Devices";
1129                 break;
1130         default:
1131                 vendor = "unknown";
1132                 break;
1133         }
1134
1135         seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
1136
1137         if (CPUID == bfin_cpuid())
1138                 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1139         else
1140                 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1141                         CPUID, bfin_cpuid());
1142
1143         seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1144                 "stepping\t: %d ",
1145                 cpu, cclk/1000000, sclk/1000000,
1146 #ifdef CONFIG_MPU
1147                 "mpu on",
1148 #else
1149                 "mpu off",
1150 #endif
1151                 revid);
1152
1153         if (bfin_revid() != bfin_compiled_revid()) {
1154                 if (bfin_compiled_revid() == -1)
1155                         seq_printf(m, "(Compiled for Rev none)");
1156                 else if (bfin_compiled_revid() == 0xffff)
1157                         seq_printf(m, "(Compiled for Rev any)");
1158                 else
1159                         seq_printf(m, "(Compiled for Rev %d)", bfin_compiled_revid());
1160         }
1161
1162         seq_printf(m, "\ncpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1163                 cclk/1000000, cclk%1000000,
1164                 sclk/1000000, sclk%1000000);
1165         seq_printf(m, "bogomips\t: %lu.%02lu\n"
1166                 "Calibration\t: %lu loops\n",
1167                 (cpudata->loops_per_jiffy * HZ) / 500000,
1168                 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1169                 (cpudata->loops_per_jiffy * HZ));
1170
1171         /* Check Cache configutation */
1172         switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1173         case ACACHE_BSRAM:
1174                 cache = "dbank-A/B\t: cache/sram";
1175                 dcache_size = 16;
1176                 dsup_banks = 1;
1177                 break;
1178         case ACACHE_BCACHE:
1179                 cache = "dbank-A/B\t: cache/cache";
1180                 dcache_size = 32;
1181                 dsup_banks = 2;
1182                 break;
1183         case ASRAM_BSRAM:
1184                 cache = "dbank-A/B\t: sram/sram";
1185                 dcache_size = 0;
1186                 dsup_banks = 0;
1187                 break;
1188         default:
1189                 cache = "unknown";
1190                 dcache_size = 0;
1191                 dsup_banks = 0;
1192                 break;
1193         }
1194
1195         /* Is it turned on? */
1196         if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1197                 dcache_size = 0;
1198
1199         if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1200                 icache_size = 0;
1201
1202         seq_printf(m, "cache size\t: %d KB(L1 icache) "
1203                 "%d KB(L1 dcache) %d KB(L2 cache)\n",
1204                 icache_size, dcache_size, 0);
1205         seq_printf(m, "%s\n", cache);
1206         seq_printf(m, "external memory\t: "
1207 #if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE)
1208                    "cacheable"
1209 #else
1210                    "uncacheable"
1211 #endif
1212                    " in instruction cache\n");
1213         seq_printf(m, "external memory\t: "
1214 #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK)
1215                       "cacheable (write-back)"
1216 #elif defined(CONFIG_BFIN_EXTMEM_WRITETHROUGH)
1217                       "cacheable (write-through)"
1218 #else
1219                       "uncacheable"
1220 #endif
1221                       " in data cache\n");
1222
1223         if (icache_size)
1224                 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1225                            BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1226         else
1227                 seq_printf(m, "icache setup\t: off\n");
1228
1229         seq_printf(m,
1230                    "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1231                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1232                    BFIN_DLINES);
1233 #ifdef __ARCH_SYNC_CORE_DCACHE
1234         seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
1235 #endif
1236 #ifdef __ARCH_SYNC_CORE_ICACHE
1237         seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count);
1238 #endif
1239 #ifdef CONFIG_BFIN_ICACHE_LOCK
1240         switch ((cpudata->imemctl >> 3) & WAYALL_L) {
1241         case WAY0_L:
1242                 seq_printf(m, "Way0 Locked-Down\n");
1243                 break;
1244         case WAY1_L:
1245                 seq_printf(m, "Way1 Locked-Down\n");
1246                 break;
1247         case WAY01_L:
1248                 seq_printf(m, "Way0,Way1 Locked-Down\n");
1249                 break;
1250         case WAY2_L:
1251                 seq_printf(m, "Way2 Locked-Down\n");
1252                 break;
1253         case WAY02_L:
1254                 seq_printf(m, "Way0,Way2 Locked-Down\n");
1255                 break;
1256         case WAY12_L:
1257                 seq_printf(m, "Way1,Way2 Locked-Down\n");
1258                 break;
1259         case WAY012_L:
1260                 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1261                 break;
1262         case WAY3_L:
1263                 seq_printf(m, "Way3 Locked-Down\n");
1264                 break;
1265         case WAY03_L:
1266                 seq_printf(m, "Way0,Way3 Locked-Down\n");
1267                 break;
1268         case WAY13_L:
1269                 seq_printf(m, "Way1,Way3 Locked-Down\n");
1270                 break;
1271         case WAY013_L:
1272                 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1273                 break;
1274         case WAY32_L:
1275                 seq_printf(m, "Way3,Way2 Locked-Down\n");
1276                 break;
1277         case WAY320_L:
1278                 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1279                 break;
1280         case WAY321_L:
1281                 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1282                 break;
1283         case WAYALL_L:
1284                 seq_printf(m, "All Ways are locked\n");
1285                 break;
1286         default:
1287                 seq_printf(m, "No Ways are locked\n");
1288         }
1289 #endif
1290
1291         if (cpu_num != num_possible_cpus() - 1)
1292                 return 0;
1293
1294         if (L2_LENGTH) {
1295                 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1296                 seq_printf(m, "L2 SRAM\t\t: "
1297 #if defined(CONFIG_BFIN_L2_ICACHEABLE)
1298                               "cacheable"
1299 #else
1300                               "uncacheable"
1301 #endif
1302                               " in instruction cache\n");
1303                 seq_printf(m, "L2 SRAM\t\t: "
1304 #if defined(CONFIG_BFIN_L2_WRITEBACK)
1305                               "cacheable (write-back)"
1306 #elif defined(CONFIG_BFIN_L2_WRITETHROUGH)
1307                               "cacheable (write-through)"
1308 #else
1309                               "uncacheable"
1310 #endif
1311                               " in data cache\n");
1312         }
1313         seq_printf(m, "board name\t: %s\n", bfin_board_name);
1314         seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1315                  physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1316         seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1317                 ((int)memory_end - (int)_stext) >> 10,
1318                 _stext,
1319                 (void *)memory_end);
1320         seq_printf(m, "\n");
1321
1322         return 0;
1323 }
1324
1325 static void *c_start(struct seq_file *m, loff_t *pos)
1326 {
1327         if (*pos == 0)
1328                 *pos = first_cpu(cpu_online_map);
1329         if (*pos >= num_online_cpus())
1330                 return NULL;
1331
1332         return pos;
1333 }
1334
1335 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1336 {
1337         *pos = next_cpu(*pos, cpu_online_map);
1338
1339         return c_start(m, pos);
1340 }
1341
1342 static void c_stop(struct seq_file *m, void *v)
1343 {
1344 }
1345
1346 const struct seq_operations cpuinfo_op = {
1347         .start = c_start,
1348         .next = c_next,
1349         .stop = c_stop,
1350         .show = show_cpuinfo,
1351 };
1352
1353 void __init cmdline_init(const char *r0)
1354 {
1355         if (r0)
1356                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1357 }