[AVR32] Don't enable clocks with no users
[linux-2.6.git] / arch / avr32 / mach-at32ap / time-tc.c
1 /*
2  * Copyright (C) 2004-2007 Atmel Corporation
3  *
4  * Based on MIPS implementation arch/mips/kernel/time.c
5  *   Copyright 2001 MontaVista Software Inc.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/clk.h>
13 #include <linux/clocksource.h>
14 #include <linux/time.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/kernel_stat.h>
19 #include <linux/errno.h>
20 #include <linux/init.h>
21 #include <linux/profile.h>
22 #include <linux/sysdev.h>
23 #include <linux/err.h>
24
25 #include <asm/div64.h>
26 #include <asm/sysreg.h>
27 #include <asm/io.h>
28 #include <asm/sections.h>
29
30 #include <asm/arch/time.h>
31
32 /* how many counter cycles in a jiffy? */
33 static u32 cycles_per_jiffy;
34
35 /* the count value for the next timer interrupt */
36 static u32 expirelo;
37
38 /* the I/O registers of the TC module */
39 static void __iomem *ioregs;
40
41 cycle_t read_cycle_count(void)
42 {
43         return (cycle_t)timer_read(ioregs, 0, CV);
44 }
45
46 struct clocksource clocksource_avr32 = {
47         .name           = "avr32",
48         .rating         = 342,
49         .read           = read_cycle_count,
50         .mask           = CLOCKSOURCE_MASK(16),
51         .shift          = 16,
52         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
53 };
54
55 static void avr32_timer_ack(void)
56 {
57         u16 count = expirelo;
58
59         /* Ack this timer interrupt and set the next one, use a u16
60          * variable so it will wrap around correctly */
61         count += cycles_per_jiffy;
62         expirelo = count;
63         timer_write(ioregs, 0, RC, expirelo);
64
65         /* Check to see if we have missed any timer interrupts */
66         count = timer_read(ioregs, 0, CV);
67         if ((count - expirelo) < 0x7fff) {
68                 expirelo = count + cycles_per_jiffy;
69                 timer_write(ioregs, 0, RC, expirelo);
70         }
71 }
72
73 u32 avr32_hpt_read(void)
74 {
75         return timer_read(ioregs, 0, CV);
76 }
77
78 static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk)
79 {
80         unsigned int cycles_max = (clocksource_avr32.mask + 1) / 2;
81         unsigned int divs[] = { 4, 8, 16, 32 };
82         int divs_size = sizeof(divs) / sizeof(*divs);
83         int i = 0;
84         unsigned long count_hz;
85         unsigned long shift;
86         unsigned long mult;
87         int clock_div = -1;
88         u64 tmp;
89
90         shift = clocksource_avr32.shift;
91
92         do {
93                 count_hz = clk_get_rate(pclk) / divs[i];
94                 mult = clocksource_hz2mult(count_hz, shift);
95                 clocksource_avr32.mult = mult;
96
97                 tmp = TICK_NSEC;
98                 tmp <<= shift;
99                 tmp += mult / 2;
100                 do_div(tmp, mult);
101
102                 cycles_per_jiffy = tmp;
103         } while (cycles_per_jiffy > cycles_max && ++i < divs_size);
104
105         clock_div = i + 1;
106
107         if (clock_div > divs_size) {
108                 pr_debug("timer: could not calculate clock divider\n");
109                 return -EFAULT;
110         }
111
112         /* Set the clock divider */
113         timer_write(ioregs, 0, CMR, TIMER_BF(CMR_TCCLKS, clock_div));
114
115         return 0;
116 }
117
118 int avr32_hpt_init(unsigned int count)
119 {
120         struct resource *regs;
121         struct clk *pclk;
122         int irq = -1;
123         int ret = 0;
124
125         ret = -ENXIO;
126
127         irq = platform_get_irq(&at32_systc0_device, 0);
128         if (irq < 0) {
129                 pr_debug("timer: could not get irq\n");
130                 goto out_error;
131         }
132
133         pclk = clk_get(&at32_systc0_device.dev, "pclk");
134         if (IS_ERR(pclk)) {
135                 pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk));
136                 goto out_error;
137         }
138         clk_enable(pclk);
139
140         regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0);
141         if (!regs) {
142                 pr_debug("timer: could not get resource\n");
143                 goto out_error_clk;
144         }
145
146         ioregs = ioremap(regs->start, regs->end - regs->start + 1);
147         if (!ioregs) {
148                 pr_debug("timer: could not get ioregs\n");
149                 goto out_error_clk;
150         }
151
152         ret = avr32_timer_calc_div_and_set_jiffies(pclk);
153         if (ret)
154                 goto out_error_io;
155
156         ret = setup_irq(irq, &timer_irqaction);
157         if (ret) {
158                 pr_debug("timer: could not request irq %d: %d\n",
159                                 irq, ret);
160                 goto out_error_io;
161         }
162
163         expirelo = (timer_read(ioregs, 0, CV) / cycles_per_jiffy + 1)
164                 * cycles_per_jiffy;
165
166         /* Enable clock and interrupts on RC compare */
167         timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_CLKEN));
168         timer_write(ioregs, 0, IER, TIMER_BIT(IER_CPCS));
169         /* Set cycles to first interrupt */
170         timer_write(ioregs, 0,  RC, expirelo);
171
172         printk(KERN_INFO "timer: AT32AP system timer/counter at 0x%p irq %d\n",
173                         ioregs, irq);
174
175         return 0;
176
177 out_error_io:
178         iounmap(ioregs);
179 out_error_clk:
180         clk_put(pclk);
181 out_error:
182         return ret;
183 }
184
185 int avr32_hpt_start(void)
186 {
187         timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_SWTRG));
188         return 0;
189 }
190
191 irqreturn_t timer_interrupt(int irq, void *dev_id)
192 {
193         unsigned int sr = timer_read(ioregs, 0, SR);
194
195         if (sr & TIMER_BIT(SR_CPCS)) {
196                 /* ack timer interrupt and try to set next interrupt */
197                 avr32_timer_ack();
198
199                 /*
200                  * Call the generic timer interrupt handler
201                  */
202                 write_seqlock(&xtime_lock);
203                 do_timer(1);
204                 write_sequnlock(&xtime_lock);
205
206                 /*
207                  * In UP mode, we call local_timer_interrupt() to do profiling
208                  * and process accounting.
209                  *
210                  * SMP is not supported yet.
211                  */
212                 local_timer_interrupt(irq, dev_id);
213
214                 return IRQ_HANDLED;
215         }
216
217         return IRQ_NONE;
218 }