atstk1000: fix build breakage with BOARD_ATSTK100X_SW2_CUSTOM=y
[linux-2.6.git] / arch / avr32 / boards / atstk1000 / atstk1002.c
1 /*
2  * ATSTK1002/ATSTK1006 daughterboard-specific init code
3  *
4  * Copyright (C) 2005-2007 Atmel Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/clk.h>
11 #include <linux/etherdevice.h>
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/platform_device.h>
15 #include <linux/string.h>
16 #include <linux/types.h>
17 #include <linux/spi/spi.h>
18 #include <linux/spi/at73c213.h>
19
20 #include <video/atmel_lcdc.h>
21
22 #include <asm/io.h>
23 #include <asm/setup.h>
24 #include <asm/atmel-mci.h>
25
26 #include <mach/at32ap700x.h>
27 #include <mach/board.h>
28 #include <mach/init.h>
29 #include <mach/portmux.h>
30
31 #include "atstk1000.h"
32
33 /* Oscillator frequencies. These are board specific */
34 unsigned long at32_board_osc_rates[3] = {
35         [0] = 32768,    /* 32.768 kHz on RTC osc */
36         [1] = 20000000, /* 20 MHz on osc0 */
37         [2] = 12000000, /* 12 MHz on osc1 */
38 };
39
40 /*
41  * The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both
42  * have the AT32AP7000 chip on board; the difference is that the
43  * STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on
44  * the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has
45  * none.)
46  *
47  * The RAM difference is handled by the boot loader, so the only
48  * difference we end up handling here is the NAND flash.
49  */
50 #ifdef CONFIG_BOARD_ATSTK1006
51 #include <linux/mtd/partitions.h>
52 #include <mach/smc.h>
53
54 static struct smc_timing nand_timing __initdata = {
55         .ncs_read_setup         = 0,
56         .nrd_setup              = 10,
57         .ncs_write_setup        = 0,
58         .nwe_setup              = 10,
59
60         .ncs_read_pulse         = 30,
61         .nrd_pulse              = 15,
62         .ncs_write_pulse        = 30,
63         .nwe_pulse              = 15,
64
65         .read_cycle             = 30,
66         .write_cycle            = 30,
67
68         .ncs_read_recover       = 0,
69         .nrd_recover            = 15,
70         .ncs_write_recover      = 0,
71         /* WE# high -> RE# low min 60 ns */
72         .nwe_recover            = 50,
73 };
74
75 static struct smc_config nand_config __initdata = {
76         .bus_width              = 1,
77         .nrd_controlled         = 1,
78         .nwe_controlled         = 1,
79         .nwait_mode             = 0,
80         .byte_write             = 0,
81         .tdf_cycles             = 2,
82         .tdf_mode               = 0,
83 };
84
85 static struct mtd_partition nand_partitions[] = {
86         {
87                 .name           = "main",
88                 .offset         = 0x00000000,
89                 .size           = MTDPART_SIZ_FULL,
90         },
91 };
92
93 static struct mtd_partition *nand_part_info(int size, int *num_partitions)
94 {
95         *num_partitions = ARRAY_SIZE(nand_partitions);
96         return nand_partitions;
97 }
98
99 static struct atmel_nand_data atstk1006_nand_data __initdata = {
100         .cle            = 21,
101         .ale            = 22,
102         .rdy_pin        = GPIO_PIN_PB(30),
103         .enable_pin     = GPIO_PIN_PB(29),
104         .partition_info = nand_part_info,
105 };
106 #endif
107
108 struct eth_addr {
109         u8 addr[6];
110 };
111
112 static struct eth_addr __initdata hw_addr[2];
113 static struct eth_platform_data __initdata eth_data[2] = {
114         {
115                 /*
116                  * The MDIO pullups on STK1000 are a bit too weak for
117                  * the autodetection to work properly, so we have to
118                  * mask out everything but the correct address.
119                  */
120                 .phy_mask       = ~(1U << 16),
121         },
122         {
123                 .phy_mask       = ~(1U << 17),
124         },
125 };
126
127 #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
128 static struct at73c213_board_info at73c213_data = {
129         .ssc_id         = 0,
130         .shortname      = "AVR32 STK1000 external DAC",
131 };
132 #endif
133
134 #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
135 static struct spi_board_info spi0_board_info[] __initdata = {
136 #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
137         {
138                 /* AT73C213 */
139                 .modalias       = "at73c213",
140                 .max_speed_hz   = 200000,
141                 .chip_select    = 0,
142                 .mode           = SPI_MODE_1,
143                 .platform_data  = &at73c213_data,
144         },
145 #endif
146         {
147                 /* QVGA display */
148                 .modalias       = "ltv350qv",
149                 .max_speed_hz   = 16000000,
150                 .chip_select    = 1,
151                 .mode           = SPI_MODE_3,
152         },
153 };
154 #endif
155
156 #ifdef CONFIG_BOARD_ATSTK100X_SPI1
157 static struct spi_board_info spi1_board_info[] __initdata = { {
158         /* patch in custom entries here */
159 } };
160 #endif
161
162 /*
163  * The next two functions should go away as the boot loader is
164  * supposed to initialize the macb address registers with a valid
165  * ethernet address. But we need to keep it around for a while until
166  * we can be reasonably sure the boot loader does this.
167  *
168  * The phy_id is ignored as the driver will probe for it.
169  */
170 static int __init parse_tag_ethernet(struct tag *tag)
171 {
172         int i;
173
174         i = tag->u.ethernet.mac_index;
175         if (i < ARRAY_SIZE(hw_addr))
176                 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
177                        sizeof(hw_addr[i].addr));
178
179         return 0;
180 }
181 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
182
183 static void __init set_hw_addr(struct platform_device *pdev)
184 {
185         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
186         const u8 *addr;
187         void __iomem *regs;
188         struct clk *pclk;
189
190         if (!res)
191                 return;
192         if (pdev->id >= ARRAY_SIZE(hw_addr))
193                 return;
194
195         addr = hw_addr[pdev->id].addr;
196         if (!is_valid_ether_addr(addr))
197                 return;
198
199         /*
200          * Since this is board-specific code, we'll cheat and use the
201          * physical address directly as we happen to know that it's
202          * the same as the virtual address.
203          */
204         regs = (void __iomem __force *)res->start;
205         pclk = clk_get(&pdev->dev, "pclk");
206         if (!pclk)
207                 return;
208
209         clk_enable(pclk);
210         __raw_writel((addr[3] << 24) | (addr[2] << 16)
211                      | (addr[1] << 8) | addr[0], regs + 0x98);
212         __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
213         clk_disable(pclk);
214         clk_put(pclk);
215 }
216
217 #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
218 static void __init atstk1002_setup_extdac(void)
219 {
220         struct clk *gclk;
221         struct clk *pll;
222
223         gclk = clk_get(NULL, "gclk0");
224         if (IS_ERR(gclk))
225                 goto err_gclk;
226         pll = clk_get(NULL, "pll0");
227         if (IS_ERR(pll))
228                 goto err_pll;
229
230         if (clk_set_parent(gclk, pll)) {
231                 pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
232                 goto err_set_clk;
233         }
234
235         at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
236         at73c213_data.dac_clk = gclk;
237
238 err_set_clk:
239         clk_put(pll);
240 err_pll:
241         clk_put(gclk);
242 err_gclk:
243         return;
244 }
245 #else
246 static void __init atstk1002_setup_extdac(void)
247 {
248
249 }
250 #endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
251
252 void __init setup_board(void)
253 {
254 #ifdef  CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
255         at32_map_usart(0, 1);   /* USART 0/B: /dev/ttyS1, IRDA */
256 #else
257         at32_map_usart(1, 0);   /* USART 1/A: /dev/ttyS0, DB9 */
258 #endif
259         /* USART 2/unused: expansion connector */
260         at32_map_usart(3, 2);   /* USART 3/C: /dev/ttyS2, DB9 */
261
262         at32_setup_serial_console(0);
263 }
264
265 #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
266
267 /* MMC card detect requires MACB0 *NOT* be used */
268 #ifdef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
269 static struct mci_platform_data __initdata mci0_data = {
270         .detect_pin     = GPIO_PIN_PC(14),      /* gpio30/sdcd */
271         .wp_pin         = GPIO_PIN_PC(15),      /* gpio31/sdwp */
272 };
273 #define MCI_PDATA       &mci0_data
274 #else
275 #define MCI_PDATA       NULL
276 #endif  /* SW6 for sd{cd,wp} routing */
277
278 #endif  /* SW2 for MMC signal routing */
279
280 static int __init atstk1002_init(void)
281 {
282         /*
283          * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
284          * SDRAM-specific pins so that nobody messes with them.
285          */
286         at32_reserve_pin(GPIO_PIN_PE(0));       /* DATA[16]     */
287         at32_reserve_pin(GPIO_PIN_PE(1));       /* DATA[17]     */
288         at32_reserve_pin(GPIO_PIN_PE(2));       /* DATA[18]     */
289         at32_reserve_pin(GPIO_PIN_PE(3));       /* DATA[19]     */
290         at32_reserve_pin(GPIO_PIN_PE(4));       /* DATA[20]     */
291         at32_reserve_pin(GPIO_PIN_PE(5));       /* DATA[21]     */
292         at32_reserve_pin(GPIO_PIN_PE(6));       /* DATA[22]     */
293         at32_reserve_pin(GPIO_PIN_PE(7));       /* DATA[23]     */
294         at32_reserve_pin(GPIO_PIN_PE(8));       /* DATA[24]     */
295         at32_reserve_pin(GPIO_PIN_PE(9));       /* DATA[25]     */
296         at32_reserve_pin(GPIO_PIN_PE(10));      /* DATA[26]     */
297         at32_reserve_pin(GPIO_PIN_PE(11));      /* DATA[27]     */
298         at32_reserve_pin(GPIO_PIN_PE(12));      /* DATA[28]     */
299         at32_reserve_pin(GPIO_PIN_PE(13));      /* DATA[29]     */
300         at32_reserve_pin(GPIO_PIN_PE(14));      /* DATA[30]     */
301         at32_reserve_pin(GPIO_PIN_PE(15));      /* DATA[31]     */
302         at32_reserve_pin(GPIO_PIN_PE(26));      /* SDCS         */
303
304         at32_add_system_devices();
305
306 #ifdef CONFIG_BOARD_ATSTK1006
307         smc_set_timing(&nand_config, &nand_timing);
308         smc_set_configuration(3, &nand_config);
309         at32_add_device_nand(0, &atstk1006_nand_data);
310 #endif
311
312 #ifdef  CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
313         at32_add_device_usart(1);
314 #else
315         at32_add_device_usart(0);
316 #endif
317         at32_add_device_usart(2);
318
319 #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
320         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
321 #endif
322 #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
323         at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
324 #endif
325 #ifdef CONFIG_BOARD_ATSTK100X_SPI1
326         at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
327 #endif
328 #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
329         at32_add_device_mci(0, MCI_PDATA);
330 #endif
331 #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
332         set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
333 #else
334         at32_add_device_lcdc(0, &atstk1000_lcdc_data,
335                              fbmem_start, fbmem_size, 0);
336 #endif
337         at32_add_device_usba(0, NULL);
338 #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
339         at32_add_device_ssc(0, ATMEL_SSC_TX);
340 #endif
341
342         atstk1000_setup_j2_leds();
343         atstk1002_setup_extdac();
344
345         return 0;
346 }
347 postcore_initcall(atstk1002_init);