aa70e435fa79ada0fbc46b9e801174d3d5abb8e5
[linux-2.6.git] / arch / arm / plat-omap / i2c.c
1 /*
2  * linux/arch/arm/plat-omap/i2c.c
3  *
4  * Helper module for board specific I2C bus registration
5  *
6  * Copyright (C) 2007 Nokia Corporation.
7  *
8  * Contact: Jarkko Nikula <jarkko.nikula@nokia.com>
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License
12  * version 2 as published by the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but
15  * WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17  * General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22  * 02110-1301 USA
23  *
24  */
25
26 #include <linux/kernel.h>
27 #include <linux/platform_device.h>
28 #include <linux/i2c.h>
29 #include <mach/irqs.h>
30 #include <mach/mux.h>
31
32 #define OMAP_I2C_SIZE           0x3f
33 #define OMAP1_I2C_BASE          0xfffb3800
34 #define OMAP2_I2C_BASE1         0x48070000
35 #define OMAP2_I2C_BASE2         0x48072000
36 #define OMAP2_I2C_BASE3         0x48060000
37
38 static const char name[] = "i2c_omap";
39
40 #define I2C_RESOURCE_BUILDER(base, irq)                 \
41         {                                               \
42                 .start  = (base),                       \
43                 .end    = (base) + OMAP_I2C_SIZE,       \
44                 .flags  = IORESOURCE_MEM,               \
45         },                                              \
46         {                                               \
47                 .start  = (irq),                        \
48                 .flags  = IORESOURCE_IRQ,               \
49         },
50
51 static struct resource i2c_resources[][2] = {
52         { I2C_RESOURCE_BUILDER(0, 0) },
53 #if     defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
54         { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
55 #endif
56 #if     defined(CONFIG_ARCH_OMAP34XX)
57         { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
58 #endif
59 };
60
61 #define I2C_DEV_BUILDER(bus_id, res, data)              \
62         {                                               \
63                 .id     = (bus_id),                     \
64                 .name   = name,                         \
65                 .num_resources  = ARRAY_SIZE(res),      \
66                 .resource       = (res),                \
67                 .dev            = {                     \
68                         .platform_data  = (data),       \
69                 },                                      \
70         }
71
72 static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
73 static struct platform_device omap_i2c_devices[] = {
74         I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
75 #if     defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
76         I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
77 #endif
78 #if     defined(CONFIG_ARCH_OMAP34XX)
79         I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
80 #endif
81 };
82
83 #if defined(CONFIG_ARCH_OMAP24XX)
84 static const int omap24xx_pins[][2] = {
85         { M19_24XX_I2C1_SCL, L15_24XX_I2C1_SDA },
86         { J15_24XX_I2C2_SCL, H19_24XX_I2C2_SDA },
87 };
88 #else
89 static const int omap24xx_pins[][2] = {};
90 #endif
91 #if defined(CONFIG_ARCH_OMAP34XX)
92 static const int omap34xx_pins[][2] = {
93         { K21_34XX_I2C1_SCL, J21_34XX_I2C1_SDA},
94         { AF15_34XX_I2C2_SCL, AE15_34XX_I2C2_SDA},
95         { AF14_34XX_I2C3_SCL, AG14_34XX_I2C3_SDA},
96 };
97 #else
98 static const int omap34xx_pins[][2] = {};
99 #endif
100
101 static void __init omap_i2c_mux_pins(int bus)
102 {
103         int scl, sda;
104
105         if (cpu_class_is_omap1()) {
106                 scl = I2C_SCL;
107                 sda = I2C_SDA;
108         } else if (cpu_is_omap24xx()) {
109                 scl = omap24xx_pins[bus][0];
110                 sda = omap24xx_pins[bus][1];
111         } else if (cpu_is_omap34xx()) {
112                 scl = omap34xx_pins[bus][0];
113                 sda = omap34xx_pins[bus][1];
114         } else {
115                 return;
116         }
117
118         omap_cfg_reg(sda);
119         omap_cfg_reg(scl);
120 }
121
122 static int __init omap_i2c_nr_ports(void)
123 {
124         int ports = 0;
125
126         if (cpu_class_is_omap1())
127                 ports = 1;
128         else if (cpu_is_omap24xx())
129                 ports = 2;
130         else if (cpu_is_omap34xx())
131                 ports = 3;
132
133         return ports;
134 }
135
136 /**
137  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
138  * @str: String of options
139  *
140  * This function allow to override the default I2C bus speed for given I2C
141  * bus with a command line option.
142  *
143  * Format: i2c_bus=bus_id,clkrate (in kHz)
144  *
145  * Returns 1 on success, 0 otherwise.
146  */
147 static int __init omap_i2c_bus_setup(char *str)
148 {
149         int ports;
150         int ints[3];
151
152         ports = omap_i2c_nr_ports();
153         get_options(str, 3, ints);
154         if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
155                 return 0;
156         i2c_rate[ints[1] - 1] = ints[2];
157
158         return 1;
159 }
160 __setup("i2c_bus=", omap_i2c_bus_setup);
161
162 /**
163  * omap_register_i2c_bus - register I2C bus with device descriptors
164  * @bus_id: bus id counting from number 1
165  * @clkrate: clock rate of the bus in kHz
166  * @info: pointer into I2C device descriptor table or NULL
167  * @len: number of descriptors in the table
168  *
169  * Returns 0 on success or an error code.
170  */
171 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
172                           struct i2c_board_info const *info,
173                           unsigned len)
174 {
175         int err;
176         struct platform_device *pdev;
177         struct resource *res;
178         resource_size_t base, irq;
179
180         BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
181
182         if (info) {
183                 err = i2c_register_board_info(bus_id, info, len);
184                 if (err)
185                         return err;
186         }
187
188         pdev = &omap_i2c_devices[bus_id - 1];
189         if (i2c_rate[bus_id - 1] == 0)
190                 i2c_rate[bus_id - 1] = clkrate;
191
192         if (bus_id == 1) {
193                 res = pdev->resource;
194                 if (cpu_class_is_omap1()) {
195                         base = OMAP1_I2C_BASE;
196                         irq = INT_I2C;
197                 } else {
198                         base = OMAP2_I2C_BASE1;
199                         irq = INT_24XX_I2C1_IRQ;
200                 }
201                 res[0].start = base;
202                 res[0].end = base + OMAP_I2C_SIZE;
203                 res[1].start = irq;
204         }
205
206         omap_i2c_mux_pins(bus_id - 1);
207         return platform_device_register(pdev);
208 }