ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()
[linux-2.6.git] / arch / arm / mm / proc-arm720.S
1 /*
2  *  linux/arch/arm/mm/proc-arm720.S: MMU functions for ARM720
3  *
4  *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5  *                     Rob Scott (rscott@mtrob.fdns.net)
6  *  Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
7  *  hacked for non-paged-MM by Hyok S. Choi, 2004.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
22  *
23  *
24  * These are the low level assembler for performing cache and TLB
25  * functions on the ARM720T.  The ARM720T has a writethrough IDC
26  * cache, so we don't need to clean it.
27  *
28  *  Changelog:
29  *   05-09-2000 SJH     Created by moving 720 specific functions
30  *                      out of 'proc-arm6,7.S' per RMK discussion
31  *   07-25-2000 SJH     Added idle function.
32  *   08-25-2000 DBS     Updated for integration of ARM Ltd version.
33  *   04-20-2004 HSC     modified for non-paged memory management mode.
34  */
35 #include <linux/linkage.h>
36 #include <linux/init.h>
37 #include <asm/assembler.h>
38 #include <asm/asm-offsets.h>
39 #include <asm/hwcap.h>
40 #include <asm/pgtable-hwdef.h>
41 #include <asm/pgtable.h>
42 #include <asm/ptrace.h>
43
44 #include "proc-macros.S"
45
46 /*
47  * Function: arm720_proc_init (void)
48  *         : arm720_proc_fin (void)
49  *
50  * Notes   : This processor does not require these
51  */
52 ENTRY(cpu_arm720_dcache_clean_area)
53 ENTRY(cpu_arm720_proc_init)
54                 mov     pc, lr
55
56 ENTRY(cpu_arm720_proc_fin)
57                 stmfd   sp!, {lr}
58                 mov     ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
59                 msr     cpsr_c, ip
60                 mrc     p15, 0, r0, c1, c0, 0
61                 bic     r0, r0, #0x1000                 @ ...i............
62                 bic     r0, r0, #0x000e                 @ ............wca.
63                 mcr     p15, 0, r0, c1, c0, 0           @ disable caches
64                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
65                 ldmfd   sp!, {pc}
66
67 /*
68  * Function: arm720_proc_do_idle(void)
69  * Params  : r0 = unused
70  * Purpose : put the processer in proper idle mode
71  */
72 ENTRY(cpu_arm720_do_idle)
73                 mov     pc, lr
74
75 /*
76  * Function: arm720_switch_mm(unsigned long pgd_phys)
77  * Params  : pgd_phys   Physical address of page table
78  * Purpose : Perform a task switch, saving the old process' state and restoring
79  *           the new.
80  */
81 ENTRY(cpu_arm720_switch_mm)
82 #ifdef CONFIG_MMU
83                 mov     r1, #0
84                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
85                 mcr     p15, 0, r0, c2, c0, 0           @ update page table ptr
86                 mcr     p15, 0, r1, c8, c7, 0           @ flush TLB (v4)
87 #endif
88                 mov     pc, lr
89
90 /*
91  * Function: arm720_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext)
92  * Params  : r0 = Address to set
93  *         : r1 = value to set
94  * Purpose : Set a PTE and flush it out of any WB cache
95  */
96         .align  5
97 ENTRY(cpu_arm720_set_pte_ext)
98 #ifdef CONFIG_MMU
99         armv3_set_pte_ext wc_disable=0
100 #endif
101         mov     pc, lr
102
103 /*
104  * Function: arm720_reset
105  * Params  : r0 = address to jump to
106  * Notes   : This sets up everything for a reset
107  */
108 ENTRY(cpu_arm720_reset)
109                 mov     ip, #0
110                 mcr     p15, 0, ip, c7, c7, 0           @ invalidate cache
111 #ifdef CONFIG_MMU
112                 mcr     p15, 0, ip, c8, c7, 0           @ flush TLB (v4)
113 #endif
114                 mrc     p15, 0, ip, c1, c0, 0           @ get ctrl register
115                 bic     ip, ip, #0x000f                 @ ............wcam
116                 bic     ip, ip, #0x2100                 @ ..v....s........
117                 mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
118                 mov     pc, r0
119
120         __INIT
121
122         .type   __arm710_setup, #function
123 __arm710_setup:
124         mov     r0, #0
125         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
126 #ifdef CONFIG_MMU
127         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
128 #endif
129         mrc     p15, 0, r0, c1, c0              @ get control register
130         ldr     r5, arm710_cr1_clear
131         bic     r0, r0, r5
132         ldr     r5, arm710_cr1_set
133         orr     r0, r0, r5
134         mov     pc, lr                          @ __ret (head.S)
135         .size   __arm710_setup, . - __arm710_setup
136
137         /*
138          *  R
139          * .RVI ZFRS BLDP WCAM
140          * .... 0001 ..11 1101
141          * 
142          */
143         .type   arm710_cr1_clear, #object
144         .type   arm710_cr1_set, #object
145 arm710_cr1_clear:
146         .word   0x0f3f
147 arm710_cr1_set:
148         .word   0x013d
149
150         .type   __arm720_setup, #function
151 __arm720_setup:
152         mov     r0, #0
153         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
154 #ifdef CONFIG_MMU
155         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
156 #endif
157         adr     r5, arm720_crval
158         ldmia   r5, {r5, r6}
159         mrc     p15, 0, r0, c1, c0              @ get control register
160         bic     r0, r0, r5
161         orr     r0, r0, r6
162         mov     pc, lr                          @ __ret (head.S)
163         .size   __arm720_setup, . - __arm720_setup
164
165         /*
166          *  R
167          * .RVI ZFRS BLDP WCAM
168          * ..1. 1001 ..11 1101
169          * 
170          */
171         .type   arm720_crval, #object
172 arm720_crval:
173         crval   clear=0x00002f3f, mmuset=0x0000213d, ucset=0x00000130
174
175                 __INITDATA
176
177 /*
178  * Purpose : Function pointers used to access above functions - all calls
179  *           come through these
180  */
181                 .type   arm720_processor_functions, #object
182 ENTRY(arm720_processor_functions)
183                 .word   v4t_late_abort
184                 .word   legacy_pabort
185                 .word   cpu_arm720_proc_init
186                 .word   cpu_arm720_proc_fin
187                 .word   cpu_arm720_reset
188                 .word   cpu_arm720_do_idle
189                 .word   cpu_arm720_dcache_clean_area
190                 .word   cpu_arm720_switch_mm
191                 .word   cpu_arm720_set_pte_ext
192                 .size   arm720_processor_functions, . - arm720_processor_functions
193
194                 .section ".rodata"
195
196                 .type   cpu_arch_name, #object
197 cpu_arch_name:  .asciz  "armv4t"
198                 .size   cpu_arch_name, . - cpu_arch_name
199
200                 .type   cpu_elf_name, #object
201 cpu_elf_name:   .asciz  "v4"
202                 .size   cpu_elf_name, . - cpu_elf_name
203
204                 .type   cpu_arm710_name, #object
205 cpu_arm710_name:
206                 .asciz  "ARM710T"
207                 .size   cpu_arm710_name, . - cpu_arm710_name
208
209                 .type   cpu_arm720_name, #object
210 cpu_arm720_name:
211                 .asciz  "ARM720T"
212                 .size   cpu_arm720_name, . - cpu_arm720_name
213
214                 .align
215
216 /*
217  * See <asm/procinfo.h> for a definition of this structure.
218  */
219         
220                 .section ".proc.info.init", #alloc, #execinstr
221
222                 .type   __arm710_proc_info, #object
223 __arm710_proc_info:
224                 .long   0x41807100                              @ cpu_val
225                 .long   0xffffff00                              @ cpu_mask
226                 .long   PMD_TYPE_SECT | \
227                         PMD_SECT_BUFFERABLE | \
228                         PMD_SECT_CACHEABLE | \
229                         PMD_BIT4 | \
230                         PMD_SECT_AP_WRITE | \
231                         PMD_SECT_AP_READ
232                 .long   PMD_TYPE_SECT | \
233                         PMD_BIT4 | \
234                         PMD_SECT_AP_WRITE | \
235                         PMD_SECT_AP_READ
236                 b       __arm710_setup                          @ cpu_flush
237                 .long   cpu_arch_name                           @ arch_name
238                 .long   cpu_elf_name                            @ elf_name
239                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
240                 .long   cpu_arm710_name                         @ name
241                 .long   arm720_processor_functions
242                 .long   v4_tlb_fns
243                 .long   v4wt_user_fns
244                 .long   v4_cache_fns
245                 .size   __arm710_proc_info, . - __arm710_proc_info
246
247                 .type   __arm720_proc_info, #object
248 __arm720_proc_info:
249                 .long   0x41807200                              @ cpu_val
250                 .long   0xffffff00                              @ cpu_mask
251                 .long   PMD_TYPE_SECT | \
252                         PMD_SECT_BUFFERABLE | \
253                         PMD_SECT_CACHEABLE | \
254                         PMD_BIT4 | \
255                         PMD_SECT_AP_WRITE | \
256                         PMD_SECT_AP_READ
257                 .long   PMD_TYPE_SECT | \
258                         PMD_BIT4 | \
259                         PMD_SECT_AP_WRITE | \
260                         PMD_SECT_AP_READ
261                 b       __arm720_setup                          @ cpu_flush
262                 .long   cpu_arch_name                           @ arch_name
263                 .long   cpu_elf_name                            @ elf_name
264                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
265                 .long   cpu_arm720_name                         @ name
266                 .long   arm720_processor_functions
267                 .long   v4_tlb_fns
268                 .long   v4wt_user_fns
269                 .long   v4_cache_fns
270                 .size   __arm720_proc_info, . - __arm720_proc_info