rtc: tps80031: register as mfd sub device
[linux-2.6.git] / arch / arm / mach-tegra / usb_phy.c
1 /*
2  * arch/arm/mach-tegra/usb_phy.c
3  *
4  * Copyright (C) 2010 Google, Inc.
5  * Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
6  *
7  * Author:
8  *      Erik Gilling <konkers@google.com>
9  *      Benoit Goby <benoit@android.com>
10  *
11  * This software is licensed under the terms of the GNU General Public
12  * License version 2, as published by the Free Software Foundation, and
13  * may be copied, distributed, and modified under those terms.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  */
21 #include <linux/resource.h>
22 #include <linux/delay.h>
23 #include <linux/interrupt.h>
24 #include <linux/slab.h>
25 #include <linux/err.h>
26 #include <linux/platform_device.h>
27 #include <linux/io.h>
28 #include <linux/gpio.h>
29 #include <linux/interrupt.h>
30 #include <linux/clk.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/platform_data/tegra_usb.h>
33 #include "tegra_usb_phy.h"
34 #include <mach/iomap.h>
35 #include "fuse.h"
36
37 #define ERR(stuff...)           pr_err("usb_phy: " stuff)
38 #define WARNING(stuff...)       pr_warning("usb_phy: " stuff)
39 #define INFO(stuff...)          pr_info("usb_phy: " stuff)
40
41 #define AHB_MEM_PREFETCH_CFG3           0xe0
42 #define AHB_MEM_PREFETCH_CFG4           0xe4
43 #define AHB_MEM_PREFETCH_CFG1           0xec
44 #define AHB_MEM_PREFETCH_CFG2           0xf0
45 #define PREFETCH_ENB                    (1 << 31)
46
47 #ifdef DEBUG
48 #define DBG(stuff...)           pr_info("usb_phy: " stuff)
49 #else
50 #define DBG(stuff...)           do {} while (0)
51 #endif
52
53 static void print_usb_plat_data_info(struct tegra_usb_phy *phy)
54 {
55         struct tegra_usb_platform_data *pdata = phy->pdata;
56         char op_mode[][50] = {
57                 "TEGRA_USB_OPMODE_DEVICE",
58                 "TEGRA_USB_OPMODE_HOST"
59         };
60         char phy_intf[][50] = {
61                 "USB_PHY_INTF_UTMI",
62                 "USB_PHY_INTF_ULPI_LINK",
63                 "USB_PHY_INTF_ULPI_NULL",
64                 "USB_PHY_INTF_HSIC",
65                 "USB_PHY_INTF_ICUSB"
66         };
67
68         pr_info("tegra USB phy - inst[%d] platform info:\n", phy->inst);
69         pr_info("port_otg: %s\n", pdata->port_otg ? "yes" : "no");
70         pr_info("has_hostpc: %s\n", pdata->has_hostpc ? "yes" : "no");
71         pr_info("phy_interface: %s\n", phy_intf[pdata->phy_intf]);
72         pr_info("op_mode: %s\n", op_mode[pdata->op_mode]);
73         if (pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
74                 pr_info("vbus_pmu_irq: %d\n", pdata->u_data.dev.vbus_pmu_irq);
75                 pr_info("vbus_gpio: %d\n", pdata->u_data.dev.vbus_gpio);
76                 pr_info("charging: %s\n", pdata->u_data.dev.charging_supported ?
77                                 "enabled" : "disabled");
78                 pr_info("remote_wakeup: %s\n", pdata->u_data.dev.remote_wakeup_supported
79                                 ? "enabled" : "disabled");
80         } else {
81                 pr_info("vbus_gpio: %d\n", pdata->u_data.host.vbus_gpio);
82                 pr_info("vbus_reg: %s\n", pdata->u_data.host.vbus_reg ?
83                                 pdata->u_data.host.vbus_reg : "NULL");
84                 pr_info("hot_plug: %s\n", pdata->u_data.host.hot_plug ?
85                                 "enabled" : "disabled");
86                 pr_info("remote_wakeup: %s\n", pdata->u_data.host.remote_wakeup_supported
87                                 ? "enabled" : "disabled");
88         }
89 }
90
91 static void usb_host_vbus_enable(struct tegra_usb_phy *phy, bool enable)
92 {
93         if (phy->vbus_reg) {
94                 if (enable)
95                         regulator_enable(phy->vbus_reg);
96                 else
97                         regulator_disable(phy->vbus_reg);
98         } else {
99                 int gpio = phy->pdata->u_data.host.vbus_gpio;
100                 if (gpio == -1)
101                         return;
102                 gpio_set_value_cansleep(gpio, enable ? 1 : 0);
103         }
104 }
105
106 int usb_phy_reg_status_wait(void __iomem *reg, u32 mask,
107                                         u32 result, u32 timeout)
108 {
109         do {
110                 if ((readl(reg) & mask) == result)
111                         return 0;
112                 udelay(1);
113                 timeout--;
114         } while (timeout);
115
116         return -1;
117 }
118
119 static int tegra_usb_phy_init_ops(struct tegra_usb_phy *phy)
120 {
121         int err = 0;
122
123         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
124
125         if (phy->pdata->has_hostpc)
126                 err = tegra3_usb_phy_init_ops(phy);
127         else
128                 err = tegra2_usb_phy_init_ops(phy);
129
130         return err;
131 }
132
133 static irqreturn_t usb_phy_dev_vbus_pmu_irq_thr(int irq, void *pdata)
134 {
135         struct tegra_usb_phy *phy = pdata;
136
137         if (phy->vdd_reg && !phy->vdd_reg_on) {
138                 regulator_enable(phy->vdd_reg);
139                 phy->vdd_reg_on = true;
140                 /*
141                  * Optimal time to get the regulator turned on
142                  * before detecting vbus interrupt.
143                  */
144                 mdelay(15);
145         }
146
147         /* clk is disabled during phy power off and not here*/
148         if (!phy->ctrl_clk_on) {
149                 clk_enable(phy->ctrlr_clk);
150                 phy->ctrl_clk_on = true;
151         }
152
153         return IRQ_HANDLED;
154 }
155
156 static void tegra_usb_phy_release_clocks(struct tegra_usb_phy *phy)
157 {
158         clk_put(phy->emc_clk);
159         clk_put(phy->sys_clk);
160         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST)
161                 if (phy->pdata->u_data.host.hot_plug ||
162                         phy->pdata->u_data.host.remote_wakeup_supported)
163                         clk_disable(phy->ctrlr_clk);
164         clk_put(phy->ctrlr_clk);
165         clk_disable(phy->pllu_clk);
166         clk_put(phy->pllu_clk);
167 }
168
169 static int tegra_usb_phy_get_clocks(struct tegra_usb_phy *phy)
170 {
171         int err = 0;
172
173         phy->pllu_clk = clk_get_sys(NULL, "pll_u");
174         if (IS_ERR(phy->pllu_clk)) {
175                 ERR("inst:[%d] Can't get pllu_clk clock\n", phy->inst);
176                 err = PTR_ERR(phy->pllu_clk);
177                 goto fail_pll;
178         }
179         clk_enable(phy->pllu_clk);
180
181         phy->ctrlr_clk = clk_get(&phy->pdev->dev, NULL);
182         if (IS_ERR(phy->ctrlr_clk)) {
183                 dev_err(&phy->pdev->dev, "Can't get controller clock\n");
184                 err = PTR_ERR(phy->ctrlr_clk);
185                 goto fail_ctrlr_clk;
186         }
187
188         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST)
189                 if (phy->pdata->u_data.host.hot_plug ||
190                         phy->pdata->u_data.host.remote_wakeup_supported)
191                         clk_enable(phy->ctrlr_clk);
192
193         phy->sys_clk = clk_get(&phy->pdev->dev, "sclk");
194         if (IS_ERR(phy->sys_clk)) {
195                 dev_err(&phy->pdev->dev, "Can't get sclk clock\n");
196                 err = PTR_ERR(phy->sys_clk);
197                 goto fail_sclk;
198         }
199         clk_set_rate(phy->sys_clk, 80000000);
200
201         phy->emc_clk = clk_get(&phy->pdev->dev, "emc");
202         if (IS_ERR(phy->emc_clk)) {
203                 dev_err(&phy->pdev->dev, "Can't get emc clock\n");
204                 err = PTR_ERR(phy->emc_clk);
205                 goto fail_emc;
206         }
207
208         if(phy->pdata->has_hostpc)
209                 clk_set_rate(phy->emc_clk, 100000000);
210         else
211                 clk_set_rate(phy->emc_clk, 300000000);
212
213         return err;
214
215 fail_emc:
216         clk_put(phy->sys_clk);
217
218 fail_sclk:
219         clk_put(phy->ctrlr_clk);
220
221 fail_ctrlr_clk:
222         clk_disable(phy->pllu_clk);
223         clk_put(phy->pllu_clk);
224
225 fail_pll:
226         return err;
227 }
228
229 struct tegra_usb_phy *tegra_usb_phy_open(struct platform_device *pdev)
230 {
231         struct tegra_usb_phy *phy;
232         struct tegra_usb_platform_data *pdata;
233         struct resource *res;
234         int err;
235         int plat_data_size = sizeof(struct tegra_usb_platform_data);
236
237         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pdev->id);
238         pdata = dev_get_platdata(&pdev->dev);
239         if (!pdata) {
240                 dev_err(&pdev->dev, "inst:[%d] Platform data missing\n",
241                                                                 pdev->id);
242                 err = -EINVAL;
243                 goto fail_inval;
244         }
245
246         phy = devm_kzalloc(&pdev->dev, sizeof(struct tegra_usb_phy), GFP_KERNEL);
247         if (!phy) {
248                 ERR("inst:[%d] malloc usb phy failed\n", pdev->id);
249                 err = -ENOMEM;
250                 goto fail_nomem;
251         }
252
253         phy->pdata = devm_kzalloc(&pdev->dev, plat_data_size, GFP_KERNEL);
254         if (!phy->pdata) {
255                 ERR("inst:[%d] malloc usb phy pdata failed\n", pdev->id);
256                 devm_kfree(&pdev->dev, phy);
257                 err = -ENOMEM;
258                 goto fail_nomem;
259         }
260
261         memcpy(phy->pdata, pdata, plat_data_size);
262
263         phy->pdev = pdev;
264         phy->inst = pdev->id;
265
266         print_usb_plat_data_info(phy);
267
268         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
269         if (!res) {
270                 ERR("inst:[%d] failed to get I/O memory\n", phy->inst);
271                 err = -ENXIO;
272                 goto fail_io;
273         }
274
275         phy->regs = ioremap(res->start, resource_size(res));
276         if (!phy->regs) {
277                 ERR("inst:[%d] Failed to remap I/O memory\n", phy->inst);
278                 err = -ENOMEM;
279                 goto fail_io;
280         }
281
282         phy->vdd_reg = regulator_get(&pdev->dev, "avdd_usb");
283         if (IS_ERR_OR_NULL(phy->vdd_reg)) {
284                 ERR("inst:[%d] couldn't get regulator avdd_usb: %ld\n",
285                         phy->inst, PTR_ERR(phy->vdd_reg));
286                 phy->vdd_reg = NULL;
287                 err = PTR_ERR(phy->vdd_reg);
288                 goto fail_io;
289         }
290
291         err = tegra_usb_phy_get_clocks(phy);
292         if (err) {
293                 ERR("inst:[%d] Failed to init clocks\n", phy->inst);
294                 goto fail_clk;
295         }
296
297         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
298                 if (phy->pdata->u_data.dev.vbus_pmu_irq) {
299                         err = request_threaded_irq(
300                                         phy->pdata->u_data.dev.vbus_pmu_irq,
301                                         NULL, usb_phy_dev_vbus_pmu_irq_thr,
302                                         IRQF_SHARED, "usb_pmu_vbus_irq", phy);
303                         if (err) {
304                                 ERR("inst:[%d] Failed to register IRQ\n",
305                                                                 phy->inst);
306                                 goto fail_init;
307                         }
308                 } else {
309                         clk_enable(phy->ctrlr_clk);
310                 }
311         } else {
312                 if (phy->pdata->u_data.host.vbus_reg) {
313                         phy->vbus_reg = regulator_get(NULL,
314                                         phy->pdata->u_data.host.vbus_reg);
315                         if (WARN_ON(IS_ERR_OR_NULL(phy->vbus_reg))) {
316                                 ERR("failed to get regulator vdd_vbus_usb: %ld,\
317                                  instance : %d\n", PTR_ERR(phy->vbus_reg),
318                                                                 phy->inst);
319                                 err = PTR_ERR(phy->vbus_reg);
320                                 goto fail_init;
321                         }
322                 } else {
323                         int gpio = phy->pdata->u_data.host.vbus_gpio;
324                         if (gpio != -1) {
325                                 if (gpio_request(gpio, "usb_host_vbus") < 0) {
326                                         ERR("inst:[%d] host vbus gpio \
327                                                  req failed\n", phy->inst);
328                                         goto fail_init;
329                                 }
330                                 if (gpio_direction_output(gpio, 1) < 0) {
331                                         ERR("inst:[%d] host vbus gpio \
332                                                  dir failed\n", phy->inst);
333                                         goto fail_init;
334                                 }
335                         }
336                 }
337                 usb_host_vbus_enable(phy, true);
338         }
339
340         err = tegra_usb_phy_init_ops(phy);
341         if (err) {
342                 ERR("inst:[%d] Failed to init ops\n", phy->inst);
343                 goto fail_init;
344         }
345
346         if (phy->pdata->ops && phy->pdata->ops->open)
347                 phy->pdata->ops->open();
348
349         if (phy->ops && phy->ops->open) {
350                 err = phy->ops->open(phy);
351                 if (err) {
352                         ERR("inst:[%d] Failed to open hw ops\n", phy->inst);
353                         goto fail_init;
354                 }
355         }
356
357         return phy;
358
359 fail_init:
360         tegra_usb_phy_release_clocks(phy);
361
362         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
363                 if (phy->pdata->u_data.dev.vbus_pmu_irq)
364                         free_irq(phy->pdata->u_data.dev.vbus_pmu_irq, phy);
365         } else {
366                 usb_host_vbus_enable(phy, false);
367
368                 if (phy->vbus_reg)
369                         regulator_put(phy->vbus_reg);
370                 else {
371                         int gpio = phy->pdata->u_data.host.vbus_gpio;
372                         if (gpio != -1) {
373                                 gpio_set_value_cansleep(gpio, 0);
374                                 gpio_free(gpio);
375                         }
376                 }
377         }
378
379 fail_clk:
380         regulator_put(phy->vdd_reg);
381         iounmap(phy->regs);
382 fail_io:
383         devm_kfree(&pdev->dev, phy->pdata);
384         devm_kfree(&pdev->dev, phy);
385
386 fail_nomem:
387 fail_inval:
388         return ERR_PTR(err);
389 }
390
391 void tegra_usb_phy_close(struct tegra_usb_phy *phy)
392 {
393         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
394
395         if (phy->ops && phy->ops->close)
396                 phy->ops->close(phy);
397
398         if (phy->pdata->ops && phy->pdata->ops->close)
399                 phy->pdata->ops->close();
400
401         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
402                 if (phy->pdata->u_data.dev.vbus_pmu_irq)
403                         free_irq(phy->pdata->u_data.dev.vbus_pmu_irq, phy);
404                 else
405                         clk_disable(phy->ctrlr_clk);
406         } else {
407                 usb_host_vbus_enable(phy, false);
408
409                 if (phy->vbus_reg)
410                         regulator_put(phy->vbus_reg);
411                 else {
412                         int gpio = phy->pdata->u_data.host.vbus_gpio;
413                         if (gpio != -1) {
414                                 gpio_set_value_cansleep(gpio, 0);
415                                 gpio_free(gpio);
416                         }
417                 }
418         }
419
420         if (phy->vdd_reg) {
421                 if (phy->vdd_reg_on)
422                         regulator_disable(phy->vdd_reg);
423                 regulator_put(phy->vdd_reg);
424         }
425
426         tegra_usb_phy_release_clocks(phy);
427
428         devm_kfree(&phy->pdev->dev, phy->pdata);
429         devm_kfree(&phy->pdev->dev, phy);
430 }
431
432 irqreturn_t tegra_usb_phy_irq(struct tegra_usb_phy *phy)
433 {
434         irqreturn_t status = IRQ_HANDLED;
435
436         if (phy->ops && phy->ops->irq)
437                 status = phy->ops->irq(phy);
438
439         return status;
440 }
441
442 int tegra_usb_phy_init(struct tegra_usb_phy *phy)
443 {
444         int status = 0;
445
446         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
447
448         if (phy->pdata->ops && phy->pdata->ops->init)
449                 phy->pdata->ops->init();
450
451         if (phy->ops && phy->ops->init)
452                 status = phy->ops->init(phy);
453
454         return status;
455 }
456
457 int tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
458 {
459         int err = 0;
460
461         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
462
463         if (!phy->phy_power_on)
464                 return err;
465
466         if (phy->ops && phy->ops->power_off) {
467                 if (phy->pdata->ops && phy->pdata->ops->pre_phy_off)
468                         phy->pdata->ops->pre_phy_off();
469                 err = phy->ops->power_off(phy);
470                 if (phy->pdata->ops && phy->pdata->ops->post_phy_off)
471                         phy->pdata->ops->post_phy_off();
472         }
473
474         clk_disable(phy->emc_clk);
475         clk_disable(phy->sys_clk);
476         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST) {
477                 if (!phy->pdata->u_data.host.hot_plug &&
478                         !phy->pdata->u_data.host.remote_wakeup_supported) {
479                         clk_disable(phy->ctrlr_clk);
480                         phy->ctrl_clk_on = false;
481                         if (phy->vdd_reg && phy->vdd_reg_on) {
482                                 regulator_disable(phy->vdd_reg);
483                                 phy->vdd_reg_on = false;
484                         }
485                 }
486         } else {
487                 /* In device mode clock regulator/clocks will be turned off
488                  * only if pmu interrupt is present on the board and host mode
489                  * support through OTG is supported on the board.
490                  */
491                 if (phy->pdata->u_data.dev.vbus_pmu_irq &&
492                         phy->pdata->builtin_host_disabled) {
493                         clk_disable(phy->ctrlr_clk);
494                         phy->ctrl_clk_on = false;
495                         if (phy->vdd_reg && phy->vdd_reg_on) {
496                                 regulator_disable(phy->vdd_reg);
497                                 phy->vdd_reg_on = false;
498                         }
499                 }
500         }
501
502         phy->phy_power_on = false;
503
504         return err;
505 }
506
507 int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
508 {
509         int status = 0;
510
511         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
512
513         if (phy->phy_power_on)
514                 return status;
515
516         if (phy->vdd_reg && !phy->vdd_reg_on) {
517                 regulator_enable(phy->vdd_reg);
518                 phy->vdd_reg_on = true;
519         }
520
521         /* In device mode clock is turned on by pmu irq handler
522          * if pmu irq is not available clocks will not be turned off/on
523          */
524         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST) {
525                 if (!phy->pdata->u_data.host.hot_plug &&
526                         !phy->pdata->u_data.host.remote_wakeup_supported)
527                         clk_enable(phy->ctrlr_clk);
528         } else {
529                 if (phy->pdata->u_data.dev.vbus_pmu_irq &&
530                         !phy->ctrl_clk_on) {
531                         clk_enable(phy->ctrlr_clk);
532                         phy->ctrl_clk_on = true;
533                 }
534         }
535         clk_enable(phy->sys_clk);
536         clk_enable(phy->emc_clk);
537
538         if (phy->ops && phy->ops->power_on) {
539                 if (phy->pdata->ops && phy->pdata->ops->pre_phy_on)
540                         phy->pdata->ops->pre_phy_on();
541                 status = phy->ops->power_on(phy);
542                 if (phy->pdata->ops && phy->pdata->ops->post_phy_on)
543                         phy->pdata->ops->post_phy_on();
544         }
545
546         phy->phy_power_on = true;
547
548         return status;
549 }
550
551 int tegra_usb_phy_reset(struct tegra_usb_phy *phy)
552 {
553         int status = 0;
554
555         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
556         if (phy->ops && phy->ops->reset)
557                 status = phy->ops->reset(phy);
558
559         return status;
560 }
561
562 int tegra_usb_phy_pre_suspend(struct tegra_usb_phy *phy)
563 {
564         int status = 0;
565
566         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
567
568         if (phy->pdata->ops && phy->pdata->ops->pre_suspend)
569                 phy->pdata->ops->pre_suspend();
570
571         if (phy->ops && phy->ops->pre_suspend)
572                 status = phy->ops->pre_suspend(phy);
573
574         return status;
575 }
576
577 int tegra_usb_phy_suspend(struct tegra_usb_phy *phy)
578 {
579         int err = 0;
580
581         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
582
583         if (phy->ops && phy->ops->suspend)
584                 err = phy->ops->suspend(phy);
585
586         if (!err && phy->pdata->u_data.host.power_off_on_suspend) {
587                 tegra_usb_phy_power_off(phy);
588         }
589
590         return err;
591 }
592
593 int tegra_usb_phy_post_suspend(struct tegra_usb_phy *phy)
594 {
595         int status = 0;
596
597         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
598
599         if (phy->ops && phy->ops->post_suspend)
600                 status = phy->ops->post_suspend(phy);
601
602         if (phy->pdata->ops && phy->pdata->ops->post_suspend)
603                 phy->pdata->ops->post_suspend();
604
605         return status;
606 }
607
608 int tegra_usb_phy_pre_resume(struct tegra_usb_phy *phy, bool remote_wakeup)
609 {
610         int status = 0;
611
612         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
613
614         if (phy->pdata->ops && phy->pdata->ops->pre_resume)
615                 phy->pdata->ops->pre_resume();
616
617         if (phy->ops && phy->ops->pre_resume)
618                 status = phy->ops->pre_resume(phy, remote_wakeup);
619
620         return status;
621 }
622
623 int tegra_usb_phy_resume(struct tegra_usb_phy *phy)
624 {
625         int err = 0;
626
627         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
628
629         if (phy->pdata->u_data.host.power_off_on_suspend) {
630                 tegra_usb_phy_power_on(phy);
631         }
632
633         if (!err && phy->ops && phy->ops->resume)
634                 err = phy->ops->resume(phy);
635
636         return err;
637
638 }
639
640 int tegra_usb_phy_post_resume(struct tegra_usb_phy *phy)
641 {
642         int status = 0;
643
644         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
645
646         if (phy->ops && phy->ops->post_resume)
647                 status = phy->ops->post_resume(phy);
648
649         if (phy->pdata->ops && phy->pdata->ops->post_resume)
650                 phy->pdata->ops->post_resume();
651
652         return status;
653 }
654
655 int tegra_usb_phy_port_power(struct tegra_usb_phy *phy)
656 {
657         int status = 0;
658
659         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
660
661         if (phy->ops && phy->ops->port_power)
662                 status = phy->ops->port_power(phy);
663
664         return status;
665 }
666
667 int tegra_usb_phy_bus_reset(struct tegra_usb_phy *phy)
668 {
669         int status = 0;
670
671         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
672
673         if (phy->ops && phy->ops->bus_reset)
674                 status = phy->ops->bus_reset(phy);
675
676         return status;
677 }
678
679 bool tegra_usb_phy_charger_detected(struct tegra_usb_phy *phy)
680 {
681         bool status = 0;
682
683         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
684         if (phy->ops && phy->ops->charger_detect)
685                 status = phy->ops->charger_detect(phy);
686
687         return status;
688 }
689
690 bool tegra_usb_phy_hw_accessible(struct tegra_usb_phy *phy)
691 {
692         if (!phy->hw_accessible)
693                 DBG("%s(%d) inst:[%d] Not Accessible\n", __func__,
694                                                 __LINE__, phy->inst);
695
696         return phy->hw_accessible;
697 }
698
699 bool tegra_usb_phy_remote_wakeup(struct tegra_usb_phy *phy)
700 {
701         return phy->remote_wakeup;
702 }
703
704 bool tegra_usb_phy_has_hostpc(struct tegra_usb_phy *phy)
705 {
706         return phy->pdata->has_hostpc;
707 }
708
709 bool tegra_usb_phy_otg_supported(struct tegra_usb_phy *phy)
710 {
711         return phy->pdata->port_otg;
712 }
713
714 void tegra_usb_phy_memory_prefetch_on(struct tegra_usb_phy *phy)
715 {
716         void __iomem *ahb_gizmo = IO_ADDRESS(TEGRA_AHB_GIZMO_BASE);
717         unsigned long val;
718
719         if (phy->inst == 0 && phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
720                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
721                 val |= PREFETCH_ENB;
722                 writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
723                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
724                 val |= PREFETCH_ENB;
725                 writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
726         }
727 }
728
729 void tegra_usb_phy_memory_prefetch_off(struct tegra_usb_phy *phy)
730 {
731         void __iomem *ahb_gizmo = IO_ADDRESS(TEGRA_AHB_GIZMO_BASE);
732         unsigned long val;
733
734         if (phy->inst == 0 && phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
735                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
736                 val &= ~(PREFETCH_ENB);
737                 writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
738                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
739                 val &= ~(PREFETCH_ENB);
740                 writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
741         }
742 }