arm: tegra: usb_phy: set vbus_reg to NULL
[linux-2.6.git] / arch / arm / mach-tegra / usb_phy.c
1 /*
2  * arch/arm/mach-tegra/usb_phy.c
3  *
4  * Copyright (C) 2010 Google, Inc.
5  * Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
6  *
7  * Author:
8  *      Erik Gilling <konkers@google.com>
9  *      Benoit Goby <benoit@android.com>
10  *
11  * This software is licensed under the terms of the GNU General Public
12  * License version 2, as published by the Free Software Foundation, and
13  * may be copied, distributed, and modified under those terms.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  */
21 #include <linux/resource.h>
22 #include <linux/delay.h>
23 #include <linux/interrupt.h>
24 #include <linux/slab.h>
25 #include <linux/err.h>
26 #include <linux/platform_device.h>
27 #include <linux/io.h>
28 #include <linux/gpio.h>
29 #include <linux/interrupt.h>
30 #include <linux/clk.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/platform_data/tegra_usb.h>
33 #include "tegra_usb_phy.h"
34 #include <mach/iomap.h>
35 #include "fuse.h"
36
37 #define ERR(stuff...)           pr_err("usb_phy: " stuff)
38 #define WARNING(stuff...)       pr_warning("usb_phy: " stuff)
39 #define INFO(stuff...)          pr_info("usb_phy: " stuff)
40
41 #define AHB_MEM_PREFETCH_CFG3           0xe0
42 #define AHB_MEM_PREFETCH_CFG4           0xe4
43 #define AHB_MEM_PREFETCH_CFG1           0xec
44 #define AHB_MEM_PREFETCH_CFG2           0xf0
45 #define PREFETCH_ENB                    (1 << 31)
46
47 #ifdef DEBUG
48 #define DBG(stuff...)           pr_info("usb_phy: " stuff)
49 #else
50 #define DBG(stuff...)           do {} while (0)
51 #endif
52
53 static void print_usb_plat_data_info(struct tegra_usb_phy *phy)
54 {
55         struct tegra_usb_platform_data *pdata = phy->pdata;
56         char op_mode[][50] = {
57                 "TEGRA_USB_OPMODE_DEVICE",
58                 "TEGRA_USB_OPMODE_HOST"
59         };
60         char phy_intf[][50] = {
61                 "USB_PHY_INTF_UTMI",
62                 "USB_PHY_INTF_ULPI_LINK",
63                 "USB_PHY_INTF_ULPI_NULL",
64                 "USB_PHY_INTF_HSIC",
65                 "USB_PHY_INTF_ICUSB"
66         };
67
68         pr_info("tegra USB phy - inst[%d] platform info:\n", phy->inst);
69         pr_info("port_otg: %s\n", pdata->port_otg ? "yes" : "no");
70         pr_info("has_hostpc: %s\n", pdata->has_hostpc ? "yes" : "no");
71         pr_info("phy_interface: %s\n", phy_intf[pdata->phy_intf]);
72         pr_info("op_mode: %s\n", op_mode[pdata->op_mode]);
73         if (pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
74                 pr_info("vbus_pmu_irq: %d\n", pdata->u_data.dev.vbus_pmu_irq);
75                 pr_info("vbus_gpio: %d\n", pdata->u_data.dev.vbus_gpio);
76                 pr_info("charging: %s\n", pdata->u_data.dev.charging_supported ?
77                                 "enabled" : "disabled");
78                 pr_info("remote_wakeup: %s\n", pdata->u_data.dev.remote_wakeup_supported
79                                 ? "enabled" : "disabled");
80         } else {
81                 pr_info("vbus_gpio: %d\n", pdata->u_data.host.vbus_gpio);
82                 pr_info("vbus_reg: %s\n", pdata->u_data.host.vbus_reg ?
83                                 pdata->u_data.host.vbus_reg : "NULL");
84                 pr_info("hot_plug: %s\n", pdata->u_data.host.hot_plug ?
85                                 "enabled" : "disabled");
86                 pr_info("remote_wakeup: %s\n", pdata->u_data.host.remote_wakeup_supported
87                                 ? "enabled" : "disabled");
88         }
89 }
90
91 static void usb_host_vbus_enable(struct tegra_usb_phy *phy, bool enable)
92 {
93         if (phy->vbus_reg) {
94                 if (enable)
95                         regulator_enable(phy->vbus_reg);
96                 else
97                         regulator_disable(phy->vbus_reg);
98         } else {
99                 int gpio = phy->pdata->u_data.host.vbus_gpio;
100                 if (gpio == -1)
101                         return;
102                 gpio_set_value_cansleep(gpio, enable ? 1 : 0);
103         }
104 }
105
106 int usb_phy_reg_status_wait(void __iomem *reg, u32 mask,
107                                         u32 result, u32 timeout)
108 {
109         do {
110                 if ((readl(reg) & mask) == result)
111                         return 0;
112                 udelay(1);
113                 timeout--;
114         } while (timeout);
115
116         return -1;
117 }
118
119 static int tegra_usb_phy_init_ops(struct tegra_usb_phy *phy)
120 {
121         int err = 0;
122
123         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
124
125         if (phy->pdata->has_hostpc)
126                 err = tegra3_usb_phy_init_ops(phy);
127         else
128                 err = tegra2_usb_phy_init_ops(phy);
129
130         return err;
131 }
132
133 static irqreturn_t usb_phy_dev_vbus_pmu_irq_thr(int irq, void *pdata)
134 {
135         struct tegra_usb_phy *phy = pdata;
136
137         if (phy->vdd_reg && !phy->vdd_reg_on) {
138                 regulator_enable(phy->vdd_reg);
139                 phy->vdd_reg_on = true;
140                 /*
141                  * Optimal time to get the regulator turned on
142                  * before detecting vbus interrupt.
143                  */
144                 mdelay(15);
145         }
146
147         /* clk is disabled during phy power off and not here*/
148         if (!phy->ctrl_clk_on) {
149                 clk_enable(phy->ctrlr_clk);
150                 phy->ctrl_clk_on = true;
151         }
152
153         return IRQ_HANDLED;
154 }
155
156 static void tegra_usb_phy_release_clocks(struct tegra_usb_phy *phy)
157 {
158         clk_put(phy->emc_clk);
159         clk_put(phy->sys_clk);
160         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST)
161                 if (phy->pdata->u_data.host.hot_plug ||
162                         phy->pdata->u_data.host.remote_wakeup_supported)
163                         clk_disable(phy->ctrlr_clk);
164         clk_put(phy->ctrlr_clk);
165         clk_disable(phy->pllu_clk);
166         clk_put(phy->pllu_clk);
167 }
168
169 static int tegra_usb_phy_get_clocks(struct tegra_usb_phy *phy)
170 {
171         int err = 0;
172
173         phy->pllu_clk = clk_get_sys(NULL, "pll_u");
174         if (IS_ERR(phy->pllu_clk)) {
175                 ERR("inst:[%d] Can't get pllu_clk clock\n", phy->inst);
176                 err = PTR_ERR(phy->pllu_clk);
177                 goto fail_pll;
178         }
179         clk_enable(phy->pllu_clk);
180
181         phy->ctrlr_clk = clk_get(&phy->pdev->dev, NULL);
182         if (IS_ERR(phy->ctrlr_clk)) {
183                 dev_err(&phy->pdev->dev, "Can't get controller clock\n");
184                 err = PTR_ERR(phy->ctrlr_clk);
185                 goto fail_ctrlr_clk;
186         }
187
188         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST)
189                 if (phy->pdata->u_data.host.hot_plug ||
190                         phy->pdata->u_data.host.remote_wakeup_supported)
191                         clk_enable(phy->ctrlr_clk);
192
193         phy->sys_clk = clk_get(&phy->pdev->dev, "sclk");
194         if (IS_ERR(phy->sys_clk)) {
195                 dev_err(&phy->pdev->dev, "Can't get sclk clock\n");
196                 err = PTR_ERR(phy->sys_clk);
197                 goto fail_sclk;
198         }
199         clk_set_rate(phy->sys_clk, 80000000);
200
201         phy->emc_clk = clk_get(&phy->pdev->dev, "emc");
202         if (IS_ERR(phy->emc_clk)) {
203                 dev_err(&phy->pdev->dev, "Can't get emc clock\n");
204                 err = PTR_ERR(phy->emc_clk);
205                 goto fail_emc;
206         }
207
208         if(phy->pdata->has_hostpc)
209                 clk_set_rate(phy->emc_clk, 100000000);
210         else
211                 clk_set_rate(phy->emc_clk, 300000000);
212
213         return err;
214
215 fail_emc:
216         clk_put(phy->sys_clk);
217
218 fail_sclk:
219         clk_put(phy->ctrlr_clk);
220
221 fail_ctrlr_clk:
222         clk_disable(phy->pllu_clk);
223         clk_put(phy->pllu_clk);
224
225 fail_pll:
226         return err;
227 }
228
229 struct tegra_usb_phy *tegra_usb_phy_open(struct platform_device *pdev)
230 {
231         struct tegra_usb_phy *phy;
232         struct tegra_usb_platform_data *pdata;
233         struct resource *res;
234         int err;
235         int plat_data_size = sizeof(struct tegra_usb_platform_data);
236
237         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pdev->id);
238         pdata = dev_get_platdata(&pdev->dev);
239         if (!pdata) {
240                 dev_err(&pdev->dev, "inst:[%d] Platform data missing\n",
241                                                                 pdev->id);
242                 err = -EINVAL;
243                 goto fail_inval;
244         }
245
246         phy = devm_kzalloc(&pdev->dev, sizeof(struct tegra_usb_phy), GFP_KERNEL);
247         if (!phy) {
248                 ERR("inst:[%d] malloc usb phy failed\n", pdev->id);
249                 err = -ENOMEM;
250                 goto fail_nomem;
251         }
252
253         phy->pdata = devm_kzalloc(&pdev->dev, plat_data_size, GFP_KERNEL);
254         if (!phy->pdata) {
255                 ERR("inst:[%d] malloc usb phy pdata failed\n", pdev->id);
256                 devm_kfree(&pdev->dev, phy);
257                 err = -ENOMEM;
258                 goto fail_nomem;
259         }
260
261         memcpy(phy->pdata, pdata, plat_data_size);
262
263         phy->pdev = pdev;
264         phy->inst = pdev->id;
265
266         print_usb_plat_data_info(phy);
267
268         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
269         if (!res) {
270                 ERR("inst:[%d] failed to get I/O memory\n", phy->inst);
271                 err = -ENXIO;
272                 goto fail_io;
273         }
274
275         phy->regs = ioremap(res->start, resource_size(res));
276         if (!phy->regs) {
277                 ERR("inst:[%d] Failed to remap I/O memory\n", phy->inst);
278                 err = -ENOMEM;
279                 goto fail_io;
280         }
281
282         phy->vdd_reg = regulator_get(&pdev->dev, "avdd_usb");
283         if (IS_ERR_OR_NULL(phy->vdd_reg)) {
284                 ERR("inst:[%d] couldn't get regulator avdd_usb: %ld\n",
285                         phy->inst, PTR_ERR(phy->vdd_reg));
286                 phy->vdd_reg = NULL;
287         }
288
289         err = tegra_usb_phy_get_clocks(phy);
290         if (err) {
291                 ERR("inst:[%d] Failed to init clocks\n", phy->inst);
292                 goto fail_clk;
293         }
294
295         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
296                 if (phy->pdata->u_data.dev.vbus_pmu_irq) {
297                         err = request_threaded_irq(
298                                         phy->pdata->u_data.dev.vbus_pmu_irq,
299                                         NULL, usb_phy_dev_vbus_pmu_irq_thr,
300                                         IRQF_SHARED, "usb_pmu_vbus_irq", phy);
301                         if (err) {
302                                 ERR("inst:[%d] Failed to register IRQ\n",
303                                                                 phy->inst);
304                                 goto fail_init;
305                         }
306                 } else {
307                         clk_enable(phy->ctrlr_clk);
308                 }
309         } else {
310                 if (phy->pdata->u_data.host.vbus_reg) {
311                         phy->vbus_reg = regulator_get(NULL,
312                                         phy->pdata->u_data.host.vbus_reg);
313                         if (WARN_ON(IS_ERR_OR_NULL(phy->vbus_reg))) {
314                                 ERR("failed to get regulator vdd_vbus_usb: %ld,\
315                                  instance : %d\n", PTR_ERR(phy->vbus_reg),
316                                                                 phy->inst);
317                                 err = PTR_ERR(phy->vbus_reg);
318                                 phy->vbus_reg = NULL;
319                                 goto fail_init;
320                         }
321                 } else {
322                         int gpio = phy->pdata->u_data.host.vbus_gpio;
323                         if (gpio != -1) {
324                                 if (gpio_request(gpio, "usb_host_vbus") < 0) {
325                                         ERR("inst:[%d] host vbus gpio \
326                                                  req failed\n", phy->inst);
327                                         goto fail_init;
328                                 }
329                                 if (gpio_direction_output(gpio, 1) < 0) {
330                                         ERR("inst:[%d] host vbus gpio \
331                                                  dir failed\n", phy->inst);
332                                         goto fail_init;
333                                 }
334                         }
335                 }
336                 usb_host_vbus_enable(phy, true);
337         }
338
339         err = tegra_usb_phy_init_ops(phy);
340         if (err) {
341                 ERR("inst:[%d] Failed to init ops\n", phy->inst);
342                 goto fail_init;
343         }
344
345         if (phy->pdata->ops && phy->pdata->ops->open)
346                 phy->pdata->ops->open();
347
348         if (phy->ops && phy->ops->open) {
349                 err = phy->ops->open(phy);
350                 if (err) {
351                         ERR("inst:[%d] Failed to open hw ops\n", phy->inst);
352                         goto fail_init;
353                 }
354         }
355
356         return phy;
357
358 fail_init:
359         tegra_usb_phy_release_clocks(phy);
360
361         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
362                 if (phy->pdata->u_data.dev.vbus_pmu_irq)
363                         free_irq(phy->pdata->u_data.dev.vbus_pmu_irq, phy);
364         } else {
365                 usb_host_vbus_enable(phy, false);
366
367                 if (phy->vbus_reg)
368                         regulator_put(phy->vbus_reg);
369                 else {
370                         int gpio = phy->pdata->u_data.host.vbus_gpio;
371                         if (gpio != -1) {
372                                 gpio_set_value_cansleep(gpio, 0);
373                                 gpio_free(gpio);
374                         }
375                 }
376         }
377
378 fail_clk:
379         regulator_put(phy->vdd_reg);
380         iounmap(phy->regs);
381 fail_io:
382         devm_kfree(&pdev->dev, phy->pdata);
383         devm_kfree(&pdev->dev, phy);
384
385 fail_nomem:
386 fail_inval:
387         return ERR_PTR(err);
388 }
389
390 void tegra_usb_phy_close(struct tegra_usb_phy *phy)
391 {
392         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
393
394         if (phy->ops && phy->ops->close)
395                 phy->ops->close(phy);
396
397         if (phy->pdata->ops && phy->pdata->ops->close)
398                 phy->pdata->ops->close();
399
400         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
401                 if (phy->pdata->u_data.dev.vbus_pmu_irq)
402                         free_irq(phy->pdata->u_data.dev.vbus_pmu_irq, phy);
403                 else
404                         clk_disable(phy->ctrlr_clk);
405         } else {
406                 usb_host_vbus_enable(phy, false);
407
408                 if (phy->vbus_reg)
409                         regulator_put(phy->vbus_reg);
410                 else {
411                         int gpio = phy->pdata->u_data.host.vbus_gpio;
412                         if (gpio != -1) {
413                                 gpio_set_value_cansleep(gpio, 0);
414                                 gpio_free(gpio);
415                         }
416                 }
417         }
418
419         if (phy->vdd_reg) {
420                 if (phy->vdd_reg_on)
421                         regulator_disable(phy->vdd_reg);
422                 regulator_put(phy->vdd_reg);
423         }
424
425         tegra_usb_phy_release_clocks(phy);
426
427         devm_kfree(&phy->pdev->dev, phy->pdata);
428         devm_kfree(&phy->pdev->dev, phy);
429 }
430
431 irqreturn_t tegra_usb_phy_irq(struct tegra_usb_phy *phy)
432 {
433         irqreturn_t status = IRQ_HANDLED;
434
435         if (phy->ops && phy->ops->irq)
436                 status = phy->ops->irq(phy);
437
438         return status;
439 }
440
441 int tegra_usb_phy_init(struct tegra_usb_phy *phy)
442 {
443         int status = 0;
444
445         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
446
447         if (phy->pdata->ops && phy->pdata->ops->init)
448                 phy->pdata->ops->init();
449
450         if (phy->ops && phy->ops->init)
451                 status = phy->ops->init(phy);
452
453         return status;
454 }
455
456 int tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
457 {
458         int err = 0;
459
460         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
461
462         if (!phy->phy_power_on)
463                 return err;
464
465         if (phy->ops && phy->ops->power_off) {
466                 if (phy->pdata->ops && phy->pdata->ops->pre_phy_off)
467                         phy->pdata->ops->pre_phy_off();
468                 err = phy->ops->power_off(phy);
469                 if (phy->pdata->ops && phy->pdata->ops->post_phy_off)
470                         phy->pdata->ops->post_phy_off();
471         }
472
473         clk_disable(phy->emc_clk);
474         clk_disable(phy->sys_clk);
475         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST) {
476                 if (!phy->pdata->u_data.host.hot_plug &&
477                         !phy->pdata->u_data.host.remote_wakeup_supported) {
478                         clk_disable(phy->ctrlr_clk);
479                         phy->ctrl_clk_on = false;
480                         if (phy->vdd_reg && phy->vdd_reg_on) {
481                                 regulator_disable(phy->vdd_reg);
482                                 phy->vdd_reg_on = false;
483                         }
484                 }
485         } else {
486                 /* In device mode clock regulator/clocks will be turned off
487                  * only if pmu interrupt is present on the board and host mode
488                  * support through OTG is supported on the board.
489                  */
490                 if (phy->pdata->u_data.dev.vbus_pmu_irq &&
491                         phy->pdata->builtin_host_disabled) {
492                         clk_disable(phy->ctrlr_clk);
493                         phy->ctrl_clk_on = false;
494                         if (phy->vdd_reg && phy->vdd_reg_on) {
495                                 regulator_disable(phy->vdd_reg);
496                                 phy->vdd_reg_on = false;
497                         }
498                 }
499         }
500
501         phy->phy_power_on = false;
502
503         return err;
504 }
505
506 int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
507 {
508         int status = 0;
509
510         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
511
512         if (phy->phy_power_on)
513                 return status;
514
515         if (phy->vdd_reg && !phy->vdd_reg_on) {
516                 regulator_enable(phy->vdd_reg);
517                 phy->vdd_reg_on = true;
518         }
519
520         /* In device mode clock is turned on by pmu irq handler
521          * if pmu irq is not available clocks will not be turned off/on
522          */
523         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST) {
524                 if (!phy->pdata->u_data.host.hot_plug &&
525                         !phy->pdata->u_data.host.remote_wakeup_supported)
526                         clk_enable(phy->ctrlr_clk);
527         } else {
528                 if (phy->pdata->u_data.dev.vbus_pmu_irq &&
529                         !phy->ctrl_clk_on) {
530                         clk_enable(phy->ctrlr_clk);
531                         phy->ctrl_clk_on = true;
532                 }
533         }
534         clk_enable(phy->sys_clk);
535         clk_enable(phy->emc_clk);
536
537         if (phy->ops && phy->ops->power_on) {
538                 if (phy->pdata->ops && phy->pdata->ops->pre_phy_on)
539                         phy->pdata->ops->pre_phy_on();
540                 status = phy->ops->power_on(phy);
541                 if (phy->pdata->ops && phy->pdata->ops->post_phy_on)
542                         phy->pdata->ops->post_phy_on();
543         }
544
545         phy->phy_power_on = true;
546
547         return status;
548 }
549
550 int tegra_usb_phy_reset(struct tegra_usb_phy *phy)
551 {
552         int status = 0;
553
554         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
555         if (phy->ops && phy->ops->reset)
556                 status = phy->ops->reset(phy);
557
558         return status;
559 }
560
561 int tegra_usb_phy_pre_suspend(struct tegra_usb_phy *phy)
562 {
563         int status = 0;
564
565         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
566
567         if (phy->pdata->ops && phy->pdata->ops->pre_suspend)
568                 phy->pdata->ops->pre_suspend();
569
570         if (phy->ops && phy->ops->pre_suspend)
571                 status = phy->ops->pre_suspend(phy);
572
573         return status;
574 }
575
576 int tegra_usb_phy_suspend(struct tegra_usb_phy *phy)
577 {
578         int err = 0;
579
580         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
581
582         if (phy->ops && phy->ops->suspend)
583                 err = phy->ops->suspend(phy);
584
585         if (!err && phy->pdata->u_data.host.power_off_on_suspend) {
586                 tegra_usb_phy_power_off(phy);
587         }
588
589         return err;
590 }
591
592 int tegra_usb_phy_post_suspend(struct tegra_usb_phy *phy)
593 {
594         int status = 0;
595
596         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
597
598         if (phy->ops && phy->ops->post_suspend)
599                 status = phy->ops->post_suspend(phy);
600
601         if (phy->pdata->ops && phy->pdata->ops->post_suspend)
602                 phy->pdata->ops->post_suspend();
603
604         return status;
605 }
606
607 int tegra_usb_phy_pre_resume(struct tegra_usb_phy *phy, bool remote_wakeup)
608 {
609         int status = 0;
610
611         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
612
613         if (phy->pdata->ops && phy->pdata->ops->pre_resume)
614                 phy->pdata->ops->pre_resume();
615
616         if (phy->ops && phy->ops->pre_resume)
617                 status = phy->ops->pre_resume(phy, remote_wakeup);
618
619         return status;
620 }
621
622 int tegra_usb_phy_resume(struct tegra_usb_phy *phy)
623 {
624         int err = 0;
625
626         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
627
628         if (phy->pdata->u_data.host.power_off_on_suspend) {
629                 tegra_usb_phy_power_on(phy);
630         }
631
632         if (!err && phy->ops && phy->ops->resume)
633                 err = phy->ops->resume(phy);
634
635         return err;
636
637 }
638
639 int tegra_usb_phy_post_resume(struct tegra_usb_phy *phy)
640 {
641         int status = 0;
642
643         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
644
645         if (phy->ops && phy->ops->post_resume)
646                 status = phy->ops->post_resume(phy);
647
648         if (phy->pdata->ops && phy->pdata->ops->post_resume)
649                 phy->pdata->ops->post_resume();
650
651         return status;
652 }
653
654 int tegra_usb_phy_port_power(struct tegra_usb_phy *phy)
655 {
656         int status = 0;
657
658         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
659
660         if (phy->ops && phy->ops->port_power)
661                 status = phy->ops->port_power(phy);
662
663         return status;
664 }
665
666 int tegra_usb_phy_bus_reset(struct tegra_usb_phy *phy)
667 {
668         int status = 0;
669
670         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
671
672         if (phy->ops && phy->ops->bus_reset)
673                 status = phy->ops->bus_reset(phy);
674
675         return status;
676 }
677
678 bool tegra_usb_phy_charger_detected(struct tegra_usb_phy *phy)
679 {
680         bool status = 0;
681
682         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
683         if (phy->ops && phy->ops->charger_detect)
684                 status = phy->ops->charger_detect(phy);
685
686         return status;
687 }
688
689 bool tegra_usb_phy_hw_accessible(struct tegra_usb_phy *phy)
690 {
691         if (!phy->hw_accessible)
692                 DBG("%s(%d) inst:[%d] Not Accessible\n", __func__,
693                                                 __LINE__, phy->inst);
694
695         return phy->hw_accessible;
696 }
697
698 bool tegra_usb_phy_remote_wakeup(struct tegra_usb_phy *phy)
699 {
700         return phy->remote_wakeup;
701 }
702
703 bool tegra_usb_phy_has_hostpc(struct tegra_usb_phy *phy)
704 {
705         return phy->pdata->has_hostpc;
706 }
707
708 bool tegra_usb_phy_otg_supported(struct tegra_usb_phy *phy)
709 {
710         return phy->pdata->port_otg;
711 }
712
713 void tegra_usb_phy_memory_prefetch_on(struct tegra_usb_phy *phy)
714 {
715         void __iomem *ahb_gizmo = IO_ADDRESS(TEGRA_AHB_GIZMO_BASE);
716         unsigned long val;
717
718         if (phy->inst == 0 && phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
719                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
720                 val |= PREFETCH_ENB;
721                 writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
722                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
723                 val |= PREFETCH_ENB;
724                 writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
725         }
726 }
727
728 void tegra_usb_phy_memory_prefetch_off(struct tegra_usb_phy *phy)
729 {
730         void __iomem *ahb_gizmo = IO_ADDRESS(TEGRA_AHB_GIZMO_BASE);
731         unsigned long val;
732
733         if (phy->inst == 0 && phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
734                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
735                 val &= ~(PREFETCH_ENB);
736                 writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
737                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
738                 val &= ~(PREFETCH_ENB);
739                 writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
740         }
741 }