[ARM/tegra] Add Tegra3 support
[linux-2.6.git] / arch / arm / mach-tegra / tegra_i2s_audio.c
1 /*
2  * arch/arm/mach-tegra/tegra_i2s_audio.c
3  *
4  * Copyright (C) 2010 Google, Inc.
5  *
6  * Author:
7  *      Iliyan Malchev <malchev@google.com>
8  *
9  * This software is licensed under the terms of the GNU General Public
10  * License version 2, as published by the Free Software Foundation, and
11  * may be copied, distributed, and modified under those terms.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  */
19
20 /* TODO:
21         -- replace make I2S_MAX_NUM_BUFS configurable through an ioctl
22 */
23
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/miscdevice.h>
27 #include <linux/fs.h>
28 #include <linux/mutex.h>
29 #include <linux/clk.h>
30 #include <linux/interrupt.h>
31 #include <linux/slab.h>
32 #include <linux/list.h>
33 #include <linux/spinlock.h>
34 #include <linux/uaccess.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/dmapool.h>
37 #include <linux/err.h>
38 #include <linux/spi/spi.h>
39 #include <linux/kfifo.h>
40 #include <linux/debugfs.h>
41 #include <linux/completion.h>
42 #include <linux/platform_device.h>
43 #include <linux/device.h>
44 #include <linux/io.h>
45 #include <linux/ktime.h>
46 #include <linux/sysfs.h>
47 #include <linux/delay.h>
48 #include <linux/tegra_audio.h>
49 #include <linux/pm.h>
50 #include <linux/workqueue.h>
51
52 #include <mach/dma.h>
53 #include <mach/iomap.h>
54 #include <mach/i2s.h>
55 #include <mach/audio.h>
56 #include <mach/irqs.h>
57
58 #include "clock.h"
59
60 #define PCM_BUFFER_MAX_SIZE_ORDER       PAGE_SHIFT
61
62 #define TEGRA_AUDIO_DSP_NONE            0
63 #define TEGRA_AUDIO_DSP_PCM             1
64 #define TEGRA_AUDIO_DSP_NETWORK         2
65 #define TEGRA_AUDIO_DSP_TDM             3
66
67 #define I2S_MAX_NUM_BUFS 4
68 #define I2S_DEFAULT_TX_NUM_BUFS 2
69 #define I2S_DEFAULT_RX_NUM_BUFS 2
70
71 /* per stream (input/output) */
72 struct audio_stream {
73         int opened;
74         struct mutex lock;
75
76         bool active; /* is DMA in progress? */
77         int num_bufs;
78         void *buffer[I2S_MAX_NUM_BUFS];
79         dma_addr_t buf_phy[I2S_MAX_NUM_BUFS];
80         struct completion comp[I2S_MAX_NUM_BUFS];
81         struct tegra_dma_req dma_req[I2S_MAX_NUM_BUFS];
82         int last_queued;
83
84         int i2s_fifo_atn_level;
85
86         struct tegra_dma_channel *dma_chan;
87         bool stop;
88         struct completion stop_completion;
89         spinlock_t dma_req_lock;
90
91         struct work_struct allow_suspend_work;
92 };
93
94 /* per i2s controller */
95 struct audio_driver_state {
96         struct list_head next;
97
98         struct platform_device *pdev;
99         struct tegra_audio_platform_data *pdata;
100         phys_addr_t i2s_phys;
101         unsigned long i2s_base;
102
103         unsigned long dma_req_sel;
104
105         int irq;
106         struct tegra_audio_in_config in_config;
107
108         struct miscdevice misc_out;
109         struct miscdevice misc_out_ctl;
110         struct audio_stream out;
111
112         struct miscdevice misc_in;
113         struct miscdevice misc_in_ctl;
114         struct audio_stream in;
115
116         /* Control for whole I2S (Data format, etc.) */
117         struct miscdevice misc_ctl;
118         unsigned int bit_format;
119 };
120
121 static inline bool pending_buffer_requests(struct audio_stream *stream)
122 {
123         int i;
124         for (i = 0; i < stream->num_bufs; i++)
125                 if (!completion_done(&stream->comp[i]))
126                         return true;
127         return false;
128 }
129
130 static inline int buf_size(struct audio_stream *s __attribute__((unused)))
131 {
132         return 1 << PCM_BUFFER_MAX_SIZE_ORDER;
133 }
134
135 static inline struct audio_driver_state *ads_from_misc_out(struct file *file)
136 {
137         struct miscdevice *m = file->private_data;
138         struct audio_driver_state *ads =
139                         container_of(m, struct audio_driver_state, misc_out);
140         BUG_ON(!ads);
141         return ads;
142 }
143
144 static inline struct audio_driver_state *ads_from_misc_out_ctl(
145                 struct file *file)
146 {
147         struct miscdevice *m = file->private_data;
148         struct audio_driver_state *ads =
149                         container_of(m, struct audio_driver_state,
150                                         misc_out_ctl);
151         BUG_ON(!ads);
152         return ads;
153 }
154
155 static inline struct audio_driver_state *ads_from_misc_in(struct file *file)
156 {
157         struct miscdevice *m = file->private_data;
158         struct audio_driver_state *ads =
159                         container_of(m, struct audio_driver_state, misc_in);
160         BUG_ON(!ads);
161         return ads;
162 }
163
164 static inline struct audio_driver_state *ads_from_misc_in_ctl(
165                 struct file *file)
166 {
167         struct miscdevice *m = file->private_data;
168         struct audio_driver_state *ads =
169                         container_of(m, struct audio_driver_state,
170                                         misc_in_ctl);
171         BUG_ON(!ads);
172         return ads;
173 }
174
175 static inline struct audio_driver_state *ads_from_misc_ctl(
176                 struct file *file)
177 {
178         struct miscdevice *m = file->private_data;
179         struct audio_driver_state *ads =
180                         container_of(m, struct audio_driver_state,
181                                         misc_ctl);
182         BUG_ON(!ads);
183         return ads;
184 }
185
186 static inline struct audio_driver_state *ads_from_out(
187                         struct audio_stream *aos)
188 {
189         return container_of(aos, struct audio_driver_state, out);
190 }
191
192 static inline struct audio_driver_state *ads_from_in(
193                         struct audio_stream *ais)
194 {
195         return container_of(ais, struct audio_driver_state, in);
196 }
197
198 static inline void prevent_suspend(struct audio_stream *as)
199 {
200         pr_debug("%s\n", __func__);
201         cancel_work_sync(&as->allow_suspend_work);
202 }
203
204 static void allow_suspend_worker(struct work_struct *w)
205 {
206         struct audio_stream *as = container_of(w,
207                         struct audio_stream, allow_suspend_work);
208         pr_debug("%s\n", __func__);
209 }
210
211 static inline void allow_suspend(struct audio_stream *as)
212 {
213         schedule_work(&as->allow_suspend_work);
214 }
215
216 #define I2S_I2S_FIFO_TX_BUSY    I2S_I2S_STATUS_FIFO1_BSY
217 #define I2S_I2S_FIFO_TX_QS      I2S_I2S_STATUS_QS_FIFO1
218 #define I2S_I2S_FIFO_TX_ERR     I2S_I2S_STATUS_FIFO1_ERR
219
220 #define I2S_I2S_FIFO_RX_BUSY    I2S_I2S_STATUS_FIFO2_BSY
221 #define I2S_I2S_FIFO_RX_QS      I2S_I2S_STATUS_QS_FIFO2
222 #define I2S_I2S_FIFO_RX_ERR     I2S_I2S_STATUS_FIFO2_ERR
223
224 #define I2S_FIFO_ERR (I2S_I2S_STATUS_FIFO1_ERR | I2S_I2S_STATUS_FIFO2_ERR)
225
226 static inline void i2s_writel(unsigned long base, u32 val, u32 reg)
227 {
228         writel(val, base + reg);
229 }
230
231 static inline u32 i2s_readl(unsigned long base, u32 reg)
232 {
233         return readl(base + reg);
234 }
235
236 static inline void i2s_fifo_write(unsigned long base, int fifo, u32 data)
237 {
238         i2s_writel(base, data, fifo ? I2S_I2S_FIFO2_0 : I2S_I2S_FIFO1_0);
239 }
240
241 static inline u32 i2s_fifo_read(unsigned long base, int fifo)
242 {
243         return i2s_readl(base, fifo ? I2S_I2S_FIFO2_0 : I2S_I2S_FIFO1_0);
244 }
245
246 static int i2s_set_channel_bit_count(unsigned long base,
247                         int sampling, int bitclk)
248 {
249         u32 val;
250         int bitcnt = bitclk / (2 * sampling) - 1;
251
252         if (bitcnt < 0 || bitcnt >= 1<<11) {
253                 pr_err("%s: bit count %d is out of bounds\n", __func__,
254                         bitcnt);
255                 return -EINVAL;
256         }
257
258         val = bitcnt;
259         if (bitclk % (2 * sampling)) {
260                 pr_info("%s: enabling non-symmetric mode\n", __func__);
261                 val |= I2S_I2S_TIMING_NON_SYM_ENABLE;
262         }
263
264         pr_debug("%s: I2S_I2S_TIMING_0 = %08x\n", __func__, val);
265         i2s_writel(base, val, I2S_I2S_TIMING_0);
266         return 0;
267 }
268
269 static void i2s_set_fifo_mode(unsigned long base, int fifo, int tx)
270 {
271         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
272         if (fifo == 0) {
273                 val &= ~I2S_I2S_CTRL_FIFO1_RX_ENABLE;
274                 val |= (!tx) ? I2S_I2S_CTRL_FIFO1_RX_ENABLE : 0;
275         } else {
276                 val &= ~I2S_I2S_CTRL_FIFO2_TX_ENABLE;
277                 val |= tx ? I2S_I2S_CTRL_FIFO2_TX_ENABLE : 0;
278         }
279         i2s_writel(base, val, I2S_I2S_CTRL_0);
280 }
281
282 static int i2s_fifo_set_attention_level(unsigned long base,
283                         int fifo, unsigned level)
284 {
285         u32 val;
286
287         if (level > I2S_FIFO_ATN_LVL_TWELVE_SLOTS) {
288                 pr_err("%s: invalid fifo level selector %d\n", __func__,
289                         level);
290                 return -EINVAL;
291         }
292
293         val = i2s_readl(base, I2S_I2S_FIFO_SCR_0);
294
295         if (!fifo) {
296                 val &= ~I2S_I2S_FIFO_SCR_FIFO1_ATN_LVL_MASK;
297                 val |= level << I2S_FIFO1_ATN_LVL_SHIFT;
298         } else {
299                 val &= ~I2S_I2S_FIFO_SCR_FIFO2_ATN_LVL_MASK;
300                 val |= level << I2S_FIFO2_ATN_LVL_SHIFT;
301         }
302
303         i2s_writel(base, val, I2S_I2S_FIFO_SCR_0);
304         return 0;
305 }
306
307 static void i2s_fifo_enable(unsigned long base, int fifo, int on)
308 {
309         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
310         if (!fifo) {
311                 val &= ~I2S_I2S_CTRL_FIFO1_ENABLE;
312                 val |= on ? I2S_I2S_CTRL_FIFO1_ENABLE : 0;
313         } else {
314                 val &= ~I2S_I2S_CTRL_FIFO2_ENABLE;
315                 val |= on ? I2S_I2S_CTRL_FIFO2_ENABLE : 0;
316         }
317
318         i2s_writel(base, val, I2S_I2S_CTRL_0);
319 }
320
321 #if 0
322 static bool i2s_is_fifo_enabled(unsigned long base, int fifo)
323 {
324         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
325         if (!fifo)
326                 return !!(val & I2S_I2S_CTRL_FIFO1_ENABLE);
327         return !!(val & I2S_I2S_CTRL_FIFO2_ENABLE);
328 }
329 #endif
330
331 static void i2s_fifo_clear(unsigned long base, int fifo)
332 {
333         u32 val = i2s_readl(base, I2S_I2S_FIFO_SCR_0);
334         if (!fifo) {
335                 val &= ~I2S_I2S_FIFO_SCR_FIFO1_CLR;
336                 val |= I2S_I2S_FIFO_SCR_FIFO1_CLR;
337 #if 0
338                 /* Per Nvidia, reduces pop on the next run. */
339                 if (!(val & I2S_I2S_CTRL_FIFO1_RX_ENABLE)) {
340                         int cnt = 16;
341                         while (cnt--)
342                                 i2s_writel(base, 0, I2S_I2S_FIFO1_0);
343                 }
344 #endif
345         } else {
346                 val &= ~I2S_I2S_FIFO_SCR_FIFO2_CLR;
347                 val |= I2S_I2S_FIFO_SCR_FIFO2_CLR;
348         }
349
350         i2s_writel(base, val, I2S_I2S_FIFO_SCR_0);
351 }
352
353 static void i2s_set_master(unsigned long base, int master)
354 {
355         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
356         val &= ~I2S_I2S_CTRL_MASTER_ENABLE;
357         val |= master ? I2S_I2S_CTRL_MASTER_ENABLE : 0;
358         i2s_writel(base, val, I2S_I2S_CTRL_0);
359 }
360
361 static int i2s_set_dsp_mode(unsigned long base, unsigned int mode)
362 {
363         u32 val;
364         if (mode > TEGRA_AUDIO_DSP_TDM) {
365                 pr_err("%s: invalid mode %d.\n", __func__, mode);
366                 return -EINVAL;
367         }
368         if (mode == TEGRA_AUDIO_DSP_TDM) {
369                 pr_err("TEGRA_AUDIO_DSP_TDM not implemented.\n");
370                 return -EINVAL;
371         }
372
373         /* Disable unused modes */
374         if (mode != TEGRA_AUDIO_DSP_PCM) {
375                 /* Disable PCM mode */
376                 val = i2s_readl(base, I2S_I2S_PCM_CTRL_0);
377                 val &= ~(I2S_I2S_PCM_CTRL_TRM_MODE |
378                                 I2S_I2S_PCM_CTRL_RCV_MODE);
379                 i2s_writel(base, val, I2S_I2S_PCM_CTRL_0);
380         }
381         if (mode != TEGRA_AUDIO_DSP_NETWORK) {
382                 /* Disable Network mode */
383                 val = i2s_readl(base, I2S_I2S_NW_CTRL_0);
384                 val &= ~(I2S_I2S_NW_CTRL_TRM_TLPHY_MODE |
385                                 I2S_I2S_NW_CTRL_RCV_TLPHY_MODE);
386                 i2s_writel(base, val, I2S_I2S_NW_CTRL_0);
387         }
388
389         /* Enable the selected mode. */
390         switch (mode) {
391         case TEGRA_AUDIO_DSP_NETWORK:
392                 /* Set DSP Network (Telephony) Mode */
393                 val = i2s_readl(base, I2S_I2S_NW_CTRL_0);
394                 val |= I2S_I2S_NW_CTRL_TRM_TLPHY_MODE |
395                                 I2S_I2S_NW_CTRL_RCV_TLPHY_MODE;
396                 i2s_writel(base, val, I2S_I2S_NW_CTRL_0);
397                 break;
398         case TEGRA_AUDIO_DSP_PCM:
399                 /* Set DSP PCM Mode */
400                 val = i2s_readl(base, I2S_I2S_PCM_CTRL_0);
401                 val |= I2S_I2S_PCM_CTRL_TRM_MODE |
402                                 I2S_I2S_PCM_CTRL_RCV_MODE;
403                 i2s_writel(base, val, I2S_I2S_PCM_CTRL_0);
404                 break;
405         }
406
407         return 0;
408 }
409
410 static int i2s_set_bit_format(unsigned long base, unsigned fmt)
411 {
412         u32 val;
413
414         if (fmt > I2S_BIT_FORMAT_DSP) {
415                 pr_err("%s: invalid bit-format selector %d\n", __func__, fmt);
416                 return -EINVAL;
417         }
418
419         val = i2s_readl(base, I2S_I2S_CTRL_0);
420         val &= ~I2S_I2S_CTRL_BIT_FORMAT_MASK;
421         val |= fmt << I2S_BIT_FORMAT_SHIFT;
422         i2s_writel(base, val, I2S_I2S_CTRL_0);
423         /* For DSP format, select DSP PCM mode. */
424         /* PCM mode and Network Mode slot 0 are effectively identical. */
425         if (fmt == I2S_BIT_FORMAT_DSP)
426                 i2s_set_dsp_mode(base, TEGRA_AUDIO_DSP_PCM);
427         else
428                 i2s_set_dsp_mode(base, TEGRA_AUDIO_DSP_NONE);
429
430         return 0;
431 }
432
433 static int i2s_set_bit_size(unsigned long base, unsigned bit_size)
434 {
435         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
436         val &= ~I2S_I2S_CTRL_BIT_SIZE_MASK;
437
438         if (bit_size > I2S_BIT_SIZE_32) {
439                 pr_err("%s: invalid bit_size selector %d\n", __func__,
440                         bit_size);
441                 return -EINVAL;
442         }
443
444         val |= bit_size << I2S_BIT_SIZE_SHIFT;
445
446         i2s_writel(base, val, I2S_I2S_CTRL_0);
447         return 0;
448 }
449
450 static int i2s_set_fifo_format(unsigned long base, unsigned fmt)
451 {
452         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
453         val &= ~I2S_I2S_CTRL_FIFO_FORMAT_MASK;
454
455         if (fmt > I2S_FIFO_32 && fmt != I2S_FIFO_PACKED) {
456                 pr_err("%s: invalid fmt selector %d\n", __func__, fmt);
457                 return -EINVAL;
458         }
459
460         val |= fmt << I2S_FIFO_SHIFT;
461
462         i2s_writel(base, val, I2S_I2S_CTRL_0);
463         return 0;
464 }
465
466 static void i2s_set_left_right_control_polarity(unsigned long base,
467                 int high_low)
468 {
469         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
470         val &= ~I2S_I2S_CTRL_L_R_CTRL;
471         val |= high_low ? I2S_I2S_CTRL_L_R_CTRL : 0;
472         i2s_writel(base, val, I2S_I2S_CTRL_0);
473 }
474
475 #if 0
476 static void i2s_set_fifo_irq_on_err(unsigned long base, int fifo, int on)
477 {
478         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
479         if (!fifo) {
480                 val &= ~I2S_I2S_IE_FIFO1_ERR;
481                 val |= on ? I2S_I2S_IE_FIFO1_ERR : 0;
482         } else {
483                 val &= ~I2S_I2S_IE_FIFO2_ERR;
484                 val |= on ? I2S_I2S_IE_FIFO2_ERR : 0;
485         }
486         i2s_writel(base, val, I2S_I2S_CTRL_0);
487 }
488
489 static void i2s_set_fifo_irq_on_qe(unsigned long base, int fifo, int on)
490 {
491         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
492         if (!fifo) {
493                 val &= ~I2S_I2S_QE_FIFO1;
494                 val |= on ? I2S_I2S_QE_FIFO1 : 0;
495         } else {
496                 val &= ~I2S_I2S_QE_FIFO2;
497                 val |= on ? I2S_I2S_QE_FIFO2 : 0;
498         }
499         i2s_writel(base, val, I2S_I2S_CTRL_0);
500 }
501 #endif
502
503 static void i2s_enable_fifos(unsigned long base, int on)
504 {
505         u32 val = i2s_readl(base, I2S_I2S_CTRL_0);
506         if (on)
507                 val |= I2S_I2S_QE_FIFO1 | I2S_I2S_QE_FIFO2 |
508                        I2S_I2S_IE_FIFO1_ERR | I2S_I2S_IE_FIFO2_ERR;
509         else
510                 val &= ~(I2S_I2S_QE_FIFO1 | I2S_I2S_QE_FIFO2 |
511                          I2S_I2S_IE_FIFO1_ERR | I2S_I2S_IE_FIFO2_ERR);
512
513         i2s_writel(base, val, I2S_I2S_CTRL_0);
514 }
515
516 static inline u32 i2s_get_status(unsigned long base)
517 {
518         return i2s_readl(base, I2S_I2S_STATUS_0);
519 }
520
521 static inline u32 i2s_get_control(unsigned long base)
522 {
523         return i2s_readl(base, I2S_I2S_CTRL_0);
524 }
525
526 static inline void i2s_ack_status(unsigned long base)
527 {
528         return i2s_writel(base, i2s_readl(base, I2S_I2S_STATUS_0),
529                                 I2S_I2S_STATUS_0);
530 }
531
532 static inline u32 i2s_get_fifo_scr(unsigned long base)
533 {
534         return i2s_readl(base, I2S_I2S_FIFO_SCR_0);
535 }
536
537 static inline phys_addr_t i2s_get_fifo_phy_base(unsigned long phy_base,
538                 int fifo)
539 {
540         return phy_base + (fifo ? I2S_I2S_FIFO2_0 : I2S_I2S_FIFO1_0);
541 }
542
543 static inline u32 i2s_get_fifo_full_empty_count(unsigned long base, int fifo)
544 {
545         u32 val = i2s_readl(base, I2S_I2S_FIFO_SCR_0);
546
547         if (!fifo)
548                 val = val >> I2S_I2S_FIFO_SCR_FIFO1_FULL_EMPTY_COUNT_SHIFT;
549         else
550                 val = val >> I2S_I2S_FIFO_SCR_FIFO2_FULL_EMPTY_COUNT_SHIFT;
551
552         return val & I2S_I2S_FIFO_SCR_FIFO_FULL_EMPTY_COUNT_MASK;
553 }
554
555 static int i2s_configure(struct platform_device *pdev)
556 {
557         struct tegra_audio_platform_data *pdata = pdev->dev.platform_data;
558         struct audio_driver_state *state = pdata->driver_data;
559         bool master;
560         struct clk *i2s_clk;
561         int master_clk;
562
563         /* dev_info(&pdev->dev, "%s\n", __func__); */
564
565         if (!state)
566                 return -ENOMEM;
567
568         /* disable interrupts from I2S */
569         i2s_enable_fifos(state->i2s_base, 0);
570         i2s_fifo_clear(state->i2s_base, I2S_FIFO_TX);
571         i2s_fifo_clear(state->i2s_base, I2S_FIFO_RX);
572         i2s_set_left_right_control_polarity(state->i2s_base, 0); /* default */
573
574         i2s_clk = clk_get(&pdev->dev, NULL);
575         if (!i2s_clk) {
576                 dev_err(&pdev->dev, "%s: could not get i2s clock\n",
577                         __func__);
578                 return -EIO;
579         }
580
581         master = state->bit_format == TEGRA_AUDIO_BIT_FORMAT_DSP ?
582                         state->pdata->dsp_master : state->pdata->i2s_master;
583
584
585         master_clk = state->bit_format == TEGRA_AUDIO_BIT_FORMAT_DSP ?
586                         state->pdata->dsp_master_clk :
587                         state->pdata->i2s_master_clk;
588 #define I2S_CLK_TO_BITCLK_RATIO 2  /* Todo, Bitclk based on 2X clock? */
589         if (master)
590                 i2s_set_channel_bit_count(state->i2s_base, master_clk,
591                         clk_get_rate(i2s_clk)*I2S_CLK_TO_BITCLK_RATIO);
592         i2s_set_master(state->i2s_base, master);
593
594         i2s_set_fifo_mode(state->i2s_base, I2S_FIFO_TX, 1);
595         i2s_set_fifo_mode(state->i2s_base, I2S_FIFO_RX, 0);
596
597         if (state->bit_format == TEGRA_AUDIO_BIT_FORMAT_DSP)
598                 i2s_set_bit_format(state->i2s_base, I2S_BIT_FORMAT_DSP);
599         else
600                 i2s_set_bit_format(state->i2s_base, state->pdata->mode);
601         i2s_set_bit_size(state->i2s_base, state->pdata->bit_size);
602         i2s_set_fifo_format(state->i2s_base, state->pdata->fifo_fmt);
603
604         return 0;
605 }
606
607 static int init_stream_buffer(struct audio_stream *, int);
608
609 static int setup_dma(struct audio_driver_state *, int);
610 static void tear_down_dma(struct audio_driver_state *, int);
611 static void stop_dma_playback(struct audio_stream *);
612 static int start_dma_recording(struct audio_stream *, int);
613 static void stop_dma_recording(struct audio_stream *);
614
615 struct sound_ops {
616         int (*setup)(struct audio_driver_state *, int);
617         void (*tear_down)(struct audio_driver_state *, int);
618         void (*stop_playback)(struct audio_stream *);
619         int (*start_recording)(struct audio_stream *, int);
620         void (*stop_recording)(struct audio_stream *);
621 };
622
623 static const struct sound_ops dma_sound_ops = {
624         .setup = setup_dma,
625         .tear_down = tear_down_dma,
626         .stop_playback = stop_dma_playback,
627         .start_recording = start_dma_recording,
628         .stop_recording = stop_dma_recording,
629 };
630
631 static const struct sound_ops *sound_ops = &dma_sound_ops;
632
633 static int start_recording_if_necessary(struct audio_stream *ais, int size)
634 {
635         int rc = 0;
636         unsigned long flags;
637         prevent_suspend(ais);
638         spin_lock_irqsave(&ais->dma_req_lock, flags);
639         if (!ais->stop && !pending_buffer_requests(ais)) {
640                 /* pr_debug("%s: starting recording\n", __func__); */
641                 rc = sound_ops->start_recording(ais, size);
642                 if (rc) {
643                         pr_err("%s start_recording() failed\n", __func__);
644                         allow_suspend(ais);
645                 }
646         }
647         spin_unlock_irqrestore(&ais->dma_req_lock, flags);
648         return rc;
649 }
650
651 static bool stop_playback_if_necessary(struct audio_stream *aos)
652 {
653         unsigned long flags;
654         spin_lock_irqsave(&aos->dma_req_lock, flags);
655         pr_debug("%s\n", __func__);
656         if (!pending_buffer_requests(aos)) {
657                 pr_debug("%s: no more data to play back\n", __func__);
658                 sound_ops->stop_playback(aos);
659                 spin_unlock_irqrestore(&aos->dma_req_lock, flags);
660                 allow_suspend(aos);
661                 return true;
662         }
663         spin_unlock_irqrestore(&aos->dma_req_lock, flags);
664
665         return false;
666 }
667
668 /* playback and recording */
669 static bool wait_till_stopped(struct audio_stream *as)
670 {
671         int rc;
672         pr_debug("%s: wait for completion\n", __func__);
673         rc = wait_for_completion_timeout(
674                         &as->stop_completion, HZ);
675         if (!rc)
676                 pr_err("%s: wait timed out", __func__);
677         if (rc < 0)
678                 pr_err("%s: wait error %d\n", __func__, rc);
679         allow_suspend(as);
680         pr_debug("%s: done: %d\n", __func__, rc);
681         return true;
682 }
683
684 /* Ask for playback and recording to stop.  The _nosync means that
685  * as->lock has to be locked by the caller.
686  */
687 static void request_stop_nosync(struct audio_stream *as)
688 {
689         int i;
690         pr_debug("%s\n", __func__);
691         if (!as->stop) {
692                 as->stop = true;
693                 if (pending_buffer_requests(as))
694                         wait_till_stopped(as);
695                 for (i = 0; i < as->num_bufs; i++) {
696                         init_completion(&as->comp[i]);
697                         complete(&as->comp[i]);
698                 }
699         }
700         if (!tegra_dma_is_empty(as->dma_chan))
701                 pr_err("%s: DMA not empty!\n", __func__);
702         /* Stop the DMA then dequeue anything that's in progress. */
703         tegra_dma_cancel(as->dma_chan);
704         as->active = false; /* applies to recording only */
705         pr_debug("%s: done\n", __func__);
706 }
707
708 static void setup_dma_tx_request(struct tegra_dma_req *req,
709                 struct audio_stream *aos);
710
711 static void setup_dma_rx_request(struct tegra_dma_req *req,
712                 struct audio_stream *ais);
713
714 static int setup_dma(struct audio_driver_state *ads, int mask)
715 {
716         int rc, i;
717         pr_info("%s\n", __func__);
718
719         if (mask & TEGRA_AUDIO_ENABLE_TX) {
720                 /* setup audio playback */
721                 for (i = 0; i < ads->out.num_bufs; i++) {
722                         ads->out.buf_phy[i] = dma_map_single(&ads->pdev->dev,
723                                         ads->out.buffer[i],
724                                         1 << PCM_BUFFER_MAX_SIZE_ORDER,
725                                         DMA_TO_DEVICE);
726                         BUG_ON(!ads->out.buf_phy[i]);
727                         setup_dma_tx_request(&ads->out.dma_req[i], &ads->out);
728                         ads->out.dma_req[i].source_addr = ads->out.buf_phy[i];
729                 }
730                 ads->out.dma_chan = tegra_dma_allocate_channel(
731                                 TEGRA_DMA_MODE_CONTINUOUS_SINGLE);
732                 if (!ads->out.dma_chan) {
733                         pr_err("%s: error alloc output DMA channel: %ld\n",
734                                 __func__, PTR_ERR(ads->out.dma_chan));
735                         rc = -ENODEV;
736                         goto fail_tx;
737                 }
738         }
739
740         if (mask & TEGRA_AUDIO_ENABLE_RX) {
741                 /* setup audio recording */
742                 for (i = 0; i < ads->in.num_bufs; i++) {
743                         ads->in.buf_phy[i] = dma_map_single(&ads->pdev->dev,
744                                         ads->in.buffer[i],
745                                         1 << PCM_BUFFER_MAX_SIZE_ORDER,
746                                         DMA_FROM_DEVICE);
747                         BUG_ON(!ads->in.buf_phy[i]);
748                         setup_dma_rx_request(&ads->in.dma_req[i], &ads->in);
749                         ads->in.dma_req[i].dest_addr = ads->in.buf_phy[i];
750                 }
751                 ads->in.dma_chan = tegra_dma_allocate_channel(
752                                 TEGRA_DMA_MODE_CONTINUOUS_SINGLE);
753                 if (!ads->in.dma_chan) {
754                         pr_err("%s: error allocating input DMA channel: %ld\n",
755                                 __func__, PTR_ERR(ads->in.dma_chan));
756                         rc = -ENODEV;
757                         goto fail_rx;
758                 }
759         }
760
761         return 0;
762
763 fail_rx:
764         if (mask & TEGRA_AUDIO_ENABLE_RX) {
765                 for (i = 0; i < ads->in.num_bufs; i++) {
766                         dma_unmap_single(&ads->pdev->dev, ads->in.buf_phy[i],
767                                         1 << PCM_BUFFER_MAX_SIZE_ORDER,
768                                         DMA_FROM_DEVICE);
769                         ads->in.buf_phy[i] = 0;
770                 }
771                 tegra_dma_free_channel(ads->in.dma_chan);
772                 ads->in.dma_chan = 0;
773         }
774 fail_tx:
775         if (mask & TEGRA_AUDIO_ENABLE_TX) {
776                 for (i = 0; i < ads->out.num_bufs; i++) {
777                         dma_unmap_single(&ads->pdev->dev, ads->out.buf_phy[i],
778                                         1 << PCM_BUFFER_MAX_SIZE_ORDER,
779                                         DMA_TO_DEVICE);
780                         ads->out.buf_phy[i] = 0;
781                 }
782                 tegra_dma_free_channel(ads->out.dma_chan);
783                 ads->out.dma_chan = 0;
784         }
785
786         return rc;
787 }
788
789 static void tear_down_dma(struct audio_driver_state *ads, int mask)
790 {
791         int i;
792         pr_info("%s\n", __func__);
793
794         if (mask & TEGRA_AUDIO_ENABLE_TX) {
795                 tegra_dma_free_channel(ads->out.dma_chan);
796                 for (i = 0; i < ads->out.num_bufs; i++) {
797                         dma_unmap_single(&ads->pdev->dev, ads->out.buf_phy[i],
798                                         buf_size(&ads->out),
799                                         DMA_TO_DEVICE);
800                         ads->out.buf_phy[i] = 0;
801                 }
802         }
803         ads->out.dma_chan = NULL;
804
805         if (mask & TEGRA_AUDIO_ENABLE_RX) {
806                 tegra_dma_free_channel(ads->in.dma_chan);
807                 for (i = 0; i < ads->in.num_bufs; i++) {
808                         dma_unmap_single(&ads->pdev->dev, ads->in.buf_phy[i],
809                                         buf_size(&ads->in),
810                                         DMA_FROM_DEVICE);
811                         ads->in.buf_phy[i] = 0;
812                 }
813         }
814         ads->in.dma_chan = NULL;
815 }
816
817 static void dma_tx_complete_callback(struct tegra_dma_req *req)
818 {
819         unsigned long flags;
820         struct audio_stream *aos = req->dev;
821         unsigned req_num;
822
823         spin_lock_irqsave(&aos->dma_req_lock, flags);
824
825         req_num = req - aos->dma_req;
826         pr_debug("%s: completed buffer %d size %d\n", __func__,
827                         req_num, req->bytes_transferred);
828         BUG_ON(req_num >= aos->num_bufs);
829
830         complete(&aos->comp[req_num]);
831
832         if (!pending_buffer_requests(aos)) {
833                 pr_debug("%s: Playback underflow\n", __func__);
834                 complete(&aos->stop_completion);
835         }
836
837         spin_unlock_irqrestore(&aos->dma_req_lock, flags);
838 }
839
840 static void dma_rx_complete_callback(struct tegra_dma_req *req)
841 {
842         unsigned long flags;
843         struct audio_stream *ais = req->dev;
844         unsigned req_num;
845
846         spin_lock_irqsave(&ais->dma_req_lock, flags);
847
848         req_num = req - ais->dma_req;
849         pr_debug("%s: completed buffer %d size %d\n", __func__,
850                         req_num, req->bytes_transferred);
851         BUG_ON(req_num >= ais->num_bufs);
852
853         complete(&ais->comp[req_num]);
854
855         if (!pending_buffer_requests(ais))
856                 pr_debug("%s: Capture overflow\n", __func__);
857
858         spin_unlock_irqrestore(&ais->dma_req_lock, flags);
859 }
860
861 static void setup_dma_tx_request(struct tegra_dma_req *req,
862                 struct audio_stream *aos)
863 {
864         struct audio_driver_state *ads = ads_from_out(aos);
865
866         memset(req, 0, sizeof(*req));
867
868         req->complete = dma_tx_complete_callback;
869         req->dev = aos;
870         req->to_memory = false;
871         req->dest_addr = i2s_get_fifo_phy_base(ads->i2s_phys, I2S_FIFO_TX);
872         req->dest_wrap = 4;
873         if (ads->bit_format == TEGRA_AUDIO_BIT_FORMAT_DSP)
874                 req->dest_bus_width = ads->pdata->dsp_bus_width;
875         else
876                 req->dest_bus_width = ads->pdata->i2s_bus_width;
877         req->source_bus_width = 32;
878         req->source_wrap = 0;
879         req->req_sel = ads->dma_req_sel;
880 }
881
882 static void setup_dma_rx_request(struct tegra_dma_req *req,
883                 struct audio_stream *ais)
884 {
885         struct audio_driver_state *ads = ads_from_in(ais);
886
887         memset(req, 0, sizeof(*req));
888
889         req->complete = dma_rx_complete_callback;
890         req->dev = ais;
891         req->to_memory = true;
892         req->source_addr = i2s_get_fifo_phy_base(ads->i2s_phys, I2S_FIFO_RX);
893         req->source_wrap = 4;
894         if (ads->bit_format == TEGRA_AUDIO_BIT_FORMAT_DSP)
895                 req->source_bus_width = ads->pdata->dsp_bus_width;
896         else
897                 req->source_bus_width = ads->pdata->i2s_bus_width;
898         req->dest_bus_width = 32;
899         req->dest_wrap = 0;
900         req->req_sel = ads->dma_req_sel;
901 }
902
903 static int start_playback(struct audio_stream *aos,
904                         struct tegra_dma_req *req)
905 {
906         int rc;
907         unsigned long flags;
908         struct audio_driver_state *ads = ads_from_out(aos);
909
910         pr_debug("%s: (writing %d)\n",
911                         __func__, req->size);
912
913         spin_lock_irqsave(&aos->dma_req_lock, flags);
914 #if 0
915         i2s_fifo_clear(ads->i2s_base, I2S_FIFO_TX);
916 #endif
917         i2s_fifo_set_attention_level(ads->i2s_base,
918                         I2S_FIFO_TX, aos->i2s_fifo_atn_level);
919
920         i2s_fifo_enable(ads->i2s_base, I2S_FIFO_TX, 1);
921
922         rc = tegra_dma_enqueue_req(aos->dma_chan, req);
923         spin_unlock_irqrestore(&aos->dma_req_lock, flags);
924
925         if (rc)
926                 pr_err("%s: could not enqueue TX DMA req\n", __func__);
927         return rc;
928 }
929
930 /* Called with aos->dma_req_lock taken. */
931 static void stop_dma_playback(struct audio_stream *aos)
932 {
933         int spin = 0;
934         struct audio_driver_state *ads = ads_from_out(aos);
935         pr_debug("%s\n", __func__);
936         i2s_fifo_enable(ads->i2s_base, I2S_FIFO_TX, 0);
937         while ((i2s_get_status(ads->i2s_base) & I2S_I2S_FIFO_TX_BUSY) &&
938                         spin < 100) {
939                 udelay(10);
940                 if (spin++ > 50)
941                         pr_info("%s: spin %d\n", __func__, spin);
942         }
943         if (spin == 100)
944                 pr_warn("%s: spinny\n", __func__);
945 }
946
947 /* This function may be called from either interrupt or process context. */
948 /* Called with ais->dma_req_lock taken. */
949 static int start_dma_recording(struct audio_stream *ais, int size)
950 {
951         int i;
952         struct audio_driver_state *ads = ads_from_in(ais);
953
954         pr_debug("%s\n", __func__);
955
956         BUG_ON(pending_buffer_requests(ais));
957
958         for (i = 0; i < ais->num_bufs; i++) {
959                 init_completion(&ais->comp[i]);
960                 ais->dma_req[i].dest_addr = ais->buf_phy[i];
961                 ais->dma_req[i].size = size;
962                 tegra_dma_enqueue_req(ais->dma_chan, &ais->dma_req[i]);
963         }
964
965         ais->last_queued = ais->num_bufs - 1;
966
967 #if 0
968         i2s_fifo_clear(ads->i2s_base, I2S_FIFO_RX);
969 #endif
970         i2s_fifo_set_attention_level(ads->i2s_base,
971                         I2S_FIFO_RX, ais->i2s_fifo_atn_level);
972         i2s_fifo_enable(ads->i2s_base, I2S_FIFO_RX, 1);
973         return 0;
974 }
975
976 static void stop_dma_recording(struct audio_stream *ais)
977 {
978         int spin = 0;
979         struct audio_driver_state *ads = ads_from_in(ais);
980         pr_debug("%s\n", __func__);
981         tegra_dma_cancel(ais->dma_chan);
982         i2s_fifo_enable(ads->i2s_base, I2S_FIFO_RX, 0);
983         i2s_fifo_clear(ads->i2s_base, I2S_FIFO_RX);
984         while ((i2s_get_status(ads->i2s_base) & I2S_I2S_FIFO_RX_BUSY) &&
985                         spin < 100) {
986                 udelay(10);
987                 if (spin++ > 50)
988                         pr_info("%s: spin %d\n", __func__, spin);
989         }
990         if (spin == 100)
991                 pr_warn("%s: spinny\n", __func__);
992 }
993
994 static irqreturn_t i2s_interrupt(int irq, void *data)
995 {
996         struct audio_driver_state *ads = data;
997         u32 status = i2s_get_status(ads->i2s_base);
998
999         pr_debug("%s: %08x\n", __func__, status);
1000
1001         if (status & I2S_FIFO_ERR)
1002                 i2s_ack_status(ads->i2s_base);
1003
1004         pr_debug("%s: done %08x\n", __func__, i2s_get_status(ads->i2s_base));
1005         return IRQ_HANDLED;
1006 }
1007
1008 static ssize_t tegra_audio_write(struct file *file,
1009                 const char __user *buf, size_t size, loff_t *off)
1010 {
1011         ssize_t rc = 0;
1012         int out_buf;
1013         struct tegra_dma_req *req;
1014         struct audio_driver_state *ads = ads_from_misc_out(file);
1015
1016         mutex_lock(&ads->out.lock);
1017
1018         if (!IS_ALIGNED(size, 4) || size < 4 || size > buf_size(&ads->out)) {
1019                 pr_err("%s: invalid user size %d\n", __func__, size);
1020                 rc = -EINVAL;
1021                 goto done;
1022         }
1023
1024         pr_debug("%s: write %d bytes\n", __func__, size);
1025
1026         if (ads->out.stop) {
1027                 pr_debug("%s: playback has been cancelled\n", __func__);
1028                 goto done;
1029         }
1030
1031         /* Decide which buf is next. */
1032         out_buf = (ads->out.last_queued + 1) % ads->out.num_bufs;
1033         req = &ads->out.dma_req[out_buf];
1034
1035         /* Wait for the buffer to be emptied (complete).  The maximum timeout
1036          * value could be calculated dynamically based on buf_size(&ads->out).
1037          * For a buffer size of 16k, at 44.1kHz/stereo/16-bit PCM, you would
1038          * have ~93ms.
1039          */
1040         pr_debug("%s: waiting for buffer %d\n", __func__, out_buf);
1041         rc = wait_for_completion_interruptible_timeout(
1042                                 &ads->out.comp[out_buf], HZ);
1043         if (!rc) {
1044                 pr_err("%s: timeout", __func__);
1045                 rc = -ETIMEDOUT;
1046                 goto done;
1047         } else if (rc < 0) {
1048                 pr_err("%s: wait error %d", __func__, rc);
1049                 goto done;
1050         }
1051
1052         /* Fill the buffer and enqueue it. */
1053         pr_debug("%s: acquired buffer %d, copying data\n", __func__, out_buf);
1054         rc = copy_from_user(ads->out.buffer[out_buf], buf, size);
1055         if (rc) {
1056                 rc = -EFAULT;
1057                 goto done;
1058         }
1059
1060         prevent_suspend(&ads->out);
1061
1062         req->size = size;
1063         dma_sync_single_for_device(NULL,
1064                         req->source_addr, req->size, DMA_TO_DEVICE);
1065         ads->out.last_queued = out_buf;
1066         init_completion(&ads->out.stop_completion);
1067
1068         rc = start_playback(&ads->out, req);
1069         if (!rc)
1070                 rc = size;
1071         else
1072                 allow_suspend(&ads->out);
1073
1074 done:
1075         mutex_unlock(&ads->out.lock);
1076         return rc;
1077 }
1078
1079 static long tegra_audio_out_ioctl(struct file *file,
1080                         unsigned int cmd, unsigned long arg)
1081 {
1082         int rc = 0;
1083         struct audio_driver_state *ads = ads_from_misc_out_ctl(file);
1084         struct audio_stream *aos = &ads->out;
1085
1086         mutex_lock(&aos->lock);
1087
1088         switch (cmd) {
1089         case TEGRA_AUDIO_OUT_FLUSH:
1090                 if (pending_buffer_requests(aos)) {
1091                         pr_debug("%s: flushing\n", __func__);
1092                         request_stop_nosync(aos);
1093                         pr_debug("%s: flushed\n", __func__);
1094                 }
1095                 if (stop_playback_if_necessary(aos))
1096                         pr_debug("%s: done (stopped)\n", __func__);
1097                 aos->stop = false;
1098                 break;
1099         case TEGRA_AUDIO_OUT_SET_NUM_BUFS: {
1100                 unsigned int num;
1101                 if (copy_from_user(&num, (const void __user *)arg,
1102                                         sizeof(num))) {
1103                         rc = -EFAULT;
1104                         break;
1105                 }
1106                 if (!num || num > I2S_MAX_NUM_BUFS) {
1107                         pr_err("%s: invalid buffer count %d\n", __func__, num);
1108                         rc = -EINVAL;
1109                         break;
1110                 }
1111                 if (pending_buffer_requests(aos)) {
1112                         pr_err("%s: playback in progress\n", __func__);
1113                         rc = -EBUSY;
1114                         break;
1115                 }
1116                 rc = init_stream_buffer(aos, num);
1117                 if (rc < 0)
1118                         break;
1119                 aos->num_bufs = num;
1120                 sound_ops->tear_down(ads, TEGRA_AUDIO_ENABLE_TX);
1121                 sound_ops->setup(ads, TEGRA_AUDIO_ENABLE_TX);
1122                 pr_debug("%s: num buf set to %d\n", __func__, num);
1123         }
1124                 break;
1125         case TEGRA_AUDIO_OUT_GET_NUM_BUFS:
1126                 if (copy_to_user((void __user *)arg,
1127                                 &aos->num_bufs, sizeof(aos->num_bufs)))
1128                         rc = -EFAULT;
1129                 break;
1130         default:
1131                 rc = -EINVAL;
1132         }
1133
1134         mutex_unlock(&aos->lock);
1135         return rc;
1136 }
1137
1138 static long tegra_audio_ioctl(struct file *file,
1139                         unsigned int cmd, unsigned long arg)
1140 {
1141         int rc = 0;
1142         struct audio_driver_state *ads = ads_from_misc_ctl(file);
1143         unsigned int mode;
1144         bool dma_restart = false;
1145
1146         mutex_lock(&ads->out.lock);
1147         mutex_lock(&ads->in.lock);
1148
1149         switch (cmd) {
1150         case TEGRA_AUDIO_SET_BIT_FORMAT:
1151                 if (copy_from_user(&mode, (const void __user *)arg,
1152                                         sizeof(mode))) {
1153                         rc = -EFAULT;
1154                         goto done;
1155                 }
1156                 dma_restart = (mode != ads->bit_format);
1157                 switch (mode) {
1158                 case TEGRA_AUDIO_BIT_FORMAT_DEFAULT:
1159                         i2s_set_bit_format(ads->i2s_base, ads->pdata->mode);
1160                         ads->bit_format = mode;
1161                         break;
1162                 case TEGRA_AUDIO_BIT_FORMAT_DSP:
1163                         i2s_set_bit_format(ads->i2s_base, I2S_BIT_FORMAT_DSP);
1164                         ads->bit_format = mode;
1165                         break;
1166                 default:
1167                         pr_err("%s: Invald PCM mode %d", __func__, mode);
1168                         rc = -EINVAL;
1169                         goto done;
1170                 }
1171                 break;
1172         case TEGRA_AUDIO_GET_BIT_FORMAT:
1173                 if (copy_to_user((void __user *)arg, &ads->bit_format,
1174                                 sizeof(mode)))
1175                         rc = -EFAULT;
1176                 goto done;
1177         }
1178
1179         if (dma_restart) {
1180                 pr_debug("%s: Restarting DMA due to configuration change.\n",
1181                         __func__);
1182                 if (pending_buffer_requests(&ads->out) || ads->in.active) {
1183                         pr_err("%s: dma busy, cannot restart.\n", __func__);
1184                         rc = -EBUSY;
1185                         goto done;
1186                 }
1187                 sound_ops->tear_down(ads, ads->pdata->mask);
1188                 i2s_configure(ads->pdev);
1189                 sound_ops->setup(ads, ads->pdata->mask);
1190         }
1191
1192 done:
1193         mutex_unlock(&ads->in.lock);
1194         mutex_unlock(&ads->out.lock);
1195         return rc;
1196 }
1197
1198 static long tegra_audio_in_ioctl(struct file *file,
1199                         unsigned int cmd, unsigned long arg)
1200 {
1201         int rc = 0;
1202         struct audio_driver_state *ads = ads_from_misc_in_ctl(file);
1203         struct audio_stream *ais = &ads->in;
1204
1205         mutex_lock(&ais->lock);
1206
1207         switch (cmd) {
1208         case TEGRA_AUDIO_IN_START:
1209                 pr_debug("%s: start recording\n", __func__);
1210                 ais->stop = false;
1211                 break;
1212         case TEGRA_AUDIO_IN_STOP:
1213                 pr_debug("%s: stop recording\n", __func__);
1214                 if (ais->active) {
1215                         /* Clean up DMA/I2S, and complete the completion */
1216                         sound_ops->stop_recording(ais);
1217                         complete(&ais->stop_completion);
1218                         /* Set stop flag and allow suspend. */
1219                         request_stop_nosync(ais);
1220                 }
1221                 break;
1222         case TEGRA_AUDIO_IN_SET_CONFIG: {
1223                 struct tegra_audio_in_config cfg;
1224
1225                 if (ais->active) {
1226                         pr_err("%s: recording in progress\n", __func__);
1227                         rc = -EBUSY;
1228                         break;
1229                 }
1230                 if (copy_from_user(&cfg, (const void __user *)arg,
1231                                         sizeof(cfg))) {
1232                         rc = -EFAULT;
1233                         break;
1234                 }
1235
1236                 if (cfg.stereo && !ads->pdata->stereo_capture) {
1237                         pr_err("%s: not capable of stereo capture.",
1238                                 __func__);
1239                         rc = -EINVAL;
1240                 }
1241                 if (!rc) {
1242                         pr_info("%s: setting input sampling rate to %d, %s\n",
1243                                 __func__, cfg.rate,
1244                                 cfg.stereo ? "stereo" : "mono");
1245                         ads->in_config = cfg;
1246                         ads->in_config.stereo = !!ads->in_config.stereo;
1247                 }
1248         }
1249                 break;
1250         case TEGRA_AUDIO_IN_GET_CONFIG:
1251                 if (copy_to_user((void __user *)arg, &ads->in_config,
1252                                 sizeof(ads->in_config)))
1253                         rc = -EFAULT;
1254                 break;
1255         case TEGRA_AUDIO_IN_SET_NUM_BUFS: {
1256                 unsigned int num;
1257                 if (copy_from_user(&num, (const void __user *)arg,
1258                                         sizeof(num))) {
1259                         rc = -EFAULT;
1260                         break;
1261                 }
1262                 if (!num || num > I2S_MAX_NUM_BUFS) {
1263                         pr_err("%s: invalid buffer count %d\n", __func__,
1264                                 num);
1265                         rc = -EINVAL;
1266                         break;
1267                 }
1268                 if (ais->active || pending_buffer_requests(ais)) {
1269                         pr_err("%s: recording in progress\n", __func__);
1270                         rc = -EBUSY;
1271                         break;
1272                 }
1273                 rc = init_stream_buffer(ais, num);
1274                 if (rc < 0)
1275                         break;
1276                 ais->num_bufs = num;
1277                 sound_ops->tear_down(ads, TEGRA_AUDIO_ENABLE_RX);
1278                 sound_ops->setup(ads, TEGRA_AUDIO_ENABLE_RX);
1279         }
1280                 break;
1281         case TEGRA_AUDIO_IN_GET_NUM_BUFS:
1282                 if (copy_to_user((void __user *)arg,
1283                                 &ais->num_bufs, sizeof(ais->num_bufs)))
1284                         rc = -EFAULT;
1285                 break;
1286         default:
1287                 rc = -EINVAL;
1288         }
1289
1290         mutex_unlock(&ais->lock);
1291         return rc;
1292 }
1293
1294 static ssize_t tegra_audio_read(struct file *file, char __user *buf,
1295                         size_t size, loff_t *off)
1296 {
1297         ssize_t rc;
1298         ssize_t nr = 0;
1299         int in_buf;
1300         struct tegra_dma_req *req;
1301         struct audio_driver_state *ads = ads_from_misc_in(file);
1302
1303         mutex_lock(&ads->in.lock);
1304
1305         if (!IS_ALIGNED(size, 4) || size < 4 || size > buf_size(&ads->in)) {
1306                 pr_err("%s: invalid size %d.\n", __func__, size);
1307                 rc = -EINVAL;
1308                 goto done;
1309         }
1310
1311         pr_debug("%s: size %d\n", __func__, size);
1312
1313         /* If we want recording to stop immediately after it gets cancelled,
1314          * then we do not want to wait for the fifo to get drained.
1315          */
1316         if (ads->in.stop) {
1317                 pr_debug("%s: recording has been cancelled\n", __func__);
1318                 rc = 0;
1319                 goto done;
1320         }
1321
1322         /* This function calls prevent_suspend() internally */
1323         rc = start_recording_if_necessary(&ads->in, size);
1324         if (rc < 0 && rc != -EALREADY) {
1325                 pr_err("%s: could not start recording\n", __func__);
1326                 goto done;
1327         }
1328
1329         ads->in.active = true;
1330
1331         /* Note that when tegra_audio_read() is called for the first time (or
1332          * when all the buffers are empty), then it queues up all
1333          * ads->in.num_bufs buffers, and in_buf is set to zero below.
1334          */
1335         in_buf = (ads->in.last_queued + 1) % ads->in.num_bufs;
1336
1337         /* Wait for the buffer to be filled (complete).  The maximum timeout
1338          * value could be calculated dynamically based on buf_size(&ads->in).
1339          * For a buffer size of 16k, at 44.1kHz/stereo/16-bit PCM, you would
1340          * have ~93ms.
1341          */
1342         rc = wait_for_completion_interruptible_timeout(
1343                                 &ads->in.comp[in_buf], HZ);
1344         if (!rc) {
1345                 pr_err("%s: timeout", __func__);
1346                 rc = -ETIMEDOUT;
1347                 goto done;
1348         } else if (rc < 0) {
1349                 pr_err("%s: wait error %d", __func__, rc);
1350                 goto done;
1351         }
1352
1353         req = &ads->in.dma_req[in_buf];
1354
1355         nr = size > req->size ? req->size : size;
1356         req->size = size;
1357         dma_sync_single_for_cpu(NULL, ads->in.dma_req[in_buf].dest_addr,
1358                                 ads->in.dma_req[in_buf].size, DMA_FROM_DEVICE);
1359         rc = copy_to_user(buf, ads->in.buffer[in_buf], nr);
1360         if (rc) {
1361                 rc = -EFAULT;
1362                 goto done;
1363         }
1364
1365         init_completion(&ads->in.stop_completion);
1366
1367         ads->in.last_queued = in_buf;
1368         rc = tegra_dma_enqueue_req(ads->in.dma_chan, req);
1369         /* We've successfully enqueued this request before. */
1370         BUG_ON(rc);
1371
1372         rc = nr;
1373         *off += nr;
1374 done:
1375         mutex_unlock(&ads->in.lock);
1376         pr_debug("%s: done %d\n", __func__, rc);
1377         return rc;
1378 }
1379
1380 static int tegra_audio_out_open(struct inode *inode, struct file *file)
1381 {
1382         int rc = 0;
1383         int i;
1384         struct audio_driver_state *ads = ads_from_misc_out(file);
1385
1386         pr_debug("%s\n", __func__);
1387
1388         mutex_lock(&ads->out.lock);
1389
1390         if (ads->out.opened) {
1391                 rc = -EBUSY;
1392                 goto done;
1393         }
1394
1395         ads->out.opened = 1;
1396         ads->out.stop = false;
1397
1398         for (i = 0; i < I2S_MAX_NUM_BUFS; i++) {
1399                 init_completion(&ads->out.comp[i]);
1400                 /* TX buf rest state is unqueued, complete. */
1401                 complete(&ads->out.comp[i]);
1402         }
1403
1404 done:
1405         mutex_unlock(&ads->out.lock);
1406         return rc;
1407 }
1408
1409 static int tegra_audio_out_release(struct inode *inode, struct file *file)
1410 {
1411         struct audio_driver_state *ads = ads_from_misc_out(file);
1412
1413         pr_debug("%s\n", __func__);
1414
1415         mutex_lock(&ads->out.lock);
1416         ads->out.opened = 0;
1417         request_stop_nosync(&ads->out);
1418         if (stop_playback_if_necessary(&ads->out))
1419                 pr_debug("%s: done (stopped)\n", __func__);
1420         allow_suspend(&ads->out);
1421         mutex_unlock(&ads->out.lock);
1422         pr_debug("%s: done\n", __func__);
1423         return 0;
1424 }
1425
1426 static int tegra_audio_in_open(struct inode *inode, struct file *file)
1427 {
1428         int rc = 0;
1429         int i;
1430         struct audio_driver_state *ads = ads_from_misc_in(file);
1431
1432         pr_debug("%s\n", __func__);
1433
1434         mutex_lock(&ads->in.lock);
1435         if (ads->in.opened) {
1436                 rc = -EBUSY;
1437                 goto done;
1438         }
1439
1440         ads->in.opened = 1;
1441         ads->in.stop = false;
1442
1443         for (i = 0; i < I2S_MAX_NUM_BUFS; i++) {
1444                 init_completion(&ads->in.comp[i]);
1445                 /* RX buf rest state is unqueued, complete. */
1446                 complete(&ads->in.comp[i]);
1447         }
1448
1449 done:
1450         mutex_unlock(&ads->in.lock);
1451         return rc;
1452 }
1453
1454 static int tegra_audio_in_release(struct inode *inode, struct file *file)
1455 {
1456         struct audio_driver_state *ads = ads_from_misc_in(file);
1457
1458         pr_debug("%s\n", __func__);
1459
1460         mutex_lock(&ads->in.lock);
1461         ads->in.opened = 0;
1462         if (ads->in.active) {
1463                 sound_ops->stop_recording(&ads->in);
1464                 complete(&ads->in.stop_completion);
1465                 request_stop_nosync(&ads->in);
1466         }
1467         allow_suspend(&ads->in);
1468         mutex_unlock(&ads->in.lock);
1469         pr_debug("%s: done\n", __func__);
1470         return 0;
1471 }
1472
1473 static const struct file_operations tegra_audio_out_fops = {
1474         .owner = THIS_MODULE,
1475         .open = tegra_audio_out_open,
1476         .release = tegra_audio_out_release,
1477         .write = tegra_audio_write,
1478 };
1479
1480 static const struct file_operations tegra_audio_in_fops = {
1481         .owner = THIS_MODULE,
1482         .open = tegra_audio_in_open,
1483         .read = tegra_audio_read,
1484         .release = tegra_audio_in_release,
1485 };
1486
1487 static int tegra_audio_ctl_open(struct inode *inode, struct file *file)
1488 {
1489         return 0;
1490 }
1491
1492 static int tegra_audio_ctl_release(struct inode *inode, struct file *file)
1493 {
1494         return 0;
1495 }
1496
1497 static const struct file_operations tegra_audio_out_ctl_fops = {
1498         .owner = THIS_MODULE,
1499         .open = tegra_audio_ctl_open,
1500         .release = tegra_audio_ctl_release,
1501         .unlocked_ioctl = tegra_audio_out_ioctl,
1502 };
1503
1504 static const struct file_operations tegra_audio_in_ctl_fops = {
1505         .owner = THIS_MODULE,
1506         .open = tegra_audio_ctl_open,
1507         .release = tegra_audio_ctl_release,
1508         .unlocked_ioctl = tegra_audio_in_ioctl,
1509 };
1510
1511 static const struct file_operations tegra_audio_ctl_fops = {
1512         .owner = THIS_MODULE,
1513         .open = tegra_audio_ctl_open,
1514         .release = tegra_audio_ctl_release,
1515         .unlocked_ioctl = tegra_audio_ioctl,
1516 };
1517
1518 static int init_stream_buffer(struct audio_stream *s, int num)
1519 {
1520         int i, j;
1521         pr_debug("%s (num %d)\n", __func__,  num);
1522
1523         for (i = 0; i < num; i++) {
1524                 kfree(s->buffer[i]);
1525                 s->buffer[i] =
1526                         kmalloc((1 << PCM_BUFFER_MAX_SIZE_ORDER),
1527                                         GFP_KERNEL | GFP_DMA);
1528                 if (!s->buffer[i]) {
1529                         pr_err("%s: could not allocate buffer\n", __func__);
1530                         for (j = i - 1; j >= 0; j--) {
1531                                 kfree(s->buffer[j]);
1532                                 s->buffer[j] = 0;
1533                         }
1534                         return -ENOMEM;
1535                 }
1536         }
1537         return 0;
1538 }
1539
1540
1541 static int setup_misc_device(struct miscdevice *misc,
1542                         const struct file_operations  *fops,
1543                         const char *fmt, ...)
1544 {
1545         int rc = 0;
1546         va_list args;
1547         const int sz = 64;
1548
1549         va_start(args, fmt);
1550
1551         memset(misc, 0, sizeof(*misc));
1552         misc->minor = MISC_DYNAMIC_MINOR;
1553         misc->name  = kmalloc(sz, GFP_KERNEL);
1554         if (!misc->name) {
1555                 rc = -ENOMEM;
1556                 goto done;
1557         }
1558
1559         vsnprintf((char *)misc->name, sz, fmt, args);
1560         misc->fops = fops;
1561         if (misc_register(misc)) {
1562                 pr_err("%s: could not register %s\n", __func__, misc->name);
1563                 kfree(misc->name);
1564                 rc = -EIO;
1565                 goto done;
1566         }
1567
1568 done:
1569         va_end(args);
1570         return rc;
1571 }
1572
1573 static ssize_t dma_toggle_show(struct device *dev,
1574                                 struct device_attribute *attr,
1575                                 char *buf)
1576 {
1577         return sprintf(buf, "dma\n");
1578 }
1579
1580 static ssize_t dma_toggle_store(struct device *dev,
1581                         struct device_attribute *attr,
1582                         const char *buf, size_t count)
1583 {
1584         pr_err("%s: Not implemented.", __func__);
1585         return 0;
1586 }
1587
1588 static DEVICE_ATTR(dma_toggle, 0644, dma_toggle_show, dma_toggle_store);
1589
1590 static ssize_t __attr_fifo_atn_read(char *buf, int atn_lvl)
1591 {
1592         switch (atn_lvl) {
1593         case I2S_FIFO_ATN_LVL_ONE_SLOT:
1594                 strncpy(buf, "1\n", 2);
1595                 return 2;
1596         case I2S_FIFO_ATN_LVL_FOUR_SLOTS:
1597                 strncpy(buf, "4\n", 2);
1598                 return 2;
1599         case I2S_FIFO_ATN_LVL_EIGHT_SLOTS:
1600                 strncpy(buf, "8\n", 2);
1601                 return 2;
1602         case I2S_FIFO_ATN_LVL_TWELVE_SLOTS:
1603                 strncpy(buf, "12\n", 3);
1604                 return 3;
1605         default:
1606                 BUG_ON(1);
1607                 return -EIO;
1608         }
1609 }
1610
1611 static ssize_t __attr_fifo_atn_write(struct audio_driver_state *ads,
1612                 struct audio_stream *as,
1613                 int *fifo_lvl,
1614                 const char *buf, size_t size)
1615 {
1616         int lvl;
1617
1618         if (size > 3) {
1619                 pr_err("%s: buffer size %d too big\n", __func__, size);
1620                 return -EINVAL;
1621         }
1622
1623         if (sscanf(buf, "%d", &lvl) != 1) {
1624                 pr_err("%s: invalid input string [%s]\n", __func__, buf);
1625                 return -EINVAL;
1626         }
1627
1628         switch (lvl) {
1629         case 1:
1630                 lvl = I2S_FIFO_ATN_LVL_ONE_SLOT;
1631                 break;
1632         case 4:
1633                 lvl = I2S_FIFO_ATN_LVL_FOUR_SLOTS;
1634                 break;
1635         case 8:
1636                 lvl = I2S_FIFO_ATN_LVL_EIGHT_SLOTS;
1637                 break;
1638         case 12:
1639                 lvl = I2S_FIFO_ATN_LVL_TWELVE_SLOTS;
1640                 break;
1641         default:
1642                 pr_err("%s: invalid attention level %d\n", __func__, lvl);
1643                 return -EINVAL;
1644         }
1645
1646         *fifo_lvl = lvl;
1647         pr_info("%s: fifo level %d\n", __func__, *fifo_lvl);
1648
1649         return size;
1650 }
1651
1652 static ssize_t tx_fifo_atn_show(struct device *dev,
1653                                 struct device_attribute *attr,
1654                                 char *buf)
1655 {
1656         struct tegra_audio_platform_data *pdata = dev->platform_data;
1657         struct audio_driver_state *ads = pdata->driver_data;
1658         return __attr_fifo_atn_read(buf, ads->out.i2s_fifo_atn_level);
1659 }
1660
1661 static ssize_t tx_fifo_atn_store(struct device *dev,
1662                         struct device_attribute *attr,
1663                         const char *buf, size_t count)
1664 {
1665         ssize_t rc;
1666         struct tegra_audio_platform_data *pdata = dev->platform_data;
1667         struct audio_driver_state *ads = pdata->driver_data;
1668         mutex_lock(&ads->out.lock);
1669         if (pending_buffer_requests(&ads->out)) {
1670                 pr_err("%s: playback in progress.\n", __func__);
1671                 rc = -EBUSY;
1672                 goto done;
1673         }
1674         rc = __attr_fifo_atn_write(ads, &ads->out,
1675                         &ads->out.i2s_fifo_atn_level,
1676                         buf, count);
1677 done:
1678         mutex_unlock(&ads->out.lock);
1679         return rc;
1680 }
1681
1682 static DEVICE_ATTR(tx_fifo_atn, 0644, tx_fifo_atn_show, tx_fifo_atn_store);
1683
1684 static ssize_t rx_fifo_atn_show(struct device *dev,
1685                                 struct device_attribute *attr,
1686                                 char *buf)
1687 {
1688         struct tegra_audio_platform_data *pdata = dev->platform_data;
1689         struct audio_driver_state *ads = pdata->driver_data;
1690         return __attr_fifo_atn_read(buf, ads->in.i2s_fifo_atn_level);
1691 }
1692
1693 static ssize_t rx_fifo_atn_store(struct device *dev,
1694                         struct device_attribute *attr,
1695                         const char *buf, size_t count)
1696 {
1697         ssize_t rc;
1698         struct tegra_audio_platform_data *pdata = dev->platform_data;
1699         struct audio_driver_state *ads = pdata->driver_data;
1700         mutex_lock(&ads->in.lock);
1701         if (ads->in.active) {
1702                 pr_err("%s: recording in progress.\n", __func__);
1703                 rc = -EBUSY;
1704                 goto done;
1705         }
1706         rc = __attr_fifo_atn_write(ads, &ads->in,
1707                         &ads->in.i2s_fifo_atn_level,
1708                         buf, count);
1709 done:
1710         mutex_unlock(&ads->in.lock);
1711         return rc;
1712 }
1713
1714 static DEVICE_ATTR(rx_fifo_atn, 0644, rx_fifo_atn_show, rx_fifo_atn_store);
1715
1716 static int tegra_audio_probe(struct platform_device *pdev)
1717 {
1718         int rc, i;
1719         struct resource *res;
1720         struct clk *i2s_clk, *dap_mclk;
1721         struct audio_driver_state *state;
1722
1723         pr_info("%s\n", __func__);
1724
1725         state = kzalloc(sizeof(*state), GFP_KERNEL);
1726         if (!state)
1727                 return -ENOMEM;
1728
1729         state->pdev = pdev;
1730         state->pdata = pdev->dev.platform_data;
1731         state->pdata->driver_data = state;
1732         BUG_ON(!state->pdata);
1733
1734         if (!(state->pdata->mask &
1735                         (TEGRA_AUDIO_ENABLE_TX | TEGRA_AUDIO_ENABLE_RX))) {
1736                 dev_err(&pdev->dev, "neither tx nor rx is enabled!\n");
1737                 return -EIO;
1738         }
1739
1740         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1741         if (!res) {
1742                 dev_err(&pdev->dev, "no mem resource!\n");
1743                 return -ENODEV;
1744         }
1745
1746         if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
1747                 dev_err(&pdev->dev, "memory region already claimed!\n");
1748                 return -ENOMEM;
1749         }
1750
1751         state->i2s_phys = res->start;
1752         state->i2s_base = (unsigned long)ioremap(res->start,
1753                         res->end - res->start + 1);
1754         if (!state->i2s_base) {
1755                 dev_err(&pdev->dev, "cannot remap iomem!\n");
1756                 return -EIO;
1757         }
1758
1759         res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1760         if (!res) {
1761                 dev_err(&pdev->dev, "no dma resource!\n");
1762                 return -ENODEV;
1763         }
1764         state->dma_req_sel = res->start;
1765
1766         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1767         if (!res) {
1768                 dev_err(&pdev->dev, "no irq resource!\n");
1769                 return -ENODEV;
1770         }
1771         state->irq = res->start;
1772
1773         i2s_clk = clk_get(&pdev->dev, NULL);
1774         if (!i2s_clk) {
1775                 dev_err(&pdev->dev, "%s: could not get i2s clock\n",
1776                         __func__);
1777                 return -EIO;
1778         }
1779
1780         clk_set_rate(i2s_clk, state->pdata->i2s_clk_rate);
1781         if (clk_enable(i2s_clk)) {
1782                 dev_err(&pdev->dev, "%s: failed to enable i2s clock\n",
1783                         __func__);
1784                 return -EIO;
1785         }
1786         pr_info("%s: i2s_clk rate %ld\n", __func__, clk_get_rate(i2s_clk));
1787
1788         dap_mclk = tegra_get_clock_by_name(state->pdata->dap_clk);
1789         if (!dap_mclk) {
1790                 dev_err(&pdev->dev, "%s: could not get DAP clock\n",
1791                         __func__);
1792                 return -EIO;
1793         }
1794         clk_enable(dap_mclk);
1795
1796         rc = i2s_configure(pdev);
1797         if (rc < 0)
1798                 return rc;
1799
1800         if ((state->pdata->mask & TEGRA_AUDIO_ENABLE_TX)) {
1801                 state->out.opened = 0;
1802                 state->out.active = false;
1803                 mutex_init(&state->out.lock);
1804                 init_completion(&state->out.stop_completion);
1805                 spin_lock_init(&state->out.dma_req_lock);
1806                 state->out.dma_chan = NULL;
1807                 state->out.i2s_fifo_atn_level = I2S_FIFO_ATN_LVL_FOUR_SLOTS;
1808                 state->out.num_bufs = I2S_DEFAULT_TX_NUM_BUFS;
1809                 for (i = 0; i < I2S_MAX_NUM_BUFS; i++) {
1810                         init_completion(&state->out.comp[i]);
1811                         /* TX buf rest state is unqueued, complete. */
1812                         complete(&state->out.comp[i]);
1813                         state->out.buffer[i] = 0;
1814                         state->out.buf_phy[i] = 0;
1815                 }
1816                 state->out.last_queued = 0;
1817                 rc = init_stream_buffer(&state->out, state->out.num_bufs);
1818                 if (rc < 0)
1819                         return rc;
1820
1821                 INIT_WORK(&state->out.allow_suspend_work, allow_suspend_worker);
1822
1823                 rc = setup_misc_device(&state->misc_out,
1824                         &tegra_audio_out_fops,
1825                         "audio%d_out", state->pdev->id);
1826                 if (rc < 0)
1827                         return rc;
1828
1829                 rc = setup_misc_device(&state->misc_out_ctl,
1830                                 &tegra_audio_out_ctl_fops,
1831                                 "audio%d_out_ctl", state->pdev->id);
1832                 if (rc < 0)
1833                         return rc;
1834         }
1835
1836         if ((state->pdata->mask & TEGRA_AUDIO_ENABLE_RX)) {
1837                 state->in.opened = 0;
1838                 state->in.active = false;
1839                 mutex_init(&state->in.lock);
1840                 init_completion(&state->in.stop_completion);
1841                 spin_lock_init(&state->in.dma_req_lock);
1842                 state->in.dma_chan = NULL;
1843                 state->in.i2s_fifo_atn_level = I2S_FIFO_ATN_LVL_FOUR_SLOTS;
1844                 state->in.num_bufs = I2S_DEFAULT_RX_NUM_BUFS;
1845                 for (i = 0; i < I2S_MAX_NUM_BUFS; i++) {
1846                         init_completion(&state->in.comp[i]);
1847                         /* RX buf rest state is unqueued, complete. */
1848                         complete(&state->in.comp[i]);
1849                         state->in.buffer[i] = 0;
1850                         state->in.buf_phy[i] = 0;
1851                 }
1852                 state->in.last_queued = 0;
1853                 rc = init_stream_buffer(&state->in, state->in.num_bufs);
1854                 if (rc < 0)
1855                         return rc;
1856
1857                 INIT_WORK(&state->in.allow_suspend_work, allow_suspend_worker);
1858
1859                 rc = setup_misc_device(&state->misc_in,
1860                         &tegra_audio_in_fops,
1861                         "audio%d_in", state->pdev->id);
1862                 if (rc < 0)
1863                         return rc;
1864
1865                 rc = setup_misc_device(&state->misc_in_ctl,
1866                         &tegra_audio_in_ctl_fops,
1867                         "audio%d_in_ctl", state->pdev->id);
1868                 if (rc < 0)
1869                         return rc;
1870         }
1871
1872         if (request_irq(state->irq, i2s_interrupt,
1873                         IRQF_DISABLED, state->pdev->name, state) < 0) {
1874                 dev_err(&pdev->dev,
1875                         "%s: could not register handler for irq %d\n",
1876                         __func__, state->irq);
1877                 return -EIO;
1878         }
1879
1880         rc = setup_misc_device(&state->misc_ctl,
1881                         &tegra_audio_ctl_fops,
1882                         "audio%d_ctl", state->pdev->id);
1883         if (rc < 0)
1884                 return rc;
1885
1886         sound_ops->setup(state, state->pdata->mask);
1887
1888         rc = device_create_file(&pdev->dev, &dev_attr_dma_toggle);
1889         if (rc < 0) {
1890                 dev_err(&pdev->dev, "%s: could not create sysfs entry %s: %d\n",
1891                         __func__, dev_attr_dma_toggle.attr.name, rc);
1892                 return rc;
1893         }
1894
1895         rc = device_create_file(&pdev->dev, &dev_attr_tx_fifo_atn);
1896         if (rc < 0) {
1897                 dev_err(&pdev->dev, "%s: could not create sysfs entry %s: %d\n",
1898                         __func__, dev_attr_tx_fifo_atn.attr.name, rc);
1899                 return rc;
1900         }
1901
1902         rc = device_create_file(&pdev->dev, &dev_attr_rx_fifo_atn);
1903         if (rc < 0) {
1904                 dev_err(&pdev->dev, "%s: could not create sysfs entry %s: %d\n",
1905                         __func__, dev_attr_rx_fifo_atn.attr.name, rc);
1906                 return rc;
1907         }
1908
1909         state->in_config.rate = 11025;
1910         state->in_config.stereo = false;
1911
1912         return 0;
1913 }
1914
1915 #ifdef CONFIG_PM
1916 static int tegra_audio_suspend(struct platform_device *pdev, pm_message_t mesg)
1917 {
1918         /* dev_info(&pdev->dev, "%s\n", __func__); */
1919         return 0;
1920 }
1921
1922 static int tegra_audio_resume(struct platform_device *pdev)
1923 {
1924         return i2s_configure(pdev);
1925 }
1926 #endif /* CONFIG_PM */
1927
1928 static struct platform_driver tegra_audio_driver = {
1929         .driver = {
1930                 .name = "tegra-i2s",
1931                 .owner = THIS_MODULE,
1932         },
1933         .probe = tegra_audio_probe,
1934 #ifdef CONFIG_PM
1935         .suspend = tegra_audio_suspend,
1936         .resume = tegra_audio_resume,
1937 #endif
1938 };
1939
1940 static int __init tegra_audio_init(void)
1941 {
1942         return platform_driver_register(&tegra_audio_driver);
1943 }
1944
1945 module_init(tegra_audio_init);
1946 MODULE_LICENSE("GPL");