arm: tegra: soctherm: Fix setting hi-thresh for passive trips
[linux-2.6.git] / arch / arm / mach-tegra / tegra11_soctherm.h
1 /*
2  * arch/arm/mach-tegra/tegra11_soctherm.h
3  *
4  * Copyright (C) 2011-2013 NVIDIA Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  *
19  */
20
21 #ifndef __MACH_TEGRA_11x_SOCTHERM_H
22 #define __MACH_TEGRA_11x_SOCTHERM_H
23
24 enum soctherm_sense {
25         TSENSE_CPU0 = 0,
26         TSENSE_CPU1,
27         TSENSE_CPU2,
28         TSENSE_CPU3,
29         TSENSE_MEM0,
30         TSENSE_MEM1,
31         TSENSE_GPU,
32         TSENSE_PLLX,
33         TSENSE_SIZE,
34 };
35
36 enum soctherm_therm_id {
37         THERM_CPU = 0,
38         THERM_MEM,
39         THERM_GPU,
40         THERM_PLL,
41         THERM_SIZE,
42 };
43
44 enum soctherm_throttle_id {
45         THROTTLE_LIGHT = 0,
46         THROTTLE_HEAVY,
47         THROTTLE_SIZE,
48 };
49
50 enum soctherm_throttle_dev_id {
51         THROTTLE_DEV_CPU = 0,
52         THROTTLE_DEV_GPU,
53         THROTTLE_DEV_SIZE,
54 };
55
56 struct soctherm_sensor {
57         bool sensor_enable;
58         bool zone_enable;
59         int tall;
60         int tiddq;
61         int ten_count;
62         int tsample;
63         u8 pdiv;
64 };
65
66 struct soctherm_therm {
67         bool zone_enable;
68         int passive_delay;
69         int num_trips;
70         struct thermal_trip_info trips[THERMAL_MAX_TRIPS];
71         struct thermal_zone_params *tzp;
72 };
73
74 struct soctherm_throttle_dev {
75         bool enable;
76         u8 dividend;
77         u8 divisor;
78         u16 duration;
79         u8 step;
80 };
81
82 struct soctherm_throttle {
83         u8 priority;
84         struct soctherm_throttle_dev devs[THROTTLE_DEV_SIZE];
85 };
86
87 struct soctherm_tsensor_pmu_data {
88         u8 poweroff_reg_data;
89         u8 poweroff_reg_addr;
90         u8 reset_tegra;
91         u8 controller_type;
92         u8 i2c_controller_id;
93         u8 pinmux;
94         u8 pmu_16bit_ops;
95         u8 pmu_i2c_addr;
96 };
97
98 struct soctherm_platform_data {
99         unsigned long soctherm_clk_rate;
100         unsigned long tsensor_clk_rate;
101
102         struct soctherm_sensor sensor_data[TSENSE_SIZE];
103         struct soctherm_therm therm[THERM_SIZE];
104         struct soctherm_throttle throttle[THROTTLE_SIZE];
105         struct tegra_tsensor_pmu_data *tshut_pmu_trip_data;
106 };
107
108 #ifdef CONFIG_TEGRA_SOCTHERM
109 int __init tegra11_soctherm_init(struct soctherm_platform_data *data);
110 #else
111 static inline int tegra11_soctherm_init(struct soctherm_platform_data *data)
112 {
113         return 0;
114 }
115 #endif
116
117 #endif /* __MACH_TEGRA_11x_SOCTHERM_H */