[ARM/tegra] Add Tegra3 support
[linux-2.6.git] / arch / arm / mach-tegra / devices.c
1 /*
2  * Copyright (C) 2010,2011 Google, Inc.
3  *
4  * Author:
5  *      Colin Cross <ccross@android.com>
6  *      Erik Gilling <ccross@android.com>
7  *
8  * This software is licensed under the terms of the GNU General Public
9  * License version 2, as published by the Free Software Foundation, and
10  * may be copied, distributed, and modified under those terms.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18
19
20 #include <linux/resource.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fsl_devices.h>
24 #include <linux/serial_8250.h>
25 #include <linux/i2c-tegra.h>
26 #include <linux/platform_data/tegra_usb.h>
27 #include <asm/pmu.h>
28 #include <mach/irqs.h>
29 #include <mach/iomap.h>
30 #include <mach/dma.h>
31 #include <mach/usb_phy.h>
32 #include "gpio-names.h"
33
34 static struct resource i2c_resource1[] = {
35         [0] = {
36                 .start  = INT_I2C,
37                 .end    = INT_I2C,
38                 .flags  = IORESOURCE_IRQ,
39         },
40         [1] = {
41                 .start  = TEGRA_I2C_BASE,
42                 .end    = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
43                 .flags  = IORESOURCE_MEM,
44         },
45 };
46
47 static struct resource i2c_resource2[] = {
48         [0] = {
49                 .start  = INT_I2C2,
50                 .end    = INT_I2C2,
51                 .flags  = IORESOURCE_IRQ,
52         },
53         [1] = {
54                 .start  = TEGRA_I2C2_BASE,
55                 .end    = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
56                 .flags  = IORESOURCE_MEM,
57         },
58 };
59
60 static struct resource i2c_resource3[] = {
61         [0] = {
62                 .start  = INT_I2C3,
63                 .end    = INT_I2C3,
64                 .flags  = IORESOURCE_IRQ,
65         },
66         [1] = {
67                 .start  = TEGRA_I2C3_BASE,
68                 .end    = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
69                 .flags  = IORESOURCE_MEM,
70         },
71 };
72
73 #if defined(CONFIG_ARCH_TEGRA_2x_SOC)
74 static struct resource i2c_resource4[] = {
75         [0] = {
76                 .start  = INT_DVC,
77                 .end    = INT_DVC,
78                 .flags  = IORESOURCE_IRQ,
79         },
80         [1] = {
81                 .start  = TEGRA_DVC_BASE,
82                 .end    = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
83                 .flags  = IORESOURCE_MEM,
84         },
85 };
86
87 #elif defined(CONFIG_ARCH_TEGRA_3x_SOC)
88 static struct resource i2c_resource4[] = {
89         [0] = {
90                 .start  = INT_I2C4,
91                 .end    = INT_I2C4,
92                 .flags  = IORESOURCE_IRQ,
93         },
94         [1] = {
95                 .start  = TEGRA_I2C4_BASE,
96                 .end    = TEGRA_I2C4_BASE + TEGRA_I2C4_SIZE-1,
97                 .flags  = IORESOURCE_MEM,
98         },
99 };
100
101 static struct resource i2c_resource5[] = {
102         [0] = {
103                 .start  = INT_I2C5,
104                 .end    = INT_I2C5,
105                 .flags  = IORESOURCE_IRQ,
106         },
107         [1] = {
108                 .start  = TEGRA_I2C5_BASE,
109                 .end    = TEGRA_I2C5_BASE + TEGRA_I2C5_SIZE-1,
110                 .flags  = IORESOURCE_MEM,
111         },
112 };
113 #endif
114
115 static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
116         .bus_clk_rate   = { 400000 },
117 };
118
119 static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
120         .bus_clk_rate   = { 400000 },
121 };
122
123 static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
124         .bus_clk_rate   = { 400000 },
125 };
126
127 static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
128         .bus_clk_rate   = { 400000 },
129 };
130
131 struct platform_device tegra_i2c_device1 = {
132         .name           = "tegra-i2c",
133         .id             = 0,
134         .resource       = i2c_resource1,
135         .num_resources  = ARRAY_SIZE(i2c_resource1),
136         .dev = {
137                 .platform_data = &tegra_i2c1_platform_data,
138         },
139 };
140
141 struct platform_device tegra_i2c_device2 = {
142         .name           = "tegra-i2c",
143         .id             = 1,
144         .resource       = i2c_resource2,
145         .num_resources  = ARRAY_SIZE(i2c_resource2),
146         .dev = {
147                 .platform_data = &tegra_i2c2_platform_data,
148         },
149 };
150
151 struct platform_device tegra_i2c_device3 = {
152         .name           = "tegra-i2c",
153         .id             = 2,
154         .resource       = i2c_resource3,
155         .num_resources  = ARRAY_SIZE(i2c_resource3),
156         .dev = {
157                 .platform_data = &tegra_i2c3_platform_data,
158         },
159 };
160
161 struct platform_device tegra_i2c_device4 = {
162         .name           = "tegra-i2c",
163         .id             = 3,
164         .resource       = i2c_resource4,
165         .num_resources  = ARRAY_SIZE(i2c_resource4),
166         .dev = {
167                 .platform_data = &tegra_dvc_platform_data,
168         },
169 };
170
171 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
172 struct platform_device tegra_i2c_device5 = {
173         .name           = "tegra-i2c",
174         .id             = 4,
175         .resource       = i2c_resource5,
176         .num_resources  = ARRAY_SIZE(i2c_resource5),
177         .dev = {
178                 .platform_data = 0,
179         },
180 };
181 #endif
182
183 static struct resource spi_resource1[] = {
184         [0] = {
185                 .start  = INT_SPI_1,
186                 .end    = INT_SPI_1,
187                 .flags  = IORESOURCE_IRQ,
188         },
189         [1] = {
190                 .start  = TEGRA_SPI1_BASE,
191                 .end    = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
192                 .flags  = IORESOURCE_MEM,
193         },
194 };
195
196 static struct resource spi_resource2[] = {
197         [0] = {
198                 .start  = INT_SPI_2,
199                 .end    = INT_SPI_2,
200                 .flags  = IORESOURCE_IRQ,
201         },
202         [1] = {
203                 .start  = TEGRA_SPI2_BASE,
204                 .end    = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
205                 .flags  = IORESOURCE_MEM,
206         },
207 };
208
209 static struct resource spi_resource3[] = {
210         [0] = {
211                 .start  = INT_SPI_3,
212                 .end    = INT_SPI_3,
213                 .flags  = IORESOURCE_IRQ,
214         },
215         [1] = {
216                 .start  = TEGRA_SPI3_BASE,
217                 .end    = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
218                 .flags  = IORESOURCE_MEM,
219         },
220 };
221
222 static struct resource spi_resource4[] = {
223         [0] = {
224                 .start  = INT_SPI_4,
225                 .end    = INT_SPI_4,
226                 .flags  = IORESOURCE_IRQ,
227         },
228         [1] = {
229                 .start  = TEGRA_SPI4_BASE,
230                 .end    = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
231                 .flags  = IORESOURCE_MEM,
232         },
233 };
234
235 struct platform_device tegra_spi_device1 = {
236         .name           = "spi_tegra",
237         .id             = 0,
238         .resource       = spi_resource1,
239         .num_resources  = ARRAY_SIZE(spi_resource1),
240         .dev            = {
241                 .coherent_dma_mask      = 0xffffffff,
242         },
243 };
244
245 struct platform_device tegra_spi_device2 = {
246         .name           = "spi_tegra",
247         .id             = 1,
248         .resource       = spi_resource2,
249         .num_resources  = ARRAY_SIZE(spi_resource2),
250         .dev            = {
251                 .coherent_dma_mask      = 0xffffffff,
252         },
253 };
254
255 struct platform_device tegra_spi_device3 = {
256         .name           = "spi_tegra",
257         .id             = 2,
258         .resource       = spi_resource3,
259         .num_resources  = ARRAY_SIZE(spi_resource3),
260         .dev            = {
261                 .coherent_dma_mask      = 0xffffffff,
262         },
263 };
264
265 struct platform_device tegra_spi_device4 = {
266         .name           = "spi_tegra",
267         .id             = 3,
268         .resource       = spi_resource4,
269         .num_resources  = ARRAY_SIZE(spi_resource4),
270         .dev            = {
271                 .coherent_dma_mask      = 0xffffffff,
272         },
273 };
274
275
276 static struct resource sdhci_resource1[] = {
277         [0] = {
278                 .start  = INT_SDMMC1,
279                 .end    = INT_SDMMC1,
280                 .flags  = IORESOURCE_IRQ,
281         },
282         [1] = {
283                 .start  = TEGRA_SDMMC1_BASE,
284                 .end    = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
285                 .flags  = IORESOURCE_MEM,
286         },
287 };
288
289 static struct resource sdhci_resource2[] = {
290         [0] = {
291                 .start  = INT_SDMMC2,
292                 .end    = INT_SDMMC2,
293                 .flags  = IORESOURCE_IRQ,
294         },
295         [1] = {
296                 .start  = TEGRA_SDMMC2_BASE,
297                 .end    = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
298                 .flags  = IORESOURCE_MEM,
299         },
300 };
301
302 static struct resource sdhci_resource3[] = {
303         [0] = {
304                 .start  = INT_SDMMC3,
305                 .end    = INT_SDMMC3,
306                 .flags  = IORESOURCE_IRQ,
307         },
308         [1] = {
309                 .start  = TEGRA_SDMMC3_BASE,
310                 .end    = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
311                 .flags  = IORESOURCE_MEM,
312         },
313 };
314
315 static struct resource sdhci_resource4[] = {
316         [0] = {
317                 .start  = INT_SDMMC4,
318                 .end    = INT_SDMMC4,
319                 .flags  = IORESOURCE_IRQ,
320         },
321         [1] = {
322                 .start  = TEGRA_SDMMC4_BASE,
323                 .end    = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
324                 .flags  = IORESOURCE_MEM,
325         },
326 };
327
328 /* board files should fill in platform_data register the devices themselvs.
329  * See board-harmony.c for an example
330  */
331 struct platform_device tegra_sdhci_device1 = {
332         .name           = "sdhci-tegra",
333         .id             = 0,
334         .resource       = sdhci_resource1,
335         .num_resources  = ARRAY_SIZE(sdhci_resource1),
336 };
337
338 struct platform_device tegra_sdhci_device2 = {
339         .name           = "sdhci-tegra",
340         .id             = 1,
341         .resource       = sdhci_resource2,
342         .num_resources  = ARRAY_SIZE(sdhci_resource2),
343 };
344
345 struct platform_device tegra_sdhci_device3 = {
346         .name           = "sdhci-tegra",
347         .id             = 2,
348         .resource       = sdhci_resource3,
349         .num_resources  = ARRAY_SIZE(sdhci_resource3),
350 };
351
352 struct platform_device tegra_sdhci_device4 = {
353         .name           = "sdhci-tegra",
354         .id             = 3,
355         .resource       = sdhci_resource4,
356         .num_resources  = ARRAY_SIZE(sdhci_resource4),
357 };
358
359 static struct resource tegra_usb1_resources[] = {
360         [0] = {
361                 .start  = TEGRA_USB_BASE,
362                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
363                 .flags  = IORESOURCE_MEM,
364         },
365         [1] = {
366                 .start  = INT_USB,
367                 .end    = INT_USB,
368                 .flags  = IORESOURCE_IRQ,
369         },
370 };
371
372 static struct resource tegra_usb2_resources[] = {
373         [0] = {
374                 .start  = TEGRA_USB2_BASE,
375                 .end    = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
376                 .flags  = IORESOURCE_MEM,
377         },
378         [1] = {
379                 .start  = INT_USB2,
380                 .end    = INT_USB2,
381                 .flags  = IORESOURCE_IRQ,
382         },
383 };
384
385 static struct resource tegra_usb3_resources[] = {
386         [0] = {
387                 .start  = TEGRA_USB3_BASE,
388                 .end    = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
389                 .flags  = IORESOURCE_MEM,
390         },
391         [1] = {
392                 .start  = INT_USB3,
393                 .end    = INT_USB3,
394                 .flags  = IORESOURCE_IRQ,
395         },
396 };
397
398 static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
399         /* All existing boards use GPIO PV0 for phy reset */
400         .reset_gpio = TEGRA_GPIO_PV0,
401         .clk = "cdev2",
402 };
403
404 static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
405         .operating_mode = TEGRA_USB_OTG,
406         .power_down_on_bus_suspend = 1,
407 };
408
409 static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
410         .phy_config = &tegra_ehci2_ulpi_phy_config,
411         .operating_mode = TEGRA_USB_HOST,
412         .power_down_on_bus_suspend = 1,
413 };
414
415 static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
416         .operating_mode = TEGRA_USB_HOST,
417         .power_down_on_bus_suspend = 1,
418 };
419
420 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
421
422 struct platform_device tegra_ehci1_device = {
423         .name   = "tegra-ehci",
424         .id     = 0,
425         .dev    = {
426                 .dma_mask       = &tegra_ehci_dmamask,
427                 .coherent_dma_mask = DMA_BIT_MASK(32),
428                 .platform_data = &tegra_ehci1_pdata,
429         },
430         .resource = tegra_usb1_resources,
431         .num_resources = ARRAY_SIZE(tegra_usb1_resources),
432 };
433
434 struct platform_device tegra_ehci2_device = {
435         .name   = "tegra-ehci",
436         .id     = 1,
437         .dev    = {
438                 .dma_mask       = &tegra_ehci_dmamask,
439                 .coherent_dma_mask = DMA_BIT_MASK(32),
440                 .platform_data = &tegra_ehci2_pdata,
441         },
442         .resource = tegra_usb2_resources,
443         .num_resources = ARRAY_SIZE(tegra_usb2_resources),
444 };
445
446 struct platform_device tegra_ehci3_device = {
447         .name   = "tegra-ehci",
448         .id     = 2,
449         .dev    = {
450                 .dma_mask       = &tegra_ehci_dmamask,
451                 .coherent_dma_mask = DMA_BIT_MASK(32),
452                 .platform_data = &tegra_ehci3_pdata,
453         },
454         .resource = tegra_usb3_resources,
455         .num_resources = ARRAY_SIZE(tegra_usb3_resources),
456 };
457
458 static struct resource tegra_pmu_resources[] = {
459         [0] = {
460                 .start  = INT_CPU0_PMU_INTR,
461                 .end    = INT_CPU0_PMU_INTR,
462                 .flags  = IORESOURCE_IRQ,
463         },
464         [1] = {
465                 .start  = INT_CPU1_PMU_INTR,
466                 .end    = INT_CPU1_PMU_INTR,
467                 .flags  = IORESOURCE_IRQ,
468         },
469 #if defined(CONFIG_ARCH_TEGRA_3x_SOC)
470         [2] = {
471                 .start  = INT_CPU2_PMU_INTR,
472                 .end    = INT_CPU2_PMU_INTR,
473                 .flags  = IORESOURCE_IRQ,
474         },
475         [3] = {
476                 .start  = INT_CPU3_PMU_INTR,
477                 .end    = INT_CPU3_PMU_INTR,
478                 .flags  = IORESOURCE_IRQ,
479         },
480 #endif
481 };
482
483 struct platform_device tegra_pmu_device = {
484         .name           = "arm-pmu",
485         .id             = ARM_PMU_DEVICE_CPU,
486         .num_resources  = ARRAY_SIZE(tegra_pmu_resources),
487         .resource       = tegra_pmu_resources,
488 };
489
490 static struct resource tegra_uarta_resources[] = {
491         [0] = {
492                 .start  = TEGRA_UARTA_BASE,
493                 .end    = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
494                 .flags  = IORESOURCE_MEM,
495         },
496         [1] = {
497                 .start  = INT_UARTA,
498                 .end    = INT_UARTA,
499                 .flags  = IORESOURCE_IRQ,
500         },
501 };
502
503 static struct resource tegra_uartb_resources[] = {
504         [0] = {
505                 .start  = TEGRA_UARTB_BASE,
506                 .end    = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
507                 .flags  = IORESOURCE_MEM,
508         },
509         [1] = {
510                 .start  = INT_UARTB,
511                 .end    = INT_UARTB,
512                 .flags  = IORESOURCE_IRQ,
513         },
514 };
515
516 static struct resource tegra_uartc_resources[] = {
517         [0] = {
518                 .start  = TEGRA_UARTC_BASE,
519                 .end    = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
520                 .flags  = IORESOURCE_MEM,
521         },
522         [1] = {
523                 .start  = INT_UARTC,
524                 .end    = INT_UARTC,
525                 .flags  = IORESOURCE_IRQ,
526         },
527 };
528
529 static struct resource tegra_uartd_resources[] = {
530         [0] = {
531                 .start  = TEGRA_UARTD_BASE,
532                 .end    = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
533                 .flags  = IORESOURCE_MEM,
534         },
535         [1] = {
536                 .start  = INT_UARTD,
537                 .end    = INT_UARTD,
538                 .flags  = IORESOURCE_IRQ,
539         },
540 };
541
542 static struct resource tegra_uarte_resources[] = {
543         [0] = {
544                 .start  = TEGRA_UARTE_BASE,
545                 .end    = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
546                 .flags  = IORESOURCE_MEM,
547         },
548         [1] = {
549                 .start  = INT_UARTE,
550                 .end    = INT_UARTE,
551                 .flags  = IORESOURCE_IRQ,
552         },
553 };
554
555 struct platform_device tegra_uarta_device = {
556         .name   = "tegra_uart",
557         .id     = 0,
558         .num_resources  = ARRAY_SIZE(tegra_uarta_resources),
559         .resource       = tegra_uarta_resources,
560         .dev    = {
561                 .coherent_dma_mask      = DMA_BIT_MASK(32),
562         },
563 };
564
565 struct platform_device tegra_uartb_device = {
566         .name   = "tegra_uart",
567         .id     = 1,
568         .num_resources  = ARRAY_SIZE(tegra_uartb_resources),
569         .resource       = tegra_uartb_resources,
570         .dev    = {
571                 .coherent_dma_mask      = DMA_BIT_MASK(32),
572         },
573 };
574
575 struct platform_device tegra_uartc_device = {
576         .name   = "tegra_uart",
577         .id     = 2,
578         .num_resources  = ARRAY_SIZE(tegra_uartc_resources),
579         .resource       = tegra_uartc_resources,
580         .dev    = {
581                 .coherent_dma_mask      = DMA_BIT_MASK(32),
582         },
583 };
584
585 struct platform_device tegra_uartd_device = {
586         .name   = "tegra_uart",
587         .id     = 3,
588         .num_resources  = ARRAY_SIZE(tegra_uartd_resources),
589         .resource       = tegra_uartd_resources,
590         .dev    = {
591                 .coherent_dma_mask      = DMA_BIT_MASK(32),
592         },
593 };
594
595 struct platform_device tegra_uarte_device = {
596         .name   = "tegra_uart",
597         .id     = 4,
598         .num_resources  = ARRAY_SIZE(tegra_uarte_resources),
599         .resource       = tegra_uarte_resources,
600         .dev    = {
601                 .coherent_dma_mask      = DMA_BIT_MASK(32),
602         },
603 };
604
605 #if defined(CONFIG_ARCH_TEGRA_2x_SOC)
606 static struct resource i2s_resource1[] = {
607         [0] = {
608                 .start  = INT_I2S1,
609                 .end    = INT_I2S1,
610                 .flags  = IORESOURCE_IRQ
611         },
612         [1] = {
613                 .start  = TEGRA_DMA_REQ_SEL_I2S_1,
614                 .end    = TEGRA_DMA_REQ_SEL_I2S_1,
615                 .flags  = IORESOURCE_DMA
616         },
617         [2] = {
618                 .start  = TEGRA_I2S1_BASE,
619                 .end    = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
620                 .flags  = IORESOURCE_MEM
621         }
622 };
623
624 struct platform_device tegra_i2s_device1 = {
625         .name           = "tegra-i2s",
626         .id             = 0,
627         .resource       = i2s_resource1,
628         .num_resources  = ARRAY_SIZE(i2s_resource1),
629 };
630
631 static struct resource i2s_resource2[] = {
632         [0] = {
633                 .start  = INT_I2S2,
634                 .end    = INT_I2S2,
635                 .flags  = IORESOURCE_IRQ
636         },
637         [1] = {
638                 .start  = TEGRA_DMA_REQ_SEL_I2S2_1,
639                 .end    = TEGRA_DMA_REQ_SEL_I2S2_1,
640                 .flags  = IORESOURCE_DMA
641         },
642         [2] = {
643                 .start  = TEGRA_I2S2_BASE,
644                 .end    = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
645                 .flags  = IORESOURCE_MEM
646         }
647 };
648
649 struct platform_device tegra_i2s_device2 = {
650         .name           = "tegra-i2s",
651         .id             = 1,
652         .resource       = i2s_resource2,
653         .num_resources  = ARRAY_SIZE(i2s_resource2),
654 };
655
656 static struct resource tegra_das_resources[] = {
657         [0] = {
658                 .start = TEGRA_APB_MISC_DAS_BASE,
659                 .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
660                 .flags = IORESOURCE_MEM,
661         },
662 };
663
664 struct platform_device tegra_das_device = {
665         .name           = "tegra-das",
666         .id             = -1,
667         .num_resources  = ARRAY_SIZE(tegra_das_resources),
668         .resource       = tegra_das_resources,
669 };
670
671 struct platform_device tegra_pcm_device = {
672         .name = "tegra-pcm-audio",
673         .id = -1,
674 };
675
676
677 static struct resource spdif_resource[] = {
678         [0] = {
679                 .start  = INT_SPDIF,
680                 .end    = INT_SPDIF,
681                 .flags  = IORESOURCE_IRQ
682         },
683         [1] = {
684                 .start  = TEGRA_DMA_REQ_SEL_SPD_I,
685                 .end    = TEGRA_DMA_REQ_SEL_SPD_I,
686                 .flags  = IORESOURCE_DMA
687         },
688         [2] = {
689                 .start  = TEGRA_SPDIF_BASE,
690                 .end    = TEGRA_SPDIF_BASE + TEGRA_SPDIF_SIZE - 1,
691                 .flags  = IORESOURCE_MEM
692         }
693 };
694
695 #elif defined(CONFIG_ARCH_TEGRA_3x_SOC)
696 static struct resource audio_resource[] = {
697         [0] = {
698                 .start  = TEGRA_AUDIO_CLUSTER_BASE,
699                 .end    = TEGRA_AUDIO_CLUSTER_BASE + TEGRA_AUDIO_CLUSTER_SIZE - 1,
700                 .flags  = IORESOURCE_MEM
701         }
702 };
703
704 struct platform_device tegra_audio_device = {
705         .name           = "audio",
706         .id             = -1,
707         .resource       = audio_resource,
708         .num_resources  = ARRAY_SIZE(audio_resource),
709 };
710
711 static struct resource hda_resource[] = {
712         [0] = {
713                 .start  = INT_HDA,
714                 .end    = INT_HDA,
715                 .flags  = IORESOURCE_IRQ
716         },
717         [1] = {
718                 .start  = TEGRA_HDA_BASE,
719                 .end    = TEGRA_HDA_BASE + TEGRA_HDA_SIZE - 1,
720                 .flags  = IORESOURCE_MEM
721         }
722 };
723
724 struct platform_device tegra_hda_device = {
725         .name           = "hda",
726         .id             = -1,
727         .resource       = hda_resource,
728         .num_resources  = ARRAY_SIZE(hda_resource),
729 };
730 #endif
731
732 static struct resource w1_resources[] = {
733         [0] = {
734                 .start = INT_OWR,
735                 .end   = INT_OWR,
736                 .flags = IORESOURCE_IRQ
737         },
738         [1] = {
739                 .start = TEGRA_OWR_BASE,
740                 .end = TEGRA_OWR_BASE + TEGRA_OWR_SIZE - 1,
741                 .flags = IORESOURCE_MEM
742         }
743 };
744
745 struct platform_device tegra_w1_device = {
746         .name          = "tegra_w1",
747         .id            = -1,
748         .resource      = w1_resources,
749         .num_resources = ARRAY_SIZE(w1_resources),
750 };
751
752 static struct resource tegra_udc_resources[] = {
753         [0] = {
754                 .start  = TEGRA_USB_BASE,
755                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
756                 .flags  = IORESOURCE_MEM,
757         },
758         [1] = {
759                 .start  = INT_USB,
760                 .end    = INT_USB,
761                 .flags  = IORESOURCE_IRQ,
762         },
763 };
764
765 static u64 tegra_udc_dmamask = DMA_BIT_MASK(32);
766
767 static struct fsl_usb2_platform_data tegra_udc_pdata = {
768         .operating_mode = FSL_USB2_DR_DEVICE,
769         .phy_mode       = FSL_USB2_PHY_UTMI,
770 };
771
772 struct platform_device tegra_udc_device = {
773         .name   = "fsl-tegra-udc",
774         .id     = -1,
775         .dev    = {
776                 .dma_mask       = &tegra_udc_dmamask,
777                 .coherent_dma_mask = DMA_BIT_MASK(32),
778                 .platform_data  = &tegra_udc_pdata,
779         },
780         .resource = tegra_udc_resources,
781         .num_resources = ARRAY_SIZE(tegra_udc_resources),
782 };
783
784 static struct resource tegra_otg_resources[] = {
785         [0] = {
786                 .start  = TEGRA_USB_BASE,
787                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
788                 .flags  = IORESOURCE_MEM,
789         },
790         [1] = {
791                 .start  = INT_USB,
792                 .end    = INT_USB,
793                 .flags  = IORESOURCE_IRQ,
794         },
795 };
796
797 struct platform_device tegra_otg_device = {
798         .name           = "tegra-otg",
799         .id             = -1,
800         .resource       = tegra_otg_resources,
801         .num_resources  = ARRAY_SIZE(tegra_otg_resources),
802 };
803
804 struct platform_device tegra_spdif_device = {
805         .name           = "spdif_out",
806         .id             = -1,
807         .resource       = spdif_resource,
808         .num_resources  = ARRAY_SIZE(spdif_resource),
809 };
810
811 #if defined(CONFIG_TEGRA_IOVMM_GART)
812 static struct resource tegra_gart_resources[] = {
813         [0] = {
814                 .name   = "mc",
815                 .flags  = IORESOURCE_MEM,
816                 .start  = TEGRA_MC_BASE,
817                 .end    = TEGRA_MC_BASE + TEGRA_MC_SIZE - 1,
818         },
819         [1] = {
820                 .name   = "gart",
821                 .flags  = IORESOURCE_MEM,
822                 .start  = TEGRA_GART_BASE,
823                 .end    = TEGRA_GART_BASE + TEGRA_GART_SIZE - 1,
824         }
825 };
826
827 struct platform_device tegra_gart_device = {
828         .name           = "tegra_gart",
829         .id             = -1,
830         .num_resources  = ARRAY_SIZE(tegra_gart_resources),
831         .resource       = tegra_gart_resources
832 };
833 #endif
834
835 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
836 static struct resource tegra_smmu_resources[] = {
837         [0] = {
838                 .name   = "mc",
839                 .flags  = IORESOURCE_MEM,
840                 .start  = TEGRA_MC_BASE,
841                 .end    = TEGRA_MC_BASE + TEGRA_MC_SIZE - 1,
842         },
843         [1] = {
844                 .name   = "smmu",
845                 .flags  = IORESOURCE_MEM,
846                 .start  = TEGRA_SMMU_BASE,
847                 .end    = TEGRA_SMMU_BASE + TEGRA_SMMU_SIZE - 1,
848         }
849 };
850
851 struct platform_device tegra_smmu_device = {
852         .name           = "tegra_smmu",
853         .id             = -1,
854         .num_resources  = ARRAY_SIZE(tegra_smmu_resources),
855         .resource       = tegra_smmu_resources
856 };
857 #endif
858
859 static struct resource tegra_wdt_resources[] = {
860         [0] = {
861                 .start  = TEGRA_CLK_RESET_BASE,
862                 .end    = TEGRA_CLK_RESET_BASE + 4 - 1,
863                 .flags  = IORESOURCE_MEM,
864         },
865         [1] = {
866                 .start  = TEGRA_TMR1_BASE,
867                 .end    = TEGRA_TMR1_BASE + TEGRA_TMR1_SIZE - 1,
868                 .flags  = IORESOURCE_MEM,
869         },
870         [2] = {
871                 .start  = INT_TMR1,
872                 .end    = INT_TMR1,
873                 .flags  = IORESOURCE_IRQ,
874         },
875 };
876
877 struct platform_device tegra_wdt_device = {
878         .name           = "tegra_wdt",
879         .id             = -1,
880         .num_resources  = ARRAY_SIZE(tegra_wdt_resources),
881         .resource       = tegra_wdt_resources,
882 };
883
884 static struct resource tegra_pwfm0_resource = {
885         .start  = TEGRA_PWFM0_BASE,
886         .end    = TEGRA_PWFM0_BASE + TEGRA_PWFM0_SIZE - 1,
887         .flags  = IORESOURCE_MEM,
888 };
889
890 static struct resource tegra_pwfm1_resource = {
891         .start  = TEGRA_PWFM1_BASE,
892         .end    = TEGRA_PWFM1_BASE + TEGRA_PWFM1_SIZE - 1,
893         .flags  = IORESOURCE_MEM,
894 };
895
896 static struct resource tegra_pwfm2_resource = {
897         .start  = TEGRA_PWFM2_BASE,
898         .end    = TEGRA_PWFM2_BASE + TEGRA_PWFM2_SIZE - 1,
899         .flags  = IORESOURCE_MEM,
900 };
901
902 static struct resource tegra_pwfm3_resource = {
903         .start  = TEGRA_PWFM3_BASE,
904         .end    = TEGRA_PWFM3_BASE + TEGRA_PWFM3_SIZE - 1,
905         .flags  = IORESOURCE_MEM,
906 };
907
908 struct platform_device tegra_pwfm0_device = {
909         .name           = "tegra_pwm",
910         .id             = 0,
911         .num_resources  = 1,
912         .resource       = &tegra_pwfm0_resource,
913 };
914
915 struct platform_device tegra_pwfm1_device = {
916         .name           = "tegra_pwm",
917         .id             = 1,
918         .num_resources  = 1,
919         .resource       = &tegra_pwfm1_resource,
920 };
921
922 struct platform_device tegra_pwfm2_device = {
923         .name           = "tegra_pwm",
924         .id             = 2,
925         .num_resources  = 1,
926         .resource       = &tegra_pwfm2_resource,
927 };
928
929 struct platform_device tegra_pwfm3_device = {
930         .name           = "tegra_pwm",
931         .id             = 3,
932         .num_resources  = 1,
933         .resource       = &tegra_pwfm3_resource,
934 };
935
936 static struct resource tegra_grhost_resources[] = {
937         {
938                 .start = TEGRA_HOST1X_BASE,
939                 .end = TEGRA_HOST1X_BASE + TEGRA_HOST1X_SIZE - 1,
940                 .flags = IORESOURCE_MEM,
941         },
942         {
943                 .start = TEGRA_DISPLAY_BASE,
944                 .end = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE - 1,
945                 .flags = IORESOURCE_MEM,
946         },
947         {
948                 .start = TEGRA_DISPLAY2_BASE,
949                 .end = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
950                 .flags = IORESOURCE_MEM,
951         },
952         {
953                 .start = TEGRA_VI_BASE,
954                 .end = TEGRA_VI_BASE + TEGRA_VI_SIZE - 1,
955                 .flags = IORESOURCE_MEM,
956         },
957         {
958                 .start = TEGRA_ISP_BASE,
959                 .end = TEGRA_ISP_BASE + TEGRA_ISP_SIZE - 1,
960                 .flags = IORESOURCE_MEM,
961         },
962         {
963                 .start = TEGRA_MPE_BASE,
964                 .end = TEGRA_MPE_BASE + TEGRA_MPE_SIZE - 1,
965                 .flags = IORESOURCE_MEM,
966         },
967         {
968                 .start = INT_SYNCPT_THRESH_BASE,
969                 .end = INT_SYNCPT_THRESH_BASE + INT_SYNCPT_THRESH_NR - 1,
970                 .flags = IORESOURCE_IRQ,
971         },
972         {
973                 .start = INT_HOST1X_MPCORE_GENERAL,
974                 .end = INT_HOST1X_MPCORE_GENERAL,
975                 .flags = IORESOURCE_IRQ,
976         },
977 };
978
979 struct platform_device tegra_grhost_device = {
980         .name = "tegra_grhost",
981         .id = -1,
982         .resource = tegra_grhost_resources,
983         .num_resources = ARRAY_SIZE(tegra_grhost_resources),
984 };
985
986 static struct resource tegra_avp_resources[] = {
987         [0] = {
988                 .start  = INT_SHR_SEM_INBOX_IBF,
989                 .end    = INT_SHR_SEM_INBOX_IBF,
990                 .flags  = IORESOURCE_IRQ,
991                 .name   = "mbox_from_avp_pending",
992         },
993 };
994
995 struct platform_device tegra_avp_device = {
996         .name           = "tegra-avp",
997         .id             = -1,
998         .num_resources  = ARRAY_SIZE(tegra_avp_resources),
999         .resource       = tegra_avp_resources,
1000         .dev  = {
1001                 .coherent_dma_mask      = 0xffffffffULL,
1002         },
1003 };
1004
1005 static struct resource tegra_aes_resources[] = {
1006         {
1007                 .start  = TEGRA_VDE_BASE,
1008                 .end    = TEGRA_VDE_BASE + TEGRA_VDE_BASE - 1,
1009                 .flags  = IORESOURCE_MEM,
1010         },
1011         {
1012                 .start  = TEGRA_BSEA_BASE,
1013                 .end    = TEGRA_BSEA_BASE + TEGRA_BSEA_SIZE - 1,
1014                 .flags  = IORESOURCE_MEM,
1015         },
1016 };
1017
1018 static u64 tegra_aes_dma_mask = DMA_BIT_MASK(32);
1019
1020 struct platform_device tegra_aes_device = {
1021         .name           = "tegra-aes",
1022         .id             = -1,
1023         .resource       = tegra_aes_resources,
1024         .num_resources  = ARRAY_SIZE(tegra_aes_resources),
1025         .dev    = {
1026                 .dma_mask = &tegra_aes_dma_mask,
1027                 .coherent_dma_mask = DMA_BIT_MASK(32),
1028         },
1029 };