arm: tegra: whistler: reduce reserved fb memory
[linux-2.6.git] / arch / arm / mach-tegra / board-whistler.c
1 /*
2  * arch/arm/mach-tegra/board-whistler.c
3  *
4  * Copyright (c) 2010 - 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/gpio_scrollwheel.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <linux/mfd/max8907c.h>
38 #include <linux/memblock.h>
39 #include <linux/tegra_uart.h>
40
41 #include <mach/clk.h>
42 #include <mach/iomap.h>
43 #include <mach/irqs.h>
44 #include <mach/pinmux.h>
45 #include <mach/iomap.h>
46 #include <mach/io.h>
47 #include <mach/i2s.h>
48 #include <mach/tegra_wm8753_pdata.h>
49 #include <sound/tlv320aic326x.h>
50
51 #include <asm/mach-types.h>
52 #include <asm/mach/arch.h>
53 #include <mach/usb_phy.h>
54
55 #include "board.h"
56 #include "clock.h"
57 #include "board-whistler.h"
58 #include "devices.h"
59 #include "gpio-names.h"
60 #include "fuse.h"
61 #include "pm.h"
62 #include "board-whistler-baseband.h"
63
64 #define SZ_3M (SZ_1M + SZ_2M)
65 #define USB1_VBUS_GPIO TCA6416_GPIO_BASE
66
67 static struct plat_serial8250_port debug_uart_platform_data[] = {
68         {
69                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
70                 .mapbase        = TEGRA_UARTA_BASE,
71                 .irq            = INT_UARTA,
72                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
73                 .type           = PORT_TEGRA,
74                 .iotype         = UPIO_MEM,
75                 .regshift       = 2,
76                 .uartclk        = 216000000,
77         }, {
78                 .flags          = 0,
79         }
80 };
81
82 static struct platform_device debug_uart = {
83         .name = "serial8250",
84         .id = PLAT8250_DEV_PLATFORM,
85         .dev = {
86                 .platform_data = debug_uart_platform_data,
87         },
88 };
89 static struct platform_device *whistler_uart_devices[] __initdata = {
90         &tegra_uarta_device,
91         &tegra_uartb_device,
92         &tegra_uartc_device,
93 };
94
95 struct uart_clk_parent uart_parent_clk[] = {
96         [0] = {.name = "pll_p"},
97         [1] = {.name = "pll_m"},
98         [2] = {.name = "clk_m"},
99 };
100
101 static struct tegra_uart_platform_data whistler_uart_pdata;
102
103 static void __init uart_debug_init(void)
104 {
105         unsigned long rate;
106         struct clk *debug_uart_clk;
107         struct clk *c;
108
109         /* UARTA is the debug port. */
110         pr_info("Selecting UARTA as the debug console\n");
111         whistler_uart_devices[0] = &debug_uart;
112         debug_uart_port_base = ((struct plat_serial8250_port *)(
113                                 debug_uarta_device.dev.platform_data))->mapbase;
114         debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
115
116         /* Clock enable for the debug channel */
117         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
118                 rate = debug_uart_platform_data[0].uartclk;
119                 pr_info("The debug console clock name is %s\n",
120                                                 debug_uart_clk->name);
121                 c = tegra_get_clock_by_name("pll_p");
122                 if (IS_ERR_OR_NULL(c))
123                         pr_err("Not getting the parent clock pll_p\n");
124                 else
125                         clk_set_parent(debug_uart_clk, c);
126
127                 clk_enable(debug_uart_clk);
128                 clk_set_rate(debug_uart_clk, rate);
129         } else {
130                 pr_err("Not getting the clock %s for debug console\n",
131                                         debug_uart_clk->name);
132         }
133 }
134
135 static void __init whistler_uart_init(void)
136 {
137         int i;
138         struct clk *c;
139
140         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
141                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
142                 if (IS_ERR_OR_NULL(c)) {
143                         pr_err("Not able to get the clock for %s\n",
144                                                 uart_parent_clk[i].name);
145                         continue;
146                 }
147                 uart_parent_clk[i].parent_clk = c;
148                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
149         }
150         whistler_uart_pdata.parent_clk_list = uart_parent_clk;
151         whistler_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
152
153         tegra_uarta_device.dev.platform_data = &whistler_uart_pdata;
154         tegra_uartb_device.dev.platform_data = &whistler_uart_pdata;
155         tegra_uartc_device.dev.platform_data = &whistler_uart_pdata;
156
157         /* Register low speed only if it is selected */
158         if (!is_tegra_debug_uartport_hs())
159                 uart_debug_init();
160
161         platform_add_devices(whistler_uart_devices,
162                                 ARRAY_SIZE(whistler_uart_devices));
163 }
164
165 #ifdef CONFIG_BCM4329_RFKILL
166
167 static struct resource whistler_bcm4329_rfkill_resources[] = {
168         {
169                 .name   = "bcm4329_nshutdown_gpio",
170                 .start  = TEGRA_GPIO_PU0,
171                 .end    = TEGRA_GPIO_PU0,
172                 .flags  = IORESOURCE_IO,
173         },
174 };
175
176 static struct platform_device whistler_bcm4329_rfkill_device = {
177         .name           = "bcm4329_rfkill",
178         .id             = -1,
179         .num_resources  = ARRAY_SIZE(whistler_bcm4329_rfkill_resources),
180         .resource       = whistler_bcm4329_rfkill_resources,
181 };
182
183 static noinline void __init whistler_bt_rfkill(void)
184 {
185         platform_device_register(&whistler_bcm4329_rfkill_device);
186         return;
187 }
188 #else
189 static inline void whistler_bt_rfkill(void) { }
190 #endif
191
192 #ifdef CONFIG_BT_BLUESLEEP
193 static noinline void __init tegra_setup_bluesleep(void)
194 {
195         struct platform_device *pdev = NULL;
196         struct resource *res;
197
198         pdev = platform_device_alloc("bluesleep", 0);
199         if (!pdev) {
200                 pr_err("unable to allocate platform device for bluesleep");
201                 return;
202         }
203
204         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
205         if (!res) {
206                 pr_err("unable to allocate resource for bluesleep\n");
207                 goto err_free_dev;
208         }
209
210         res[0].name   = "gpio_host_wake";
211         res[0].start  = TEGRA_GPIO_PU6;
212         res[0].end    = TEGRA_GPIO_PU6;
213         res[0].flags  = IORESOURCE_IO;
214
215         res[1].name   = "gpio_ext_wake";
216         res[1].start  = TEGRA_GPIO_PU1;
217         res[1].end    = TEGRA_GPIO_PU1;
218         res[1].flags  = IORESOURCE_IO;
219
220         res[2].name   = "host_wake";
221         res[2].start  = gpio_to_irq(TEGRA_GPIO_PU6);
222         res[2].end    = gpio_to_irq(TEGRA_GPIO_PU6);
223         res[2].flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE;
224
225         if (platform_device_add_resources(pdev, res, 3)) {
226                 pr_err("unable to add resources to bluesleep device\n");
227                 goto err_free_res;
228         }
229
230         if (platform_device_add(pdev)) {
231                 pr_err("unable to add bluesleep device\n");
232                 goto err_free_res;
233         }
234
235         tegra_gpio_enable(TEGRA_GPIO_PU6);
236         tegra_gpio_enable(TEGRA_GPIO_PU1);
237
238         return;
239
240 err_free_res:
241         kfree(res);
242 err_free_dev:
243         platform_device_put(pdev);
244         return;
245 }
246 #else
247 static inline void tegra_setup_bluesleep(void) { }
248 #endif
249
250 static struct tegra_utmip_config utmi_phy_config[] = {
251         [0] = {
252                         .hssync_start_delay = 9,
253                         .idle_wait_delay = 17,
254                         .elastic_limit = 16,
255                         .term_range_adj = 6,
256                         .xcvr_setup = 15,
257                         .xcvr_lsfslew = 2,
258                         .xcvr_lsrslew = 2,
259                 },
260         [1] = {
261                         .hssync_start_delay = 9,
262                         .idle_wait_delay = 17,
263                         .elastic_limit = 16,
264                         .term_range_adj = 6,
265                         .xcvr_setup = 8,
266                         .xcvr_lsfslew = 2,
267                         .xcvr_lsrslew = 2,
268                 },
269 };
270
271 static struct tegra_ulpi_config ulpi_phy_config = {
272         .reset_gpio = TEGRA_GPIO_PG2,
273         .clk = "cdev2",
274 };
275
276 static __initdata struct tegra_clk_init_table whistler_clk_init_table[] = {
277         /* name         parent          rate            enabled */
278         { "pwm",        "clk_32k",      32768,          false},
279         { "kbc",        "clk_32k",      32768,          true},
280         { "sdmmc2",     "pll_p",        25000000,       false},
281         { "i2s1",       "pll_a_out0",   0,              false},
282         { "i2s2",       "pll_a_out0",   0,              false},
283         { "spdif_out",  "pll_a_out0",   0,              false},
284         { NULL,         NULL,           0,              0},
285 };
286
287 static struct tegra_i2c_platform_data whistler_i2c1_platform_data = {
288         .adapter_nr     = 0,
289         .bus_count      = 1,
290         .bus_clk_rate   = { 400000, 0 },
291         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
292         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
293         .arb_recovery = arb_lost_recovery,
294 };
295
296 static const struct tegra_pingroup_config i2c2_ddc = {
297         .pingroup       = TEGRA_PINGROUP_DDC,
298         .func           = TEGRA_MUX_I2C2,
299 };
300
301 static const struct tegra_pingroup_config i2c2_gen2 = {
302         .pingroup       = TEGRA_PINGROUP_PTA,
303         .func           = TEGRA_MUX_I2C2,
304 };
305
306 static struct tegra_i2c_platform_data whistler_i2c2_platform_data = {
307         .adapter_nr     = 1,
308         .bus_count      = 2,
309         .bus_clk_rate   = { 100000, 100000 },
310         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
311         .bus_mux_len    = { 1, 1 },
312         .scl_gpio               = {0, TEGRA_GPIO_PT5},
313         .sda_gpio               = {0, TEGRA_GPIO_PT6},
314         .arb_recovery = arb_lost_recovery,
315 };
316
317 static struct tegra_i2c_platform_data whistler_i2c3_platform_data = {
318         .adapter_nr     = 3,
319         .bus_count      = 1,
320         .bus_clk_rate   = { 400000, 0 },
321         .scl_gpio               = {TEGRA_GPIO_PBB2, 0},
322         .sda_gpio               = {TEGRA_GPIO_PBB3, 0},
323         .arb_recovery = arb_lost_recovery,
324 };
325
326 static struct tegra_i2c_platform_data whistler_dvc_platform_data = {
327         .adapter_nr     = 4,
328         .bus_count      = 1,
329         .bus_clk_rate   = { 400000, 0 },
330         .is_dvc         = true,
331         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
332         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
333         .arb_recovery = arb_lost_recovery,
334 };
335
336 static struct aic326x_pdata whistler_aic3262_pdata = {
337         /* debounce time */
338         .debounce_time_ms = 512,
339 };
340
341 static struct i2c_board_info __initdata wm8753_board_info[] = {
342         {
343                 I2C_BOARD_INFO("wm8753", 0x1a),
344                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
345         },
346         {
347                 I2C_BOARD_INFO("aic3262-codec", 0x18),
348                 .platform_data = &whistler_aic3262_pdata,
349                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
350         },
351 };
352
353 static void whistler_i2c_init(void)
354 {
355         tegra_i2c_device1.dev.platform_data = &whistler_i2c1_platform_data;
356         tegra_i2c_device2.dev.platform_data = &whistler_i2c2_platform_data;
357         tegra_i2c_device3.dev.platform_data = &whistler_i2c3_platform_data;
358         tegra_i2c_device4.dev.platform_data = &whistler_dvc_platform_data;
359
360         platform_device_register(&tegra_i2c_device4);
361         platform_device_register(&tegra_i2c_device3);
362         platform_device_register(&tegra_i2c_device2);
363         platform_device_register(&tegra_i2c_device1);
364
365         i2c_register_board_info(4, wm8753_board_info,
366                 ARRAY_SIZE(wm8753_board_info));
367 }
368
369 #define GPIO_SCROLL(_pinaction, _gpio, _desc)   \
370 {       \
371         .pinaction = GPIO_SCROLLWHEEL_PIN_##_pinaction, \
372         .gpio = TEGRA_GPIO_##_gpio,     \
373         .desc = _desc,  \
374         .active_low = 1,        \
375         .debounce_interval = 2, \
376 }
377
378 static struct gpio_scrollwheel_button scroll_keys[] = {
379         [0] = GPIO_SCROLL(ONOFF, PR3, "sw_onoff"),
380         [1] = GPIO_SCROLL(PRESS, PQ5, "sw_press"),
381         [2] = GPIO_SCROLL(ROT1, PQ3, "sw_rot1"),
382         [3] = GPIO_SCROLL(ROT2, PQ4, "sw_rot2"),
383 };
384
385 static struct gpio_scrollwheel_platform_data whistler_scroll_platform_data = {
386         .buttons = scroll_keys,
387         .nbuttons = ARRAY_SIZE(scroll_keys),
388 };
389
390 static struct platform_device whistler_scroll_device = {
391         .name   = "alps-gpio-scrollwheel",
392         .id     = 0,
393         .dev    = {
394                 .platform_data  = &whistler_scroll_platform_data,
395         },
396 };
397
398 static struct platform_device tegra_camera = {
399         .name = "tegra_camera",
400         .id = -1,
401 };
402
403 static struct tegra_wm8753_platform_data whistler_audio_pdata = {
404         .gpio_spkr_en = -1,
405         .gpio_hp_det = TEGRA_GPIO_HP_DET,
406         .gpio_hp_mute = -1,
407         .gpio_int_mic_en = -1,
408         .gpio_ext_mic_en = -1,
409         .debounce_time_hp = 200,
410 };
411
412 static struct platform_device whistler_audio_device1 = {
413         .name   = "tegra-snd-aic326x",
414         .id     = 0,
415         .dev    = {
416                 .platform_data  = &whistler_audio_pdata,
417         },
418 };
419
420 static struct platform_device whistler_audio_device2 = {
421         .name   = "tegra-snd-wm8753",
422         .id     = 0,
423         .dev    = {
424                 .platform_data  = &whistler_audio_pdata,
425         },
426 };
427
428 static struct platform_device *whistler_devices[] __initdata = {
429         &tegra_pmu_device,
430         &tegra_udc_device,
431         &tegra_gart_device,
432         &tegra_aes_device,
433         &tegra_wdt_device,
434         &tegra_avp_device,
435         &whistler_scroll_device,
436         &tegra_camera,
437         &tegra_i2s_device1,
438         &tegra_i2s_device2,
439         &tegra_spdif_device,
440         &tegra_das_device,
441         &spdif_dit_device,
442         &bluetooth_dit_device,
443         &tegra_pcm_device,
444         &whistler_audio_device1,
445         &whistler_audio_device2,
446 };
447
448 static int __init whistler_scroll_init(void)
449 {
450         int i;
451         for (i = 0; i < ARRAY_SIZE(scroll_keys); i++)
452                 tegra_gpio_enable(scroll_keys[i].gpio);
453
454         return 0;
455 }
456
457 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
458         [0] = {
459                         .instance = 0,
460                         .vbus_irq = MAX8907C_INT_BASE + MAX8907C_IRQ_VCHG_DC_R,
461                         .vbus_gpio = USB1_VBUS_GPIO,
462         },
463         [1] = {
464                         .instance = 1,
465                         .vbus_gpio = -1,
466         },
467         [2] = {
468                         .instance = 2,
469                         .vbus_gpio = -1,
470         },
471 };
472
473 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
474         [0] = {
475                         .phy_config = &utmi_phy_config[0],
476                         .operating_mode = TEGRA_USB_HOST,
477                         .power_down_on_bus_suspend = 1,
478                         .default_enable = false,
479                 },
480         [1] = {
481                         .phy_config = &ulpi_phy_config,
482                         .operating_mode = TEGRA_USB_HOST,
483                         .power_down_on_bus_suspend = 1,
484                         .default_enable = false,
485                 },
486         [2] = {
487                         .phy_config = &utmi_phy_config[1],
488                         .operating_mode = TEGRA_USB_HOST,
489                         .power_down_on_bus_suspend = 1,
490                         .default_enable = false,
491         },
492 };
493
494 static struct tegra_otg_platform_data tegra_otg_pdata = {
495         .ehci_device = &tegra_ehci1_device,
496         .ehci_pdata = &tegra_ehci_pdata[0],
497 };
498
499 static int __init whistler_gps_init(void)
500 {
501         tegra_gpio_enable(TEGRA_GPIO_PU4);
502         return 0;
503 }
504
505 static void whistler_usb_init(void)
506 {
507         tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
508
509         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
510         platform_device_register(&tegra_otg_device);
511
512 }
513
514 static void __init tegra_whistler_init(void)
515 {
516         char serial[20];
517
518         tegra_clk_init_from_table(whistler_clk_init_table);
519         whistler_pinmux_init();
520         whistler_i2c_init();
521         whistler_uart_init();
522         platform_add_devices(whistler_devices, ARRAY_SIZE(whistler_devices));
523
524         whistler_sdhci_init();
525         whistler_regulator_init();
526         whistler_panel_init();
527         whistler_sensors_init();
528         whistler_kbc_init();
529         whistler_bt_rfkill();
530         whistler_gps_init();
531         whistler_usb_init();
532         whistler_scroll_init();
533         whistler_emc_init();
534         whistler_baseband_init();
535 #ifdef CONFIG_BT_BLUESLEEP
536         tegra_setup_bluesleep();
537 #endif
538         tegra_release_bootloader_fb();
539 }
540
541 int __init tegra_whistler_protected_aperture_init(void)
542 {
543         tegra_protected_aperture_init(tegra_grhost_aperture);
544         return 0;
545 }
546
547 void __init tegra_whistler_reserve(void)
548 {
549         if (memblock_reserve(0x0, 4096) < 0)
550                 pr_warn("Cannot reserve first 4K of memory for safety\n");
551
552         tegra_reserve(SZ_160M, SZ_3M, SZ_1M);
553 }
554
555 MACHINE_START(WHISTLER, "whistler")
556         .boot_params    = 0x00000100,
557         .map_io         = tegra_map_common_io,
558         .reserve        = tegra_whistler_reserve,
559         .init_early     = tegra_init_early,
560         .init_irq       = tegra_init_irq,
561         .timer          = &tegra_timer,
562         .init_machine   = tegra_whistler_init,
563 MACHINE_END