arm: tegra: whistler/ventana: add ram console
[linux-2.6.git] / arch / arm / mach-tegra / board-whistler.c
1 /*
2  * arch/arm/mach-tegra/board-whistler.c
3  *
4  * Copyright (c) 2010 - 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/synaptics_i2c_rmi.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/gpio_scrollwheel.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <linux/mfd/max8907c.h>
38 #include <linux/memblock.h>
39 #include <linux/tegra_uart.h>
40
41 #include <mach/clk.h>
42 #include <mach/iomap.h>
43 #include <mach/irqs.h>
44 #include <mach/pinmux.h>
45 #include <mach/iomap.h>
46 #include <mach/io.h>
47 #include <mach/i2s.h>
48 #include <mach/tegra_wm8753_pdata.h>
49 #include <sound/tlv320aic326x.h>
50
51 #include <asm/mach-types.h>
52 #include <asm/mach/arch.h>
53 #include <mach/usb_phy.h>
54
55 #include "board.h"
56 #include "clock.h"
57 #include "board-whistler.h"
58 #include "devices.h"
59 #include "gpio-names.h"
60 #include "fuse.h"
61 #include "pm.h"
62 #include "board-whistler-baseband.h"
63
64 #define SZ_3M (SZ_1M + SZ_2M)
65 #define SZ_152M (SZ_128M + SZ_16M + SZ_8M)
66 #define USB1_VBUS_GPIO TCA6416_GPIO_BASE
67
68 static struct plat_serial8250_port debug_uartb_platform_data[] = {
69         {
70                 .membase        = IO_ADDRESS(TEGRA_UARTB_BASE),
71                 .mapbase        = TEGRA_UARTB_BASE,
72                 .irq            = INT_UARTB,
73                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
74                 .type           = PORT_TEGRA,
75                 .iotype         = UPIO_MEM,
76                 .regshift       = 2,
77                 .uartclk        = 216000000,
78         }, {
79                 .flags          = 0,
80         }
81 };
82
83 static struct platform_device debug_uartb = {
84         .name = "serial8250",
85         .id = PLAT8250_DEV_PLATFORM,
86         .dev = {
87                 .platform_data = debug_uartb_platform_data,
88         },
89 };
90
91 static struct plat_serial8250_port debug_uarta_platform_data[] = {
92         {
93                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
94                 .mapbase        = TEGRA_UARTA_BASE,
95                 .irq            = INT_UARTA,
96                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
97                 .type           = PORT_TEGRA,
98                 .iotype         = UPIO_MEM,
99                 .regshift       = 2,
100                 .uartclk        = 216000000,
101         }, {
102                 .flags          = 0,
103         }
104 };
105
106 static struct platform_device debug_uarta = {
107         .name = "serial8250",
108         .id = PLAT8250_DEV_PLATFORM,
109         .dev = {
110                 .platform_data = debug_uarta_platform_data,
111         },
112 };
113
114 static struct platform_device *whistler_uart_devices[] __initdata = {
115         &tegra_uarta_device,
116         &tegra_uartb_device,
117         &tegra_uartc_device,
118 };
119
120 struct uart_clk_parent uart_parent_clk[] = {
121         [0] = {.name = "pll_p"},
122         [1] = {.name = "pll_m"},
123         [2] = {.name = "clk_m"},
124 };
125
126 static struct tegra_uart_platform_data whistler_uart_pdata;
127
128 static void __init uart_debug_init(void)
129 {
130         unsigned long rate;
131         struct clk *debug_uart_clk;
132         struct clk *c;
133         int modem_id = tegra_get_modem_id();
134
135         if (modem_id == 0x1) {
136                 /* UARTB is the debug port. */
137                 pr_info("Selecting UARTB as the debug console\n");
138                 whistler_uart_devices[1] = &debug_uartb;
139                 debug_uart_clk = clk_get_sys("serial8250.0", "uartb");
140
141                 /* Clock enable for the debug channel */
142                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
143                         rate = debug_uartb_platform_data[0].uartclk;
144                         pr_info("The debug console clock name is %s\n",
145                                                 debug_uart_clk->name);
146                         c = tegra_get_clock_by_name("pll_p");
147                         if (IS_ERR_OR_NULL(c))
148                                 pr_err("Not getting the parent clock pll_p\n");
149                         else
150                                 clk_set_parent(debug_uart_clk, c);
151
152                         clk_enable(debug_uart_clk);
153                         clk_set_rate(debug_uart_clk, rate);
154                 } else {
155                         pr_err("Not getting the clock %s for debug console\n",
156                                                 debug_uart_clk->name);
157                 }
158         } else {
159                 /* UARTA is the debug port. */
160                 pr_info("Selecting UARTA as the debug console\n");
161                 whistler_uart_devices[0] = &debug_uarta;
162                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
163
164                 /* Clock enable for the debug channel */
165                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
166                         rate = debug_uarta_platform_data[0].uartclk;
167                         pr_info("The debug console clock name is %s\n",
168                                                 debug_uart_clk->name);
169                         c = tegra_get_clock_by_name("pll_p");
170                         if (IS_ERR_OR_NULL(c))
171                                 pr_err("Not getting the parent clock pll_p\n");
172                         else
173                                 clk_set_parent(debug_uart_clk, c);
174
175                         clk_enable(debug_uart_clk);
176                         clk_set_rate(debug_uart_clk, rate);
177                 } else {
178                         pr_err("Not getting the clock %s for debug console\n",
179                                                 debug_uart_clk->name);
180                 }
181         }
182 }
183
184 static void __init whistler_uart_init(void)
185 {
186         int i;
187         struct clk *c;
188
189         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
190                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
191                 if (IS_ERR_OR_NULL(c)) {
192                         pr_err("Not able to get the clock for %s\n",
193                                                 uart_parent_clk[i].name);
194                         continue;
195                 }
196                 uart_parent_clk[i].parent_clk = c;
197                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
198         }
199         whistler_uart_pdata.parent_clk_list = uart_parent_clk;
200         whistler_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
201
202         tegra_uarta_device.dev.platform_data = &whistler_uart_pdata;
203         tegra_uartb_device.dev.platform_data = &whistler_uart_pdata;
204         tegra_uartc_device.dev.platform_data = &whistler_uart_pdata;
205
206         if (!is_tegra_debug_uartport_hs())
207                 uart_debug_init();
208
209         platform_add_devices(whistler_uart_devices,
210                                 ARRAY_SIZE(whistler_uart_devices));
211 }
212
213 static struct resource whistler_bcm4329_rfkill_resources[] = {
214         {
215                 .name   = "bcm4329_nshutdown_gpio",
216                 .start  = TEGRA_GPIO_PU0,
217                 .end    = TEGRA_GPIO_PU0,
218                 .flags  = IORESOURCE_IO,
219         },
220 };
221
222 static struct platform_device whistler_bcm4329_rfkill_device = {
223         .name           = "bcm4329_rfkill",
224         .id             = -1,
225         .num_resources  = ARRAY_SIZE(whistler_bcm4329_rfkill_resources),
226         .resource       = whistler_bcm4329_rfkill_resources,
227 };
228
229 static struct resource whistler_bluesleep_resources[] = {
230         [0] = {
231                 .name = "gpio_host_wake",
232                         .start  = TEGRA_GPIO_PU6,
233                         .end    = TEGRA_GPIO_PU6,
234                         .flags  = IORESOURCE_IO,
235         },
236         [1] = {
237                 .name = "gpio_ext_wake",
238                         .start  = TEGRA_GPIO_PU1,
239                         .end    = TEGRA_GPIO_PU1,
240                         .flags  = IORESOURCE_IO,
241         },
242         [2] = {
243                 .name = "host_wake",
244                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
245                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
246                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
247         },
248 };
249
250 static struct platform_device whistler_bluesleep_device = {
251         .name           = "bluesleep",
252         .id             = -1,
253         .num_resources  = ARRAY_SIZE(whistler_bluesleep_resources),
254         .resource       = whistler_bluesleep_resources,
255 };
256
257 static void __init whistler_setup_bluesleep(void)
258 {
259         platform_device_register(&whistler_bluesleep_device);
260         tegra_gpio_enable(TEGRA_GPIO_PU6);
261         tegra_gpio_enable(TEGRA_GPIO_PU1);
262         return;
263 }
264
265 static struct tegra_utmip_config utmi_phy_config[] = {
266         [0] = {
267                         .hssync_start_delay = 9,
268                         .idle_wait_delay = 17,
269                         .elastic_limit = 16,
270                         .term_range_adj = 6,
271                         .xcvr_setup = 15,
272                         .xcvr_lsfslew = 2,
273                         .xcvr_lsrslew = 2,
274                 },
275         [1] = {
276                         .hssync_start_delay = 9,
277                         .idle_wait_delay = 17,
278                         .elastic_limit = 16,
279                         .term_range_adj = 6,
280                         .xcvr_setup = 8,
281                         .xcvr_lsfslew = 2,
282                         .xcvr_lsrslew = 2,
283                 },
284 };
285
286 static struct tegra_ulpi_config ulpi_phy_config = {
287         .reset_gpio = TEGRA_GPIO_PG2,
288         .clk = "cdev2",
289 };
290
291 static __initdata struct tegra_clk_init_table whistler_clk_init_table[] = {
292         /* name         parent          rate            enabled */
293         { "pwm",        "clk_32k",      32768,          false},
294         { "kbc",        "clk_32k",      32768,          true},
295         { "sdmmc2",     "pll_p",        25000000,       false},
296         { "i2s1",       "pll_a_out0",   0,              false},
297         { "i2s2",       "pll_a_out0",   0,              false},
298         { "spdif_out",  "pll_a_out0",   0,              false},
299         { NULL,         NULL,           0,              0},
300 };
301
302 static struct tegra_i2c_platform_data whistler_i2c1_platform_data = {
303         .adapter_nr     = 0,
304         .bus_count      = 1,
305         .bus_clk_rate   = { 400000, 0 },
306         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
307         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
308         .arb_recovery = arb_lost_recovery,
309 };
310
311 static const struct tegra_pingroup_config i2c2_ddc = {
312         .pingroup       = TEGRA_PINGROUP_DDC,
313         .func           = TEGRA_MUX_I2C2,
314 };
315
316 static const struct tegra_pingroup_config i2c2_gen2 = {
317         .pingroup       = TEGRA_PINGROUP_PTA,
318         .func           = TEGRA_MUX_I2C2,
319 };
320
321 static struct tegra_i2c_platform_data whistler_i2c2_platform_data = {
322         .adapter_nr     = 1,
323         .bus_count      = 2,
324         .bus_clk_rate   = { 100000, 100000 },
325         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
326         .bus_mux_len    = { 1, 1 },
327         .scl_gpio               = {0, TEGRA_GPIO_PT5},
328         .sda_gpio               = {0, TEGRA_GPIO_PT6},
329         .arb_recovery = arb_lost_recovery,
330 };
331
332 static struct tegra_i2c_platform_data whistler_i2c3_platform_data = {
333         .adapter_nr     = 3,
334         .bus_count      = 1,
335         .bus_clk_rate   = { 400000, 0 },
336         .scl_gpio               = {TEGRA_GPIO_PBB2, 0},
337         .sda_gpio               = {TEGRA_GPIO_PBB3, 0},
338         .arb_recovery = arb_lost_recovery,
339 };
340
341 static struct tegra_i2c_platform_data whistler_dvc_platform_data = {
342         .adapter_nr     = 4,
343         .bus_count      = 1,
344         .bus_clk_rate   = { 400000, 0 },
345         .is_dvc         = true,
346         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
347         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
348         .arb_recovery = arb_lost_recovery,
349 };
350
351 static struct aic326x_pdata whistler_aic3262_pdata = {
352         /* debounce time */
353         .debounce_time_ms = 512,
354 };
355
356 static struct i2c_board_info __initdata wm8753_board_info[] = {
357         {
358                 I2C_BOARD_INFO("wm8753", 0x1a),
359                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
360         },
361         {
362                 I2C_BOARD_INFO("aic3262-codec", 0x18),
363                 .platform_data = &whistler_aic3262_pdata,
364                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
365         },
366 };
367
368 static void whistler_i2c_init(void)
369 {
370         tegra_i2c_device1.dev.platform_data = &whistler_i2c1_platform_data;
371         tegra_i2c_device2.dev.platform_data = &whistler_i2c2_platform_data;
372         tegra_i2c_device3.dev.platform_data = &whistler_i2c3_platform_data;
373         tegra_i2c_device4.dev.platform_data = &whistler_dvc_platform_data;
374
375         platform_device_register(&tegra_i2c_device4);
376         platform_device_register(&tegra_i2c_device3);
377         platform_device_register(&tegra_i2c_device2);
378         platform_device_register(&tegra_i2c_device1);
379
380         i2c_register_board_info(4, wm8753_board_info,
381                 ARRAY_SIZE(wm8753_board_info));
382 }
383
384 #define GPIO_SCROLL(_pinaction, _gpio, _desc)   \
385 {       \
386         .pinaction = GPIO_SCROLLWHEEL_PIN_##_pinaction, \
387         .gpio = TEGRA_GPIO_##_gpio,     \
388         .desc = _desc,  \
389         .active_low = 1,        \
390         .debounce_interval = 2, \
391 }
392
393 static struct gpio_scrollwheel_button scroll_keys[] = {
394         [0] = GPIO_SCROLL(ONOFF, PR3, "sw_onoff"),
395         [1] = GPIO_SCROLL(PRESS, PQ5, "sw_press"),
396         [2] = GPIO_SCROLL(ROT1, PQ3, "sw_rot1"),
397         [3] = GPIO_SCROLL(ROT2, PQ4, "sw_rot2"),
398 };
399
400 static struct gpio_scrollwheel_platform_data whistler_scroll_platform_data = {
401         .buttons = scroll_keys,
402         .nbuttons = ARRAY_SIZE(scroll_keys),
403 };
404
405 static struct platform_device whistler_scroll_device = {
406         .name   = "alps-gpio-scrollwheel",
407         .id     = 0,
408         .dev    = {
409                 .platform_data  = &whistler_scroll_platform_data,
410         },
411 };
412
413 static struct platform_device tegra_camera = {
414         .name = "tegra_camera",
415         .id = -1,
416 };
417
418 static struct tegra_wm8753_platform_data whistler_audio_pdata = {
419         .gpio_spkr_en = -1,
420         .gpio_hp_det = TEGRA_GPIO_HP_DET,
421         .gpio_hp_mute = -1,
422         .gpio_int_mic_en = -1,
423         .gpio_ext_mic_en = -1,
424         .debounce_time_hp = 200,
425 };
426
427 static struct platform_device whistler_audio_device1 = {
428         .name   = "tegra-snd-aic326x",
429         .id     = 0,
430         .dev    = {
431                 .platform_data  = &whistler_audio_pdata,
432         },
433 };
434
435 static struct platform_device whistler_audio_device2 = {
436         .name   = "tegra-snd-wm8753",
437         .id     = 0,
438         .dev    = {
439                 .platform_data  = &whistler_audio_pdata,
440         },
441 };
442
443 static struct platform_device *whistler_devices[] __initdata = {
444         &tegra_pmu_device,
445         &tegra_udc_device,
446         &tegra_gart_device,
447         &tegra_aes_device,
448         &tegra_wdt_device,
449         &tegra_avp_device,
450         &whistler_scroll_device,
451         &tegra_camera,
452         &tegra_i2s_device1,
453         &tegra_i2s_device2,
454         &tegra_spdif_device,
455         &tegra_das_device,
456         &spdif_dit_device,
457         &bluetooth_dit_device,
458         &baseband_dit_device,
459         &whistler_bcm4329_rfkill_device,
460         &tegra_pcm_device,
461         &whistler_audio_device1,
462         &whistler_audio_device2,
463 };
464
465 static struct synaptics_i2c_rmi_platform_data synaptics_pdata = {
466         .flags          = SYNAPTICS_FLIP_X | SYNAPTICS_FLIP_Y | SYNAPTICS_SWAP_XY,
467         .irqflags       = IRQF_TRIGGER_LOW,
468 };
469
470 static const struct i2c_board_info whistler_i2c_touch_info[] = {
471         {
472                 I2C_BOARD_INFO("synaptics-rmi-ts", 0x20),
473                 .irq            = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PC6),
474                 .platform_data  = &synaptics_pdata,
475         },
476 };
477
478 static int __init whistler_touch_init(void)
479 {
480         tegra_gpio_enable(TEGRA_GPIO_PC6);
481         i2c_register_board_info(0, whistler_i2c_touch_info, 1);
482
483         return 0;
484 }
485
486 static int __init whistler_scroll_init(void)
487 {
488         int i;
489         for (i = 0; i < ARRAY_SIZE(scroll_keys); i++)
490                 tegra_gpio_enable(scroll_keys[i].gpio);
491
492         return 0;
493 }
494
495 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
496         [0] = {
497                         .instance = 0,
498                         .vbus_irq = MAX8907C_INT_BASE + MAX8907C_IRQ_VCHG_DC_R,
499                         .vbus_gpio = USB1_VBUS_GPIO,
500         },
501         [1] = {
502                         .instance = 1,
503                         .vbus_gpio = -1,
504         },
505         [2] = {
506                         .instance = 2,
507                         .vbus_gpio = -1,
508         },
509 };
510
511 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
512         [0] = {
513                         .phy_config = &utmi_phy_config[0],
514                         .operating_mode = TEGRA_USB_HOST,
515                         .power_down_on_bus_suspend = 1,
516                         .default_enable = false,
517                 },
518         [1] = {
519                         .phy_config = &ulpi_phy_config,
520                         .operating_mode = TEGRA_USB_HOST,
521                         .power_down_on_bus_suspend = 1,
522                         .default_enable = false,
523                 },
524         [2] = {
525                         .phy_config = &utmi_phy_config[1],
526                         .operating_mode = TEGRA_USB_HOST,
527                         .power_down_on_bus_suspend = 1,
528                         .default_enable = false,
529         },
530 };
531
532 static struct tegra_otg_platform_data tegra_otg_pdata = {
533         .ehci_device = &tegra_ehci1_device,
534         .ehci_pdata = &tegra_ehci_pdata[0],
535 };
536
537 static int __init whistler_gps_init(void)
538 {
539         tegra_gpio_enable(TEGRA_GPIO_PU4);
540         return 0;
541 }
542
543 static void whistler_usb_init(void)
544 {
545         tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
546
547         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
548         platform_device_register(&tegra_otg_device);
549
550 }
551
552 static void __init tegra_whistler_init(void)
553 {
554         int modem_id = tegra_get_modem_id();
555         tegra_clk_init_from_table(whistler_clk_init_table);
556         whistler_pinmux_init();
557         whistler_i2c_init();
558         whistler_uart_init();
559         platform_add_devices(whistler_devices, ARRAY_SIZE(whistler_devices));
560         tegra_ram_console_debug_init();
561         whistler_sdhci_init();
562         whistler_regulator_init();
563         whistler_panel_init();
564         whistler_sensors_init();
565         whistler_touch_init();
566         whistler_kbc_init();
567         whistler_gps_init();
568         whistler_usb_init();
569         whistler_scroll_init();
570         whistler_emc_init();
571         if (modem_id == 0x1)
572                 whistler_baseband_init();
573         whistler_setup_bluesleep();
574         tegra_release_bootloader_fb();
575 }
576
577 int __init tegra_whistler_protected_aperture_init(void)
578 {
579         tegra_protected_aperture_init(tegra_grhost_aperture);
580         return 0;
581 }
582
583 void __init tegra_whistler_reserve(void)
584 {
585         if (memblock_reserve(0x0, 4096) < 0)
586                 pr_warn("Cannot reserve first 4K of memory for safety\n");
587
588         tegra_reserve(SZ_152M, SZ_3M, SZ_1M);
589         tegra_ram_console_debug_reserve(SZ_1M);
590 }
591
592 MACHINE_START(WHISTLER, "whistler")
593         .boot_params    = 0x00000100,
594         .map_io         = tegra_map_common_io,
595         .reserve        = tegra_whistler_reserve,
596         .init_early     = tegra_init_early,
597         .init_irq       = tegra_init_irq,
598         .timer          = &tegra_timer,
599         .init_machine   = tegra_whistler_init,
600 MACHINE_END