9a5189fbf05777317a78c4ad39335827ecd3aa2f
[linux-2.6.git] / arch / arm / mach-tegra / board-roth.c
1 /*
2  * arch/arm/mach-tegra/board-roth.c
3  *
4  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/rm31080a_ts.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/memblock.h>
38 #include <linux/spi-tegra.h>
39 #include <linux/rfkill-gpio.h>
40 #include <linux/skbuff.h>
41 #include <linux/ti_wilink_st.h>
42 #include <linux/regulator/consumer.h>
43 #include <linux/max17048_battery.h>
44 #include <linux/leds.h>
45 #include <linux/i2c/at24.h>
46 #include <linux/of_platform.h>
47
48 #include <asm/hardware/gic.h>
49
50 #include <mach/clk.h>
51 #include <mach/iomap.h>
52 #include <mach/irqs.h>
53 #include <mach/pinmux.h>
54 #include <mach/pinmux-tegra30.h>
55 #include <mach/iomap.h>
56 #include <mach/io.h>
57 #include <mach/io_dpd.h>
58 #include <mach/i2s.h>
59 #include <mach/tegra_asoc_pdata.h>
60 #include <asm/mach-types.h>
61 #include <asm/mach/arch.h>
62 #include <mach/usb_phy.h>
63 #include <mach/gpio-tegra.h>
64 #include <mach/tegra_fiq_debugger.h>
65 #include <mach/edp.h>
66
67 #include "board-touch-raydium.h"
68 #include "board.h"
69 #include "board-common.h"
70 #include "clock.h"
71 #include "board-roth.h"
72 #include "devices.h"
73 #include "gpio-names.h"
74 #include "fuse.h"
75 #include "pm.h"
76 #include "common.h"
77 #include "tegra-board-id.h"
78
79 static struct rfkill_gpio_platform_data roth_bt_rfkill_pdata = {
80                 .name           = "bt_rfkill",
81                 .shutdown_gpio  = TEGRA_GPIO_PQ7,
82                 .type           = RFKILL_TYPE_BLUETOOTH,
83 };
84
85 static struct platform_device roth_bt_rfkill_device = {
86         .name = "rfkill_gpio",
87         .id             = -1,
88         .dev = {
89                 .platform_data = &roth_bt_rfkill_pdata,
90         },
91 };
92
93 static struct resource roth_bluesleep_resources[] = {
94         [0] = {
95                 .name = "gpio_host_wake",
96                         .start  = TEGRA_GPIO_PU6,
97                         .end    = TEGRA_GPIO_PU6,
98                         .flags  = IORESOURCE_IO,
99         },
100         [1] = {
101                 .name = "gpio_ext_wake",
102                         .start  = TEGRA_GPIO_PEE1,
103                         .end    = TEGRA_GPIO_PEE1,
104                         .flags  = IORESOURCE_IO,
105         },
106         [2] = {
107                 .name = "host_wake",
108                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
109         },
110 };
111
112 static struct platform_device roth_bluesleep_device = {
113         .name           = "bluesleep",
114         .id             = -1,
115         .num_resources  = ARRAY_SIZE(roth_bluesleep_resources),
116         .resource       = roth_bluesleep_resources,
117 };
118
119 static noinline void __init roth_setup_bt_rfkill(void)
120 {
121         if ((tegra_get_commchip_id() == COMMCHIP_BROADCOM_BCM43241) ||
122                 (tegra_get_commchip_id() == COMMCHIP_DEFAULT))
123                 roth_bt_rfkill_pdata.reset_gpio = TEGRA_GPIO_INVALID;
124         else
125                 roth_bt_rfkill_pdata.reset_gpio = TEGRA_GPIO_PQ6;
126         platform_device_register(&roth_bt_rfkill_device);
127 }
128
129 static noinline void __init roth_setup_bluesleep(void)
130 {
131         roth_bluesleep_resources[2].start =
132                 roth_bluesleep_resources[2].end =
133                         gpio_to_irq(TEGRA_GPIO_PU6);
134         platform_device_register(&roth_bluesleep_device);
135         return;
136 }
137 static __initdata struct tegra_clk_init_table roth_clk_init_table[] = {
138         /* name         parent          rate            enabled */
139         { "pll_m",      NULL,           0,              false},
140         { "hda",        "pll_p",        108000000,      false},
141         { "hda2codec_2x", "pll_p",      48000000,       false},
142         { "pwm",        "pll_p",        3187500,        false},
143         { "blink",      "clk_32k",      32768,          true},
144         { "i2s1",       "pll_a_out0",   0,              false},
145         { "i2s3",       "pll_a_out0",   0,              false},
146         { "i2s4",       "pll_a_out0",   0,              false},
147         { "spdif_out",  "pll_a_out0",   0,              false},
148         { "d_audio",    "clk_m",        12000000,       false},
149         { "dam0",       "clk_m",        12000000,       false},
150         { "dam1",       "clk_m",        12000000,       false},
151         { "dam2",       "clk_m",        12000000,       false},
152         { "audio1",     "i2s1_sync",    0,              false},
153         { "audio3",     "i2s3_sync",    0,              false},
154         /* Setting vi_sensor-clk to true for validation purpose, will imapact
155          * power, later set to be false.*/
156         { "vi_sensor",  "pll_p",        150000000,      false},
157         { "cilab",      "pll_p",        150000000,      false},
158         { "cilcd",      "pll_p",        150000000,      false},
159         { "cile",       "pll_p",        150000000,      false},
160         { "i2c1",       "pll_p",        3200000,        false},
161         { "i2c2",       "pll_p",        3200000,        false},
162         { "i2c3",       "pll_p",        3200000,        false},
163         { "i2c4",       "pll_p",        3200000,        false},
164         { "i2c5",       "pll_p",        3200000,        false},
165         { NULL,         NULL,           0,              0},
166 };
167
168 static struct tegra_i2c_platform_data roth_i2c1_platform_data = {
169         .adapter_nr     = 0,
170         .bus_count      = 1,
171         .bus_clk_rate   = { 100000, 0 },
172         .scl_gpio               = {TEGRA_GPIO_I2C1_SCL, 0},
173         .sda_gpio               = {TEGRA_GPIO_I2C1_SDA, 0},
174         .arb_recovery = arb_lost_recovery,
175 };
176
177 static struct tegra_i2c_platform_data roth_i2c2_platform_data = {
178         .adapter_nr     = 1,
179         .bus_count      = 1,
180         .bus_clk_rate   = { 100000, 0 },
181         .is_clkon_always = true,
182         .scl_gpio               = {TEGRA_GPIO_I2C2_SCL, 0},
183         .sda_gpio               = {TEGRA_GPIO_I2C2_SDA, 0},
184         .arb_recovery = arb_lost_recovery,
185 };
186
187 static struct tegra_i2c_platform_data roth_i2c3_platform_data = {
188         .adapter_nr     = 2,
189         .bus_count      = 1,
190         .bus_clk_rate   = { 100000, 0 },
191         .scl_gpio               = {TEGRA_GPIO_I2C3_SCL, 0},
192         .sda_gpio               = {TEGRA_GPIO_I2C3_SDA, 0},
193         .arb_recovery = arb_lost_recovery,
194 };
195
196 static struct tegra_i2c_platform_data roth_i2c4_platform_data = {
197         .adapter_nr     = 3,
198         .bus_count      = 1,
199         .bus_clk_rate   = { 10000, 0 },
200         .scl_gpio               = {TEGRA_GPIO_I2C4_SCL, 0},
201         .sda_gpio               = {TEGRA_GPIO_I2C4_SDA, 0},
202         .arb_recovery = arb_lost_recovery,
203 };
204
205 static struct tegra_i2c_platform_data roth_i2c5_platform_data = {
206         .adapter_nr     = 4,
207         .bus_count      = 1,
208         .bus_clk_rate   = { 400000, 0 },
209         .scl_gpio               = {TEGRA_GPIO_I2C5_SCL, 0},
210         .sda_gpio               = {TEGRA_GPIO_I2C5_SDA, 0},
211         .arb_recovery = arb_lost_recovery,
212 };
213
214 #if defined(CONFIG_ARCH_TEGRA_11x_SOC)
215 static struct i2c_board_info __initdata rt5640_board_info = {
216         I2C_BOARD_INFO("rt5640", 0x1c),
217 };
218 #endif
219
220 static void roth_i2c_init(void)
221 {
222         tegra11_i2c_device1.dev.platform_data = &roth_i2c1_platform_data;
223         tegra11_i2c_device2.dev.platform_data = &roth_i2c2_platform_data;
224         tegra11_i2c_device3.dev.platform_data = &roth_i2c3_platform_data;
225         tegra11_i2c_device4.dev.platform_data = &roth_i2c4_platform_data;
226         tegra11_i2c_device5.dev.platform_data = &roth_i2c5_platform_data;
227
228         platform_device_register(&tegra11_i2c_device5);
229         platform_device_register(&tegra11_i2c_device4);
230         platform_device_register(&tegra11_i2c_device3);
231         platform_device_register(&tegra11_i2c_device2);
232         platform_device_register(&tegra11_i2c_device1);
233
234         i2c_register_board_info(0, &rt5640_board_info, 1);
235 }
236
237 static struct platform_device *roth_uart_devices[] __initdata = {
238         &tegra_uarta_device,
239         &tegra_uartb_device,
240         &tegra_uartc_device,
241         &tegra_uartd_device,
242 };
243 static struct uart_clk_parent uart_parent_clk[] = {
244         [0] = {.name = "clk_m"},
245         [1] = {.name = "pll_p"},
246 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
247         [2] = {.name = "pll_m"},
248 #endif
249 };
250
251 static struct tegra_uart_platform_data roth_uart_pdata;
252 static struct tegra_uart_platform_data roth_loopback_uart_pdata;
253
254 static void __init uart_debug_init(void)
255 {
256         int debug_port_id;
257
258         debug_port_id = uart_console_debug_init(3);
259         if (debug_port_id < 0)
260                 return;
261
262         roth_uart_devices[debug_port_id] = uart_console_debug_device;
263 }
264
265 static void __init roth_uart_init(void)
266 {
267         struct clk *c;
268         int i;
269
270         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
271                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
272                 if (IS_ERR_OR_NULL(c)) {
273                         pr_err("Not able to get the clock for %s\n",
274                                                 uart_parent_clk[i].name);
275                         continue;
276                 }
277                 uart_parent_clk[i].parent_clk = c;
278                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
279         }
280         roth_uart_pdata.parent_clk_list = uart_parent_clk;
281         roth_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
282         roth_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
283         roth_loopback_uart_pdata.parent_clk_count =
284                                                 ARRAY_SIZE(uart_parent_clk);
285         roth_loopback_uart_pdata.is_loopback = true;
286         tegra_uarta_device.dev.platform_data = &roth_uart_pdata;
287         tegra_uartb_device.dev.platform_data = &roth_uart_pdata;
288         tegra_uartc_device.dev.platform_data = &roth_uart_pdata;
289         tegra_uartd_device.dev.platform_data = &roth_uart_pdata;
290
291         /* Register low speed only if it is selected */
292         if (!is_tegra_debug_uartport_hs())
293                 uart_debug_init();
294
295         platform_add_devices(roth_uart_devices,
296                                 ARRAY_SIZE(roth_uart_devices));
297 }
298
299 static struct resource tegra_rtc_resources[] = {
300         [0] = {
301                 .start = TEGRA_RTC_BASE,
302                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
303                 .flags = IORESOURCE_MEM,
304         },
305         [1] = {
306                 .start = INT_RTC,
307                 .end = INT_RTC,
308                 .flags = IORESOURCE_IRQ,
309         },
310 };
311
312 static struct platform_device tegra_rtc_device = {
313         .name = "tegra_rtc",
314         .id   = -1,
315         .resource = tegra_rtc_resources,
316         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
317 };
318
319 static struct tegra_asoc_platform_data roth_audio_pdata = {
320         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
321         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
322         .gpio_hp_mute           = -1,
323         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
324         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
325         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
326         .gpio_codec1 = TEGRA_GPIO_CODEC1_EN,
327         .gpio_codec2 = TEGRA_GPIO_CODEC2_EN,
328         .gpio_codec3 = TEGRA_GPIO_CODEC3_EN,
329         .i2s_param[HIFI_CODEC]  = {
330                 .audio_port_id  = 1,
331                 .is_i2s_master  = 1,
332                 .i2s_mode       = TEGRA_DAIFMT_I2S,
333         },
334         .i2s_param[BT_SCO]      = {
335                 .audio_port_id  = 3,
336                 .is_i2s_master  = 1,
337                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
338         },
339 };
340
341 static struct platform_device roth_audio_device = {
342         .name   = "tegra-snd-rt5640",
343         .id     = 0,
344         .dev    = {
345                 .platform_data = &roth_audio_pdata,
346         },
347 };
348
349 static struct platform_device tegra_camera = {
350         .name = "tegra_camera",
351         .id = -1,
352 };
353
354 static struct platform_device *roth_devices[] __initdata = {
355         &tegra_pmu_device,
356         &tegra_rtc_device,
357         &tegra_udc_device,
358 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
359         &tegra_smmu_device,
360 #endif
361 #if defined(CONFIG_TEGRA_AVP)
362         &tegra_avp_device,
363 #endif
364         &tegra_camera,
365 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
366         &tegra11_se_device,
367 #endif
368         &tegra_ahub_device,
369         &tegra_dam_device0,
370         &tegra_dam_device1,
371         &tegra_dam_device2,
372         &tegra_i2s_device1,
373         &tegra_i2s_device3,
374         &tegra_i2s_device4,
375         &tegra_spdif_device,
376         &spdif_dit_device,
377         &bluetooth_dit_device,
378         &tegra_pcm_device,
379         &roth_audio_device,
380         &tegra_hda_device,
381 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
382         &tegra_aes_device,
383 #endif
384 };
385
386 #ifdef CONFIG_USB_SUPPORT
387 static struct tegra_usb_platform_data tegra_udc_pdata = {
388         .port_otg = true,
389         .has_hostpc = true,
390         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
391         .op_mode = TEGRA_USB_OPMODE_DEVICE,
392         .u_data.dev = {
393                 .vbus_pmu_irq = 0,
394                 .vbus_gpio = -1,
395                 .charging_supported = false,
396                 .remote_wakeup_supported = false,
397         },
398         .u_cfg.utmi = {
399                 .hssync_start_delay = 0,
400                 .elastic_limit = 16,
401                 .idle_wait_delay = 17,
402                 .term_range_adj = 6,
403                 .xcvr_setup = 8,
404                 .xcvr_lsfslew = 2,
405                 .xcvr_lsrslew = 2,
406                 .xcvr_setup_offset = 0,
407                 .xcvr_use_fuses = 1,
408         },
409 };
410
411 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
412         .port_otg = true,
413         .has_hostpc = true,
414         .unaligned_dma_buf_supported = false,
415         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
416         .op_mode = TEGRA_USB_OPMODE_HOST,
417         .u_data.host = {
418                 .vbus_gpio = -1,
419                 .hot_plug = true,
420                 .remote_wakeup_supported = true,
421                 .power_off_on_suspend = true,
422         },
423         .u_cfg.utmi = {
424                 .hssync_start_delay = 0,
425                 .elastic_limit = 16,
426                 .idle_wait_delay = 17,
427                 .term_range_adj = 6,
428                 .xcvr_setup = 15,
429                 .xcvr_lsfslew = 2,
430                 .xcvr_lsrslew = 2,
431                 .xcvr_setup_offset = 0,
432                 .xcvr_use_fuses = 1,
433         },
434 };
435
436 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
437         .port_otg = false,
438         .has_hostpc = true,
439         .unaligned_dma_buf_supported = false,
440         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
441         .op_mode = TEGRA_USB_OPMODE_HOST,
442         .u_data.host = {
443                 .vbus_gpio = -1,
444                 .hot_plug = true,
445                 .remote_wakeup_supported = true,
446                 .power_off_on_suspend = true,
447         },
448         .u_cfg.utmi = {
449         .hssync_start_delay = 0,
450                 .elastic_limit = 16,
451                 .idle_wait_delay = 17,
452                 .term_range_adj = 6,
453                 .xcvr_setup = 8,
454                 .xcvr_lsfslew = 2,
455                 .xcvr_lsrslew = 2,
456                 .xcvr_setup_offset = 0,
457                 .xcvr_use_fuses = 1,
458         },
459 };
460
461 static struct tegra_usb_otg_data tegra_otg_pdata = {
462         .ehci_device = &tegra_ehci1_device,
463         .ehci_pdata = &tegra_ehci1_utmi_pdata,
464 };
465
466 static void roth_usb_init(void)
467 {
468         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
469         platform_device_register(&tegra_otg_device);
470
471         /* Setup the udc platform data */
472         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
473
474         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
475         platform_device_register(&tegra_ehci3_device);
476 }
477
478 #else
479 static void roth_usb_init(void) { }
480 #endif
481
482 static void roth_audio_init(void)
483 {
484         struct board_info board_info;
485
486         tegra_get_board_info(&board_info);
487
488         roth_audio_pdata.codec_name = "rt5640.0-001c";
489         roth_audio_pdata.codec_dai_name = "rt5640-aif1";
490 }
491
492
493 static struct platform_device *roth_spi_devices[] __initdata = {
494         &tegra11_spi_device4,
495 };
496
497 struct spi_clk_parent spi_parent_clk_roth[] = {
498         [0] = {.name = "pll_p"},
499 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
500         [1] = {.name = "pll_m"},
501         [2] = {.name = "clk_m"},
502 #else
503         [1] = {.name = "clk_m"},
504 #endif
505 };
506
507 static struct tegra_spi_platform_data roth_spi_pdata = {
508         .is_dma_based           = false,
509         .max_dma_buffer         = 16 * 1024,
510         .is_clkon_always        = false,
511         .max_rate               = 25000000,
512 };
513
514 static void __init roth_spi_init(void)
515 {
516         int i;
517         struct clk *c;
518         struct board_info board_info, display_board_info;
519
520         tegra_get_board_info(&board_info);
521         tegra_get_display_board_info(&display_board_info);
522
523         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_roth); ++i) {
524                 c = tegra_get_clock_by_name(spi_parent_clk_roth[i].name);
525                 if (IS_ERR_OR_NULL(c)) {
526                         pr_err("Not able to get the clock for %s\n",
527                                                 spi_parent_clk_roth[i].name);
528                         continue;
529                 }
530                 spi_parent_clk_roth[i].parent_clk = c;
531                 spi_parent_clk_roth[i].fixed_clk_rate = clk_get_rate(c);
532         }
533         roth_spi_pdata.parent_clk_list = spi_parent_clk_roth;
534         roth_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_roth);
535         tegra11_spi_device4.dev.platform_data = &roth_spi_pdata;
536         platform_add_devices(roth_spi_devices,
537                                 ARRAY_SIZE(roth_spi_devices));
538 }
539
540 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
541         /* name         parent          rate            enabled */
542         { "extern2",    "pll_p",        41000000,       true},
543         { "clk_out_2",  "extern2",      40800000,       true},
544         { NULL,         NULL,           0,              0},
545 };
546
547 struct rm_spi_ts_platform_data rm31080ts_roth_data = {
548         .gpio_reset = 0,
549         .config = 0,
550 };
551
552 static struct tegra_spi_device_controller_data dev_cdata = {
553         .rx_clk_tap_delay = 0,
554         .tx_clk_tap_delay = 0,
555 };
556
557 struct spi_board_info rm31080a_roth_spi_board[1] = {
558         {
559          .modalias = "rm_ts_spidev",
560          .bus_num = 3,
561          .chip_select = 2,
562          .max_speed_hz = 12 * 1000 * 1000,
563          .mode = SPI_MODE_0,
564          .controller_data = &dev_cdata,
565          .platform_data = &rm31080ts_roth_data,
566          },
567 };
568
569 static int __init roth_touch_init(void)
570 {
571         struct board_info board_info;
572
573         tegra_get_display_board_info(&board_info);
574         tegra_clk_init_from_table(touch_clk_init_table);
575         clk_enable(tegra_get_clock_by_name("clk_out_2"));
576         rm31080ts_roth_data.platform_id = RM_PLATFORM_P005;
577         rm31080a_roth_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
578         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
579                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
580                                 &rm31080ts_roth_data,
581                                 &rm31080a_roth_spi_board[0],
582                                 ARRAY_SIZE(rm31080a_roth_spi_board));
583         return 0;
584 }
585
586 static void __init tegra_roth_init(void)
587 {
588
589         tegra_battery_edp_init(2500);
590         tegra_clk_init_from_table(roth_clk_init_table);
591         tegra_soc_device_init("roth");
592         tegra_enable_pinmux();
593         roth_pinmux_init();
594         roth_i2c_init();
595         roth_spi_init();
596         roth_usb_init();
597         roth_uart_init();
598         roth_audio_init();
599         platform_add_devices(roth_devices, ARRAY_SIZE(roth_devices));
600         tegra_ram_console_debug_init();
601         tegra_io_dpd_init();
602         roth_regulator_init();
603         roth_sdhci_init();
604         roth_suspend_init();
605         roth_emc_init();
606         roth_edp_init();
607         roth_touch_init();
608         roth_panel_init();
609         roth_kbc_init();
610         roth_pmon_init();
611         roth_setup_bluesleep();
612         roth_setup_bt_rfkill();
613         tegra_release_bootloader_fb();
614 #ifdef CONFIG_TEGRA_WDT_RECOVERY
615         tegra_wdt_recovery_init();
616 #endif
617         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
618         roth_sensors_init();
619         roth_soctherm_init();
620 }
621
622 static void __init roth_ramconsole_reserve(unsigned long size)
623 {
624         tegra_ram_console_debug_reserve(SZ_1M);
625 }
626
627 static void __init tegra_roth_dt_init(void)
628 {
629         tegra_roth_init();
630
631         of_platform_populate(NULL,
632                 of_default_bus_match_table, NULL, NULL);
633 }
634
635 static void __init tegra_roth_reserve(void)
636 {
637 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
638         /* 1920*1200*4*2 = 18432000 bytes */
639         tegra_reserve(0, SZ_16M + SZ_2M, SZ_4M);
640 #else
641         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
642 #endif
643         roth_ramconsole_reserve(SZ_1M);
644 }
645
646 static const char * const roth_dt_board_compat[] = {
647         "nvidia,roth",
648         NULL
649 };
650
651 MACHINE_START(ROTH, "roth")
652         .atag_offset    = 0x100,
653         .soc            = &tegra_soc_desc,
654         .map_io         = tegra_map_common_io,
655         .reserve        = tegra_roth_reserve,
656         .init_early     = tegra11x_init_early,
657         .init_irq       = tegra_init_irq,
658         .handle_irq     = gic_handle_irq,
659         .timer          = &tegra_timer,
660         .init_machine   = tegra_roth_dt_init,
661         .restart        = tegra_assert_system_reset,
662         .dt_compat      = roth_dt_board_compat,
663 MACHINE_END