ARM: tegra11: use mW values for battery EDP states
[linux-2.6.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/edp.h>
54 #include <linux/mfd/tlv320aic3262-registers.h>
55 #include <linux/mfd/tlv320aic3xxx-core.h>
56
57 #include <asm/hardware/gic.h>
58
59 #include <mach/clk.h>
60 #include <mach/iomap.h>
61 #include <mach/irqs.h>
62 #include <mach/pinmux.h>
63 #include <mach/pinmux-t11.h>
64 #include <mach/iomap.h>
65 #include <mach/io.h>
66 #include <mach/io_dpd.h>
67 #include <mach/i2s.h>
68 #include <mach/tegra_asoc_pdata.h>
69 #include <asm/mach-types.h>
70 #include <asm/mach/arch.h>
71 #include <mach/usb_phy.h>
72 #include <mach/gpio-tegra.h>
73 #include <mach/tegra_fiq_debugger.h>
74 #include <mach/tegra-bb-power.h>
75 #include <mach/tegra_usb_modem_power.h>
76
77 #include "board.h"
78 #include "board-common.h"
79 #include "board-touch-raydium.h"
80 #include "clock.h"
81 #include "board-pluto.h"
82 #include "tegra-board-id.h"
83 #include "devices.h"
84 #include "gpio-names.h"
85 #include "fuse.h"
86 #include "pm.h"
87 #include "common.h"
88
89
90 #ifdef CONFIG_BT_BLUESLEEP
91 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
92         .name           = "bt_rfkill",
93         .shutdown_gpio  = TEGRA_GPIO_PQ7,
94         .reset_gpio     = TEGRA_GPIO_PQ6,
95         .type           = RFKILL_TYPE_BLUETOOTH,
96 };
97
98 static struct platform_device pluto_bt_rfkill_device = {
99         .name = "rfkill_gpio",
100         .id             = -1,
101         .dev = {
102                 .platform_data = &pluto_bt_rfkill_pdata,
103         },
104 };
105
106 static noinline void __init pluto_setup_bt_rfkill(void)
107 {
108         platform_device_register(&pluto_bt_rfkill_device);
109 }
110
111 static struct resource pluto_bluesleep_resources[] = {
112         [0] = {
113                 .name = "gpio_host_wake",
114                         .start  = TEGRA_GPIO_PU6,
115                         .end    = TEGRA_GPIO_PU6,
116                         .flags  = IORESOURCE_IO,
117         },
118         [1] = {
119                 .name = "gpio_ext_wake",
120                         .start  = TEGRA_GPIO_PEE1,
121                         .end    = TEGRA_GPIO_PEE1,
122                         .flags  = IORESOURCE_IO,
123         },
124         [2] = {
125                 .name = "host_wake",
126                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
127         },
128 };
129
130 static struct platform_device pluto_bluesleep_device = {
131         .name           = "bluesleep",
132         .id             = -1,
133         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
134         .resource       = pluto_bluesleep_resources,
135 };
136
137 static noinline void __init pluto_setup_bluesleep(void)
138 {
139         pluto_bluesleep_resources[2].start =
140                 pluto_bluesleep_resources[2].end =
141                         gpio_to_irq(TEGRA_GPIO_PU6);
142         platform_device_register(&pluto_bluesleep_device);
143         return;
144 }
145 #elif defined CONFIG_BLUEDROID_PM
146 static struct resource pluto_bluedroid_pm_resources[] = {
147         [0] = {
148                 .name   = "shutdown_gpio",
149                 .start  = TEGRA_GPIO_PQ7,
150                 .end    = TEGRA_GPIO_PQ7,
151                 .flags  = IORESOURCE_IO,
152         },
153         [1] = {
154                 .name = "host_wake",
155                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
156         },
157         [2] = {
158                 .name = "gpio_ext_wake",
159                 .start  = TEGRA_GPIO_PEE1,
160                 .end    = TEGRA_GPIO_PEE1,
161                 .flags  = IORESOURCE_IO,
162         },
163         [3] = {
164                 .name = "gpio_host_wake",
165                 .start  = TEGRA_GPIO_PU6,
166                 .end    = TEGRA_GPIO_PU6,
167                 .flags  = IORESOURCE_IO,
168         },
169         [4] = {
170                 .name = "reset_gpio",
171                 .start  = TEGRA_GPIO_PQ6,
172                 .end    = TEGRA_GPIO_PQ6,
173                 .flags  = IORESOURCE_IO,
174         },
175         [5] = {
176                 .name = "min_cpu_freq",
177                 .start  = 102000,
178                 .end    = 102000,
179                 .flags  = IORESOURCE_IO,
180         },
181 };
182
183 static struct platform_device pluto_bluedroid_pm_device = {
184         .name = "bluedroid_pm",
185         .id             = 0,
186         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
187         .resource       = pluto_bluedroid_pm_resources,
188 };
189
190 static noinline void __init pluto_setup_bluedroid_pm(void)
191 {
192         pluto_bluedroid_pm_resources[1].start =
193                 pluto_bluedroid_pm_resources[1].end =
194                                         gpio_to_irq(TEGRA_GPIO_PU6);
195         platform_device_register(&pluto_bluedroid_pm_device);
196 }
197 #endif
198
199 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
200         /* name         parent          rate            enabled */
201         { "pll_m",      NULL,           0,              false},
202         { "hda",        "pll_p",        108000000,      false},
203         { "hda2codec_2x", "pll_p",      48000000,       false},
204         { "pwm",        "pll_p",        3187500,        false},
205         { "i2s1",       "pll_a_out0",   0,              false},
206         { "i2s2",       "pll_a_out0",   0,              false},
207         { "i2s3",       "pll_a_out0",   0,              false},
208         { "i2s4",       "pll_a_out0",   0,              false},
209         { "spdif_out",  "pll_a_out0",   0,              false},
210         { "d_audio",    "clk_m",        12000000,       false},
211         { "dam0",       "clk_m",        12000000,       false},
212         { "dam1",       "clk_m",        12000000,       false},
213         { "dam2",       "clk_m",        12000000,       false},
214         { "audio0",     "i2s0_sync",    0,              false},
215         { "audio1",     "i2s1_sync",    0,              false},
216         { "audio2",     "i2s2_sync",    0,              false},
217         { "audio3",     "i2s3_sync",    0,              false},
218         { "audio4",     "i2s4_sync",    0,              false},
219         { "vi_sensor",  "pll_p",        150000000,      false},
220         { "cilab",      "pll_p",        150000000,      false},
221         { "cilcd",      "pll_p",        150000000,      false},
222         { "cile",       "pll_p",        150000000,      false},
223         { "i2c1",       "pll_p",        3200000,        false},
224         { "i2c2",       "pll_p",        3200000,        false},
225         { "i2c3",       "pll_p",        3200000,        false},
226         { "i2c4",       "pll_p",        3200000,        false},
227         { "i2c5",       "pll_p",        3200000,        false},
228         { "extern3",    "clk_m",        12000000,       false},
229         { NULL,         NULL,           0,              0},
230 };
231
232 static struct bcm2079x_platform_data nfc_pdata = {
233         .irq_gpio = TEGRA_GPIO_PW2,
234         .en_gpio = TEGRA_GPIO_PU4,
235         .wake_gpio = TEGRA_GPIO_PX7,
236         };
237
238 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
239         {
240                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
241                 .platform_data = &nfc_pdata,
242         },
243 };
244
245 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
246         .adapter_nr     = 0,
247         .bus_count      = 1,
248         .bus_clk_rate   = { 100000, 0 },
249         .scl_gpio               = {TEGRA_GPIO_I2C1_SCL, 0},
250         .sda_gpio               = {TEGRA_GPIO_I2C1_SDA, 0},
251         .arb_recovery = arb_lost_recovery,
252 };
253
254 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
255         .adapter_nr     = 1,
256         .bus_count      = 1,
257         .bus_clk_rate   = { 100000, 0 },
258         .is_clkon_always = true,
259         .scl_gpio               = {TEGRA_GPIO_I2C2_SCL, 0},
260         .sda_gpio               = {TEGRA_GPIO_I2C2_SDA, 0},
261         .arb_recovery = arb_lost_recovery,
262 };
263
264 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
265         .adapter_nr     = 2,
266         .bus_count      = 1,
267         .bus_clk_rate   = { 100000, 0 },
268         .scl_gpio               = {TEGRA_GPIO_I2C3_SCL, 0},
269         .sda_gpio               = {TEGRA_GPIO_I2C3_SDA, 0},
270         .arb_recovery = arb_lost_recovery,
271 };
272
273 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
274         .adapter_nr     = 3,
275         .bus_count      = 1,
276         .bus_clk_rate   = { 10000, 0 },
277         .scl_gpio               = {TEGRA_GPIO_I2C4_SCL, 0},
278         .sda_gpio               = {TEGRA_GPIO_I2C4_SDA, 0},
279         .arb_recovery = arb_lost_recovery,
280 };
281
282 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
283         .adapter_nr     = 4,
284         .bus_count      = 1,
285         .bus_clk_rate   = { 400000, 0 },
286         .scl_gpio               = {TEGRA_GPIO_I2C5_SCL, 0},
287         .sda_gpio               = {TEGRA_GPIO_I2C5_SDA, 0},
288         .arb_recovery = arb_lost_recovery,
289 };
290
291 static struct aic3262_gpio_setup aic3262_gpio[] = {
292         /* GPIO 1*/
293         {
294                 .used = 1,
295                 .in = 0,
296                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
297         },
298         /* GPIO 2*/
299         {
300                 .used = 1,
301                 .in = 0,
302                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
303         },
304         /* GPI1 */
305         {
306                 .used = 1,
307                 .in = 1,
308         },
309         /* GPI2 */
310         {
311                 .used = 1,
312                 .in = 1,
313                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
314                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
315                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
316                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
317         },
318         /* GPO1 */
319         {
320                 .used = 1,
321                 .in = 0,
322                 .value = AIC3262_GPO1_FUNC_MSO_OUTPUT_FOR_SPI,
323         },
324 };
325 static struct aic3xxx_pdata aic3262_codec_pdata = {
326         .gpio_irq       = 0,
327         .gpio           = aic3262_gpio,
328         .naudint_irq    = 0,
329         .irq_base       = AIC3262_CODEC_IRQ_BASE,
330 };
331
332 static struct i2c_board_info __initdata cs42l73_board_info = {
333         I2C_BOARD_INFO("cs42l73", 0x4a),
334 };
335
336 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
337         I2C_BOARD_INFO("audience_a2220", 0x3E),
338 };
339
340 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
341         I2C_BOARD_INFO("tlv320aic3262", 0x18),
342         .platform_data = &aic3262_codec_pdata,
343 };
344
345 static void pluto_i2c_init(void)
346 {
347         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
348         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
349         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
350         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
351         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
352
353         platform_device_register(&tegra11_i2c_device5);
354         platform_device_register(&tegra11_i2c_device4);
355         platform_device_register(&tegra11_i2c_device3);
356         platform_device_register(&tegra11_i2c_device2);
357         platform_device_register(&tegra11_i2c_device1);
358
359         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
360         i2c_register_board_info(0, &cs42l73_board_info, 1);
361         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
362         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
363         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
364 }
365
366 static struct platform_device *pluto_uart_devices[] __initdata = {
367         &tegra_uarta_device,
368         &tegra_uartb_device,
369         &tegra_uartc_device,
370         &tegra_uartd_device,
371 };
372 static struct uart_clk_parent uart_parent_clk[] = {
373         [0] = {.name = "clk_m"},
374         [1] = {.name = "pll_p"},
375 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
376         [2] = {.name = "pll_m"},
377 #endif
378 };
379
380 static struct tegra_uart_platform_data pluto_uart_pdata;
381 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
382
383 static void __init uart_debug_init(void)
384 {
385         int debug_port_id;
386
387         debug_port_id = uart_console_debug_init(3);
388         if (debug_port_id < 0)
389                 return;
390         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
391 }
392
393 static void __init pluto_uart_init(void)
394 {
395         struct clk *c;
396         int i;
397
398         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
399                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
400                 if (IS_ERR_OR_NULL(c)) {
401                         pr_err("Not able to get the clock for %s\n",
402                                                 uart_parent_clk[i].name);
403                         continue;
404                 }
405                 uart_parent_clk[i].parent_clk = c;
406                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
407         }
408         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
409         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
410         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
411         pluto_loopback_uart_pdata.parent_clk_count =
412                                                 ARRAY_SIZE(uart_parent_clk);
413         pluto_loopback_uart_pdata.is_loopback = true;
414         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
415         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
416         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
417         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
418
419         /* Register low speed only if it is selected */
420         if (!is_tegra_debug_uartport_hs())
421                 uart_debug_init();
422
423         platform_add_devices(pluto_uart_devices,
424                                 ARRAY_SIZE(pluto_uart_devices));
425 }
426
427 static struct resource tegra_rtc_resources[] = {
428         [0] = {
429                 .start = TEGRA_RTC_BASE,
430                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
431                 .flags = IORESOURCE_MEM,
432         },
433         [1] = {
434                 .start = INT_RTC,
435                 .end = INT_RTC,
436                 .flags = IORESOURCE_IRQ,
437         },
438 };
439
440 static struct platform_device tegra_rtc_device = {
441         .name = "tegra_rtc",
442         .id   = -1,
443         .resource = tegra_rtc_resources,
444         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
445 };
446
447 static struct tegra_asoc_platform_data pluto_audio_pdata = {
448         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
449         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
450         .gpio_hp_mute           = -1,
451         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
452         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
453         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
454         .edp_states             = {1776, 888, 0},
455         .i2s_param[HIFI_CODEC]  = {
456                 .audio_port_id  = 1,
457                 .is_i2s_master  = 0,
458                 .i2s_mode       = TEGRA_DAIFMT_I2S,
459                 .sample_size    = 16,
460                 .channels       = 2,
461         },
462         .i2s_param[BASEBAND]    = {
463                 .audio_port_id  = 2,
464                 .is_i2s_master  = 1,
465                 .i2s_mode       = TEGRA_DAIFMT_I2S,
466                 .sample_size    = 16,
467                 .rate           = 16000,
468                 .channels       = 2,
469                 .bit_clk        = 1024000,
470         },
471         .i2s_param[BT_SCO]      = {
472                 .audio_port_id  = 3,
473                 .is_i2s_master  = 1,
474                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
475                 .sample_size    = 16,
476                 .channels       = 1,
477                 .bit_clk        = 512000,
478         },
479         .i2s_param[VOICE_CODEC] = {
480                 .audio_port_id  = 0,
481                 .is_i2s_master  = 1,
482                 .i2s_mode       = TEGRA_DAIFMT_I2S,
483                 .sample_size    = 16,
484                 .rate           = 16000,
485                 .channels       = 2,
486         },
487 };
488
489 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
490         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
491         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
492         .gpio_hp_mute           = -1,
493         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
494         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
495         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
496         .i2s_param[HIFI_CODEC]  = {
497                 .audio_port_id  = 1,
498                 .is_i2s_master  = 1,
499                 .i2s_mode       = TEGRA_DAIFMT_I2S,
500                 .sample_size    = 16,
501                 .rate           = 48000,
502                 .channels       = 2,
503         },
504         .i2s_param[BASEBAND]    = {
505                 .audio_port_id  = 2,
506                 .is_i2s_master  = 1,
507                 .i2s_mode       = TEGRA_DAIFMT_I2S,
508                 .sample_size    = 16,
509                 .rate           = 16000,
510                 .channels       = 2,
511                 .bit_clk        = 1024000,
512         },
513         .i2s_param[BT_SCO]      = {
514                 .audio_port_id  = 3,
515                 .is_i2s_master  = 1,
516                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
517                 .sample_size    = 16,
518                 .channels       = 1,
519                 .bit_clk        = 512000,
520         },
521         .i2s_param[VOICE_CODEC] = {
522                 .audio_port_id  = 0,
523                 .is_i2s_master  = 1,
524                 .i2s_mode       = TEGRA_DAIFMT_I2S,
525                 .sample_size    = 16,
526                 .rate           = 16000,
527                 .channels       = 2,
528         },
529 };
530
531 static struct platform_device pluto_audio_device = {
532         .name   = "tegra-snd-cs42l73",
533         .id     = 2,
534         .dev    = {
535                 .platform_data = &pluto_audio_pdata,
536         },
537 };
538
539 static struct platform_device pluto_audio_aic326x_device = {
540         .name   = "tegra-snd-aic326x",
541         .id     = 2,
542         .dev    = {
543                 .platform_data  = &pluto_aic3262_pdata,
544         },
545 };
546
547
548 static struct tegra_spi_device_controller_data dev_bdata = {
549         .rx_clk_tap_delay = 0,
550         .tx_clk_tap_delay = 0,
551 };
552 static struct spi_board_info aic326x_spi_board_info[] = {
553         {
554                 .modalias = "tlv320aic3xxx",
555                 .bus_num = 3,
556                 .chip_select = 0,
557                 .max_speed_hz = 4*1000*1000,
558                 .mode = SPI_MODE_1,
559                 .controller_data = &dev_bdata,
560                 .platform_data = &aic3262_codec_pdata,
561         },
562 };
563
564
565
566 #ifdef CONFIG_MHI_NETDEV
567 struct platform_device mhi_netdevice0 = {
568         .name = "mhi_net_device",
569         .id = 0,
570 };
571 #endif /* CONFIG_MHI_NETDEV */
572
573 static struct platform_device *pluto_devices[] __initdata = {
574         &tegra_pmu_device,
575         &tegra_rtc_device,
576         &tegra_udc_device,
577 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
578         &tegra_smmu_device,
579 #endif
580 #if defined(CONFIG_TEGRA_AVP)
581         &tegra_avp_device,
582 #endif
583 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
584         &tegra11_se_device,
585 #endif
586         &tegra_ahub_device,
587         &tegra_pcm_device,
588         &tegra_dam_device0,
589         &tegra_dam_device1,
590         &tegra_dam_device2,
591         &tegra_i2s_device0,
592         &tegra_i2s_device1,
593         &tegra_i2s_device2,
594         &tegra_i2s_device3,
595         &tegra_i2s_device4,
596         &tegra_spdif_device,
597         &spdif_dit_device,
598         &bluetooth_dit_device,
599         &baseband_dit_device,
600         &pluto_audio_device,
601         &pluto_audio_aic326x_device,
602         &tegra_hda_device,
603 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
604         &tegra_aes_device,
605 #endif
606 #ifdef CONFIG_MHI_NETDEV
607         &mhi_netdevice0,  /* MHI netdevice */
608 #endif /* CONFIG_MHI_NETDEV */
609 };
610
611 #ifdef CONFIG_USB_SUPPORT
612 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
613         .port_otg = false,
614         .has_hostpc = true,
615         .unaligned_dma_buf_supported = false,
616         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
617         .op_mode        = TEGRA_USB_OPMODE_HOST,
618         .u_data.host = {
619                 .vbus_gpio = -1,
620                 .hot_plug = false,
621                 .remote_wakeup_supported = true,
622                 .power_off_on_suspend = true,
623         },
624 };
625
626 static struct tegra_usb_platform_data tegra_udc_pdata = {
627         .port_otg = true,
628         .has_hostpc = true,
629         .builtin_host_disabled = true,
630         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
631         .op_mode = TEGRA_USB_OPMODE_DEVICE,
632         .u_data.dev = {
633                 .vbus_pmu_irq = 0,
634                 .vbus_gpio = -1,
635                 .charging_supported = false,
636                 .remote_wakeup_supported = false,
637         },
638         .u_cfg.utmi = {
639                 .hssync_start_delay = 0,
640                 .elastic_limit = 16,
641                 .idle_wait_delay = 17,
642                 .term_range_adj = 6,
643                 .xcvr_setup = 8,
644                 .xcvr_lsfslew = 2,
645                 .xcvr_lsrslew = 2,
646                 .xcvr_setup_offset = 0,
647                 .xcvr_use_fuses = 1,
648         },
649 };
650
651 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
652         .port_otg = true,
653         .has_hostpc = true,
654         .builtin_host_disabled = true,
655         .unaligned_dma_buf_supported = false,
656         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
657         .op_mode = TEGRA_USB_OPMODE_HOST,
658         .u_data.host = {
659                 .vbus_gpio = -1,
660                 .hot_plug = false,
661                 .remote_wakeup_supported = true,
662                 .power_off_on_suspend = true,
663         },
664         .u_cfg.utmi = {
665                 .hssync_start_delay = 0,
666                 .elastic_limit = 16,
667                 .idle_wait_delay = 17,
668                 .term_range_adj = 6,
669                 .xcvr_setup = 15,
670                 .xcvr_lsfslew = 2,
671                 .xcvr_lsrslew = 2,
672                 .xcvr_setup_offset = 0,
673                 .xcvr_use_fuses = 1,
674                 .vbus_oc_map = 0x7,
675         },
676 };
677
678 static struct tegra_usb_otg_data tegra_otg_pdata = {
679         .ehci_device = &tegra_ehci1_device,
680         .ehci_pdata = &tegra_ehci1_utmi_pdata,
681 };
682
683 static struct regulator *baseband_reg;
684 static struct gpio modem_gpios[] = { /* i500 modem */
685         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
686 };
687
688 static struct gpio modem2_gpios[] = {
689         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
690         {MDM2_RST, GPIOF_DIR_OUT, "MODEM2 RESET"},
691         {MDM2_ACK2, GPIOF_OUT_INIT_HIGH, "MODEM2 ACK2"},
692         {MDM2_ACK1, GPIOF_OUT_INIT_LOW, "MODEM2 ACK1"},
693 };
694
695 static void baseband2_post_phy_on(void);
696 static void baseband2_pre_phy_off(void);
697
698 static struct tegra_usb_phy_platform_ops baseband2_plat_ops = {
699         .pre_phy_off = baseband2_pre_phy_off,
700         .post_phy_on = baseband2_post_phy_on,
701 };
702
703 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
704         .port_otg = false,
705         .has_hostpc = true,
706         .unaligned_dma_buf_supported = false,
707         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
708         .op_mode = TEGRA_USB_OPMODE_HOST,
709         .u_data.host = {
710                 .vbus_gpio = -1,
711                 .hot_plug = false,
712                 .remote_wakeup_supported = true,
713                 .power_off_on_suspend = true,
714         },
715 };
716
717 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
718         .port_otg = false,
719         .has_hostpc = true,
720         .unaligned_dma_buf_supported = false,
721         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
722         .op_mode = TEGRA_USB_OPMODE_HOST,
723         .u_data.host = {
724                 .vbus_gpio = -1,
725                 .hot_plug = false,
726                 .remote_wakeup_supported = true,
727                 .power_off_on_suspend = true,
728         },
729         .ops = &baseband2_plat_ops,
730 };
731
732 #ifdef CONFIG_TEGRA_BB_OEM1
733 static struct tegra_usb_platform_data tegra_hsic_pdata = {
734         .port_otg = false,
735         .has_hostpc = true,
736         .unaligned_dma_buf_supported = false,
737         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
738         .op_mode        = TEGRA_USB_OPMODE_HOST,
739         .u_data.host = {
740                 .vbus_gpio = -1,
741                 .hot_plug = false,
742                 .remote_wakeup_supported = true,
743                 .power_off_on_suspend = true,
744         },
745 };
746
747 static struct platform_device *
748 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
749 {
750         struct platform_device *pdev;
751         int val;
752
753         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
754         if (!pdev)
755                 return NULL;
756
757         val = platform_device_add_resources(pdev, ehci_dev->resource,
758                                                 ehci_dev->num_resources);
759         if (val)
760                 goto error;
761
762         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
763         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
764
765         val = platform_device_add_data(pdev, &tegra_hsic_pdata,
766                         sizeof(struct tegra_usb_platform_data));
767         if (val)
768                 goto error;
769
770         val = platform_device_add(pdev);
771         if (val)
772                 goto error;
773
774         return pdev;
775
776 error:
777         pr_err("%s: failed to add the host contoller device\n", __func__);
778         platform_device_put(pdev);
779         return NULL;
780 }
781
782 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
783 {
784         struct platform_device *pdev = *platdev;
785
786         if (pdev && &pdev->dev) {
787                 platform_device_unregister(pdev);
788                 *platdev = NULL;
789         } else
790                 pr_err("%s: no platform device\n", __func__);
791 }
792
793 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
794
795 static union tegra_bb_gpio_id bb_gpio_oem1 = {
796         .oem1 = {
797                 .reset = BB_OEM1_GPIO_RST,
798                 .pwron = BB_OEM1_GPIO_ON,
799                 .awr = BB_OEM1_GPIO_AWR,
800                 .cwr = BB_OEM1_GPIO_CWR,
801                 .spare = BB_OEM1_GPIO_SPARE,
802                 .wdi = BB_OEM1_GPIO_WDI,
803         },
804 };
805
806 static struct tegra_bb_pdata bb_pdata_oem1 = {
807         .id = &bb_gpio_oem1,
808         .device = &tegra_ehci3_device,
809         .ehci_register = tegra_usb_hsic_host_register,
810         .ehci_unregister = tegra_usb_hsic_host_unregister,
811         .bb_id = TEGRA_BB_OEM1,
812 };
813
814 static struct platform_device tegra_bb_oem1 = {
815         .name = "tegra_baseband_power",
816         .id = -1,
817         .dev = {
818                 .platform_data = &bb_pdata_oem1,
819         },
820 };
821 #endif
822
823 static int baseband_init(void)
824 {
825         int ret;
826
827         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
828         if (ret) {
829                 pr_warn("%s:gpio request failed\n", __func__);
830                 return ret;
831         }
832
833         baseband_reg = regulator_get(NULL, "vdd_core_bb");
834         if (IS_ERR_OR_NULL(baseband_reg))
835                 pr_warn("%s: baseband regulator get failed\n", __func__);
836         else
837                 regulator_enable(baseband_reg);
838
839         /* enable pull-down for MDM1_COLD_BOOT */
840         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
841                                     TEGRA_PUPD_PULL_DOWN);
842
843         /* export GPIO for user space access through sysfs */
844         gpio_export(MDM_RST, false);
845
846         return 0;
847 }
848
849 static const struct tegra_modem_operations baseband_operations = {
850         .init = baseband_init,
851 };
852
853 #define MODEM_BOOT_EDP_MAX 0
854 /* FIXME: get accurate boot current value */
855 static unsigned int modem_boot_edp_states[] = { 1900 };
856 static struct edp_client modem_boot_edp_client = {
857         .name = "modem_boot",
858         .states = modem_boot_edp_states,
859         .num_states = ARRAY_SIZE(modem_boot_edp_states),
860         .e0_index = MODEM_BOOT_EDP_MAX,
861         .priority = EDP_MAX_PRIO,
862 };
863
864 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
865         .ops = &baseband_operations,
866         .wake_gpio = -1,
867         .boot_gpio = MDM_COLDBOOT,
868         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
869         .autosuspend_delay = 2000,
870         .short_autosuspend_delay = 50,
871         .tegra_ehci_device = &tegra_ehci2_device,
872         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
873         .modem_boot_edp_client = &modem_boot_edp_client,
874         .edp_manager_name = "battery",
875         .i_breach_ppm = 500000,
876         /* FIXME: get useful adjperiods */
877         .i_thresh_3g_adjperiod = 10000,
878         .i_thresh_lte_adjperiod = 10000,
879 };
880
881 static struct platform_device icera_baseband_device = {
882         .name = "tegra_usb_modem_power",
883         .id = -1,
884         .dev = {
885                 .platform_data = &baseband_pdata,
886         },
887 };
888
889 static void baseband2_post_phy_on(void)
890 {
891         /* set MDM2_ACK2 low */
892         gpio_set_value(MDM2_ACK2, 0);
893 }
894
895 static void baseband2_pre_phy_off(void)
896 {
897         /* set MDM2_ACK2 high */
898         gpio_set_value(MDM2_ACK2, 1);
899 }
900
901 static void baseband2_start(void)
902 {
903         /*
904          *  Leave baseband powered OFF.
905          *  User-space daemons will take care of powering it up.
906          */
907         pr_info("%s\n", __func__);
908         gpio_set_value(MDM2_PWR_ON, 0);
909 }
910
911 static void baseband2_reset(void)
912 {
913         /* Initiate power cycle on baseband sub system */
914         pr_info("%s\n", __func__);
915         gpio_set_value(MDM2_PWR_ON, 0);
916         mdelay(200);
917         gpio_set_value(MDM2_PWR_ON, 1);
918 }
919
920 static int baseband2_init(void)
921 {
922         int ret;
923
924         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
925         if (ret)
926                 return ret;
927
928         /* enable pull-up for MDM2_REQ2 */
929         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PV1,
930                                     TEGRA_PUPD_PULL_UP);
931
932         /* export GPIO for user space access through sysfs */
933         gpio_export(MDM2_PWR_ON, false);
934
935         return 0;
936 }
937
938 static const struct tegra_modem_operations baseband2_operations = {
939         .init = baseband2_init,
940         .start = baseband2_start,
941         .reset = baseband2_reset,
942 };
943
944 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
945         .ops = &baseband2_operations,
946         .wake_gpio = MDM2_REQ2,
947         .wake_irq_flags = IRQF_TRIGGER_FALLING,
948         .boot_gpio = MDM2_COLDBOOT,
949         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
950         .autosuspend_delay = 2000,
951         .short_autosuspend_delay = 50,
952         .tegra_ehci_device = &tegra_ehci3_device,
953         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
954 };
955
956 static struct platform_device icera_baseband2_device = {
957         .name = "tegra_usb_modem_power",
958         .id = -1,
959         .dev = {
960                 .platform_data = &baseband2_pdata,
961         },
962 };
963
964 static void pluto_usb_init(void)
965 {
966         int usb_port_owner_info = tegra_get_usb_port_owner_info();
967
968         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
969                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
970                 platform_device_register(&tegra_otg_device);
971
972                 /* Setup the udc platform data */
973                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
974         }
975 }
976
977 static void pluto_modem_init(void)
978 {
979         int modem_id = tegra_get_modem_id();
980         struct board_info board_info;
981         int usb_port_owner_info = tegra_get_usb_port_owner_info();
982
983         tegra_get_board_info(&board_info);
984         pr_info("%s: modem_id = %d\n", __func__, modem_id);
985
986         switch (modem_id) {
987         case TEGRA_BB_I500: /* on board i500 HSIC */
988                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
989                         platform_device_register(&icera_baseband_device);
990                 break;
991         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
992                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
993                         platform_device_register(&icera_baseband2_device);
994                 break;
995 #ifdef CONFIG_TEGRA_BB_OEM1
996         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
997                 if ((board_info.board_id == BOARD_E1575) ||
998                         ((board_info.board_id == BOARD_E1580) &&
999                                 (board_info.fab >= BOARD_FAB_A03))) {
1000                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1001                                                         TEGRA_TRI_NORMAL);
1002                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1003                 }
1004                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1005                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1006                         tegra_ehci3_device.dev.platform_data
1007                                 = &tegra_hsic_pdata;
1008                         platform_device_register(&tegra_bb_oem1);
1009                 }
1010                 break;
1011 #endif
1012         case TEGRA_BB_HSIC_HUB: /* i500 SWD HSIC */
1013                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1014                         tegra_ehci3_device.dev.platform_data =
1015                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1016                         platform_device_register(&tegra_ehci3_device);
1017                 }
1018                 break;
1019
1020         default:
1021                 return;
1022         }
1023 }
1024
1025 static struct tegra_xusb_pad_data xusb_padctl_data = {
1026         .pad_mux = 0x1,
1027         .port_cap = 0x1,
1028         .snps_oc_map = 0x1ff,
1029         .usb2_oc_map = 0x3c,
1030         .ss_port_map = 0x2,
1031         .oc_det = 0,
1032         .rx_wander = 0xf0,
1033         .otg_pad0_ctl0 = 0xffc7ffff,
1034         .otg_pad0_ctl1 = 0x7,
1035         .otg_pad1_ctl0 = 0xffffffff,
1036         .otg_pad1_ctl1 = 0,
1037         .bias_pad_ctl0 = 0,
1038         .hsic_pad0_ctl0 = 0xffff00ff,
1039         .hsic_pad0_ctl1 = 0xffff00ff,
1040         .pmc_value = 0xfffffff0,
1041 };
1042
1043 static void pluto_xusb_init(void)
1044 {
1045         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1046
1047         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1048                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1049
1050                 /*
1051                  * read from usb_calib0 and pass to driver
1052                  * set HS_CURR_LEVEL = usb_calib0[5:0]
1053                  * set TERM_RANGE_ADJ = usb_calib0[10:7]
1054                  * set HS_IREF_CAP = usb_calib0[14:13]
1055                  * set HS_SQUELCH_LEVEL = usb_calib0[12:11]
1056                  */
1057
1058                 xusb_padctl_data.hs_curr_level = (usb_calib0 >> 0) & 0x3f;
1059                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1060                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1061                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1062
1063                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1064                 platform_device_register(&tegra_xhci_device);
1065         }
1066 }
1067 #else
1068 static void pluto_usb_init(void) { }
1069 static void pluto_modem_init(void) { }
1070 static void pluto_xusb_init(void) { }
1071 #endif
1072
1073 static void pluto_audio_init(void)
1074 {
1075         struct board_info board_info;
1076
1077         tegra_get_board_info(&board_info);
1078
1079         spi_register_board_info(aic326x_spi_board_info,
1080                                         ARRAY_SIZE(aic326x_spi_board_info));
1081 }
1082
1083 static struct platform_device *pluto_spi_devices[] __initdata = {
1084         &tegra11_spi_device4,
1085 };
1086
1087 struct spi_clk_parent spi_parent_clk_pluto[] = {
1088         [0] = {.name = "pll_p"},
1089 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
1090         [1] = {.name = "pll_m"},
1091         [2] = {.name = "clk_m"},
1092 #else
1093         [1] = {.name = "clk_m"},
1094 #endif
1095 };
1096
1097 static struct tegra_spi_platform_data pluto_spi_pdata = {
1098         .is_dma_based           = false,
1099         .max_dma_buffer         = 16 * 1024,
1100         .is_clkon_always        = false,
1101         .max_rate               = 25000000,
1102 };
1103
1104 static void __init pluto_spi_init(void)
1105 {
1106         int i;
1107         struct clk *c;
1108         struct board_info board_info, display_board_info;
1109
1110         tegra_get_board_info(&board_info);
1111         tegra_get_display_board_info(&display_board_info);
1112
1113         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_pluto); ++i) {
1114                 c = tegra_get_clock_by_name(spi_parent_clk_pluto[i].name);
1115                 if (IS_ERR_OR_NULL(c)) {
1116                         pr_err("Not able to get the clock for %s\n",
1117                                                 spi_parent_clk_pluto[i].name);
1118                         continue;
1119                 }
1120                 spi_parent_clk_pluto[i].parent_clk = c;
1121                 spi_parent_clk_pluto[i].fixed_clk_rate = clk_get_rate(c);
1122         }
1123         pluto_spi_pdata.parent_clk_list = spi_parent_clk_pluto;
1124         pluto_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_pluto);
1125         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1126         platform_add_devices(pluto_spi_devices,
1127                                 ARRAY_SIZE(pluto_spi_devices));
1128 }
1129
1130 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1131         /* name         parent          rate            enabled */
1132         { "extern2",    "pll_p",        41000000,       false},
1133         { "clk_out_2",  "extern2",      40800000,       false},
1134         { NULL,         NULL,           0,              0},
1135 };
1136
1137 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1138         .gpio_reset = 0,
1139         .config = 0,
1140         .platform_id = RM_PLATFORM_P005,
1141         .name_of_clock = "clk_out_2",
1142 };
1143
1144 static struct tegra_spi_device_controller_data dev_cdata = {
1145         .rx_clk_tap_delay = 0,
1146         .tx_clk_tap_delay = 0,
1147 };
1148
1149 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1150         {
1151          .modalias = "rm_ts_spidev",
1152          .bus_num = 3,
1153          .chip_select = 2,
1154          .max_speed_hz = 12 * 1000 * 1000,
1155          .mode = SPI_MODE_0,
1156          .controller_data = &dev_cdata,
1157          .platform_data = &rm31080ts_pluto_data,
1158          },
1159 };
1160
1161 static int __init pluto_touch_init(void)
1162 {
1163         tegra_clk_init_from_table(touch_clk_init_table);
1164         clk_enable(tegra_get_clock_by_name("clk_out_2"));
1165         mdelay(20);
1166         rm31080a_pluto_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1167         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1168                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
1169                                 &rm31080ts_pluto_data,
1170                                 &rm31080a_pluto_spi_board[0],
1171                                 ARRAY_SIZE(rm31080a_pluto_spi_board));
1172         return 0;
1173 }
1174
1175 #ifdef CONFIG_EDP_FRAMEWORK
1176 static struct edp_manager battery_edp_manager = {
1177         .name = "battery",
1178         .max = 12350
1179 };
1180
1181 static void __init pluto_battery_edp_init(void)
1182 {
1183         struct edp_governor *g;
1184         int r;
1185
1186         r = edp_register_manager(&battery_edp_manager);
1187         if (r)
1188                 goto err_ret;
1189
1190         /* start with priority governor */
1191         g = edp_get_governor("priority");
1192         if (!g) {
1193                 r = -EFAULT;
1194                 goto err_ret;
1195         }
1196
1197         r = edp_set_governor(&battery_edp_manager, g);
1198         if (r)
1199                 goto err_ret;
1200
1201         return;
1202
1203 err_ret:
1204         pr_err("Battery EDP init failed with error %d\n", r);
1205         WARN_ON(1);
1206 }
1207 #else
1208 static inline void pluto_battery_edp_init(void) {}
1209 #endif
1210
1211 static void __init pluto_dtv_init(void)
1212 {
1213         platform_device_register(&tegra_dtv_device);
1214 }
1215
1216 static void __init tegra_pluto_init(void)
1217 {
1218         pluto_battery_edp_init();
1219         tegra_clk_init_from_table(pluto_clk_init_table);
1220         tegra_clk_vefify_parents();
1221         tegra_soc_device_init("tegra_pluto");
1222         tegra_enable_pinmux();
1223         pluto_pinmux_init();
1224         pluto_i2c_init();
1225         pluto_spi_init();
1226         pluto_usb_init();
1227         pluto_xusb_init();
1228         pluto_uart_init();
1229         pluto_audio_init();
1230         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1231         tegra_ram_console_debug_init();
1232         tegra_io_dpd_init();
1233         pluto_sdhci_init();
1234         pluto_regulator_init();
1235         pluto_dtv_init();
1236         pluto_suspend_init();
1237         pluto_touch_init();
1238         pluto_emc_init();
1239         pluto_edp_init();
1240         pluto_panel_init();
1241         pluto_pmon_init();
1242         pluto_kbc_init();
1243 #ifdef CONFIG_BT_BLUESLEEP
1244         pluto_setup_bluesleep();
1245         pluto_setup_bt_rfkill();
1246 #elif defined CONFIG_BLUEDROID_PM
1247         pluto_setup_bluedroid_pm();
1248 #endif
1249         tegra_release_bootloader_fb();
1250         pluto_modem_init();
1251 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1252         tegra_wdt_recovery_init();
1253 #endif
1254         pluto_sensors_init();
1255         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1256         pluto_soctherm_init();
1257 }
1258
1259 static void __init pluto_ramconsole_reserve(unsigned long size)
1260 {
1261         tegra_ram_console_debug_reserve(SZ_1M);
1262 }
1263
1264 static void __init tegra_pluto_dt_init(void)
1265 {
1266         tegra_pluto_init();
1267
1268 #ifdef CONFIG_USE_OF
1269         of_platform_populate(NULL,
1270                 of_default_bus_match_table, NULL, NULL);
1271 #endif
1272 }
1273 static void __init tegra_pluto_reserve(void)
1274 {
1275 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1276         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1277         tegra_reserve(0, SZ_16M, SZ_4M);
1278 #else
1279         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1280 #endif
1281         pluto_ramconsole_reserve(SZ_1M);
1282 }
1283
1284 static const char * const pluto_dt_board_compat[] = {
1285         "nvidia,pluto",
1286         NULL
1287 };
1288
1289 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1290         .atag_offset    = 0x100,
1291         .soc            = &tegra_soc_desc,
1292         .map_io         = tegra_map_common_io,
1293         .reserve        = tegra_pluto_reserve,
1294         .init_early     = tegra11x_init_early,
1295         .init_irq       = tegra_init_irq,
1296         .handle_irq     = gic_handle_irq,
1297         .timer          = &tegra_timer,
1298         .init_machine   = tegra_pluto_dt_init,
1299         .restart        = tegra_assert_system_reset,
1300         .dt_compat      = pluto_dt_board_compat,
1301 MACHINE_END