ARM: tegra: refactor xusb registration
[linux-2.6.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/mfd/tlv320aic3262-registers.h>
54 #include <linux/mfd/tlv320aic3xxx-core.h>
55
56 #include <asm/hardware/gic.h>
57
58 #include <mach/clk.h>
59 #include <mach/iomap.h>
60 #include <mach/irqs.h>
61 #include <mach/pinmux.h>
62 #include <mach/pinmux-t11.h>
63 #include <mach/iomap.h>
64 #include <mach/io.h>
65 #include <mach/io_dpd.h>
66 #include <mach/i2s.h>
67 #include <mach/tegra_asoc_pdata.h>
68 #include <asm/mach-types.h>
69 #include <asm/mach/arch.h>
70 #include <mach/usb_phy.h>
71 #include <mach/gpio-tegra.h>
72 #include <mach/tegra_fiq_debugger.h>
73 #include <mach/tegra-bb-power.h>
74 #include <linux/platform_data/tegra_usb_modem_power.h>
75 #include <mach/hardware.h>
76 #include <mach/xusb.h>
77
78 #include "board.h"
79 #include "board-common.h"
80 #include "board-touch-raydium.h"
81 #include "clock.h"
82 #include "board-pluto.h"
83 #include "baseband-xmm-power.h"
84 #include "tegra-board-id.h"
85 #include "devices.h"
86 #include "gpio-names.h"
87 #include "fuse.h"
88 #include "pm.h"
89 #include "common.h"
90
91
92 #ifdef CONFIG_BT_BLUESLEEP
93 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
94         .name           = "bt_rfkill",
95         .shutdown_gpio  = TEGRA_GPIO_PQ7,
96         .reset_gpio     = TEGRA_GPIO_PQ6,
97         .type           = RFKILL_TYPE_BLUETOOTH,
98 };
99
100 static struct platform_device pluto_bt_rfkill_device = {
101         .name = "rfkill_gpio",
102         .id             = -1,
103         .dev = {
104                 .platform_data = &pluto_bt_rfkill_pdata,
105         },
106 };
107
108 static noinline void __init pluto_setup_bt_rfkill(void)
109 {
110         platform_device_register(&pluto_bt_rfkill_device);
111 }
112
113 static struct resource pluto_bluesleep_resources[] = {
114         [0] = {
115                 .name = "gpio_host_wake",
116                         .start  = TEGRA_GPIO_PU6,
117                         .end    = TEGRA_GPIO_PU6,
118                         .flags  = IORESOURCE_IO,
119         },
120         [1] = {
121                 .name = "gpio_ext_wake",
122                         .start  = TEGRA_GPIO_PEE1,
123                         .end    = TEGRA_GPIO_PEE1,
124                         .flags  = IORESOURCE_IO,
125         },
126         [2] = {
127                 .name = "host_wake",
128                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
129         },
130 };
131
132 static struct platform_device pluto_bluesleep_device = {
133         .name           = "bluesleep",
134         .id             = -1,
135         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
136         .resource       = pluto_bluesleep_resources,
137 };
138
139 static noinline void __init pluto_setup_bluesleep(void)
140 {
141         pluto_bluesleep_resources[2].start =
142                 pluto_bluesleep_resources[2].end =
143                         gpio_to_irq(TEGRA_GPIO_PU6);
144         platform_device_register(&pluto_bluesleep_device);
145         return;
146 }
147 #elif defined CONFIG_BLUEDROID_PM
148 static struct resource pluto_bluedroid_pm_resources[] = {
149         [0] = {
150                 .name   = "shutdown_gpio",
151                 .start  = TEGRA_GPIO_PQ7,
152                 .end    = TEGRA_GPIO_PQ7,
153                 .flags  = IORESOURCE_IO,
154         },
155         [1] = {
156                 .name = "host_wake",
157                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
158         },
159         [2] = {
160                 .name = "gpio_ext_wake",
161                 .start  = TEGRA_GPIO_PEE1,
162                 .end    = TEGRA_GPIO_PEE1,
163                 .flags  = IORESOURCE_IO,
164         },
165         [3] = {
166                 .name = "gpio_host_wake",
167                 .start  = TEGRA_GPIO_PU6,
168                 .end    = TEGRA_GPIO_PU6,
169                 .flags  = IORESOURCE_IO,
170         },
171         [4] = {
172                 .name = "reset_gpio",
173                 .start  = TEGRA_GPIO_PQ6,
174                 .end    = TEGRA_GPIO_PQ6,
175                 .flags  = IORESOURCE_IO,
176         },
177         [5] = {
178                 .name = "min_cpu_freq",
179                 .start  = 102000,
180                 .end    = 102000,
181                 .flags  = IORESOURCE_IO,
182         },
183 };
184
185 static struct platform_device pluto_bluedroid_pm_device = {
186         .name = "bluedroid_pm",
187         .id             = 0,
188         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
189         .resource       = pluto_bluedroid_pm_resources,
190 };
191
192 static noinline void __init pluto_setup_bluedroid_pm(void)
193 {
194         pluto_bluedroid_pm_resources[1].start =
195                 pluto_bluedroid_pm_resources[1].end =
196                                         gpio_to_irq(TEGRA_GPIO_PU6);
197         platform_device_register(&pluto_bluedroid_pm_device);
198 }
199 #endif
200
201 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
202         /* name         parent          rate            enabled */
203         { "pll_m",      NULL,           0,              false},
204         { "hda",        "pll_p",        108000000,      false},
205         { "hda2codec_2x", "pll_p",      48000000,       false},
206         { "pwm",        "pll_p",        3187500,        false},
207         { "i2s1",       "pll_a_out0",   0,              false},
208         { "i2s2",       "pll_a_out0",   0,              false},
209         { "i2s3",       "pll_a_out0",   0,              false},
210         { "i2s4",       "pll_a_out0",   0,              false},
211         { "spdif_out",  "pll_a_out0",   0,              false},
212         { "d_audio",    "clk_m",        12000000,       false},
213         { "dam0",       "clk_m",        12000000,       false},
214         { "dam1",       "clk_m",        12000000,       false},
215         { "dam2",       "clk_m",        12000000,       false},
216         { "audio0",     "i2s0_sync",    0,              false},
217         { "audio1",     "i2s1_sync",    0,              false},
218         { "audio2",     "i2s2_sync",    0,              false},
219         { "audio3",     "i2s3_sync",    0,              false},
220         { "audio4",     "i2s4_sync",    0,              false},
221         { "vi_sensor",  "pll_p",        150000000,      false},
222         { "cilab",      "pll_p",        150000000,      false},
223         { "cilcd",      "pll_p",        150000000,      false},
224         { "cile",       "pll_p",        150000000,      false},
225         { "i2c1",       "pll_p",        3200000,        false},
226         { "i2c2",       "pll_p",        3200000,        false},
227         { "i2c3",       "pll_p",        3200000,        false},
228         { "i2c4",       "pll_p",        3200000,        false},
229         { "i2c5",       "pll_p",        3200000,        false},
230         { "extern3",    "clk_m",        12000000,       false},
231         { "dsia",       "pll_d2_out0",  0,              false},
232         { NULL,         NULL,           0,              0},
233 };
234
235 static struct bcm2079x_platform_data nfc_pdata = {
236         .irq_gpio = TEGRA_GPIO_PW2,
237         .en_gpio = TEGRA_GPIO_PU4,
238         .wake_gpio = TEGRA_GPIO_PX7,
239         };
240
241 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
242         {
243                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
244                 .platform_data = &nfc_pdata,
245         },
246 };
247
248 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
249         .adapter_nr     = 0,
250         .bus_count      = 1,
251         .bus_clk_rate   = { 100000, 0 },
252         .scl_gpio               = {TEGRA_GPIO_I2C1_SCL, 0},
253         .sda_gpio               = {TEGRA_GPIO_I2C1_SDA, 0},
254         .arb_recovery = arb_lost_recovery,
255 };
256
257 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
258         .adapter_nr     = 1,
259         .bus_count      = 1,
260         .bus_clk_rate   = { 100000, 0 },
261         .is_clkon_always = true,
262         .scl_gpio               = {TEGRA_GPIO_I2C2_SCL, 0},
263         .sda_gpio               = {TEGRA_GPIO_I2C2_SDA, 0},
264         .arb_recovery = arb_lost_recovery,
265 };
266
267 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
268         .adapter_nr     = 2,
269         .bus_count      = 1,
270         .bus_clk_rate   = { 400000, 0 },
271         .scl_gpio               = {TEGRA_GPIO_I2C3_SCL, 0},
272         .sda_gpio               = {TEGRA_GPIO_I2C3_SDA, 0},
273         .arb_recovery = arb_lost_recovery,
274 };
275
276 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
277         .adapter_nr     = 3,
278         .bus_count      = 1,
279         .bus_clk_rate   = { 10000, 0 },
280         .scl_gpio               = {TEGRA_GPIO_I2C4_SCL, 0},
281         .sda_gpio               = {TEGRA_GPIO_I2C4_SDA, 0},
282         .arb_recovery = arb_lost_recovery,
283 };
284
285 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
286         .adapter_nr     = 4,
287         .bus_count      = 1,
288         .bus_clk_rate   = { 400000, 0 },
289         .scl_gpio               = {TEGRA_GPIO_I2C5_SCL, 0},
290         .sda_gpio               = {TEGRA_GPIO_I2C5_SDA, 0},
291         .arb_recovery = arb_lost_recovery,
292 };
293
294 static struct aic3262_gpio_setup aic3262_gpio[] = {
295         /* GPIO 1*/
296         {
297                 .used = 1,
298                 .in = 0,
299                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
300         },
301         /* GPIO 2*/
302         {
303                 .used = 1,
304                 .in = 0,
305                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
306         },
307         /* GPI1 */
308         {
309                 .used = 1,
310                 .in = 1,
311         },
312         /* GPI2 */
313         {
314                 .used = 1,
315                 .in = 1,
316                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
317                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
318                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
319                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
320         },
321         /* GPO1 */
322         {
323                 .used = 1,
324                 .in = 0,
325                 .value = AIC3262_GPO1_FUNC_MSO_OUTPUT_FOR_SPI,
326         },
327 };
328 static struct aic3xxx_pdata aic3262_codec_pdata = {
329         .gpio_irq       = 0,
330         .gpio           = aic3262_gpio,
331         .naudint_irq    = 0,
332         .irq_base       = AIC3262_CODEC_IRQ_BASE,
333 };
334
335 static struct i2c_board_info __initdata cs42l73_board_info = {
336         I2C_BOARD_INFO("cs42l73", 0x4a),
337 };
338
339 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
340         I2C_BOARD_INFO("audience_a2220", 0x3E),
341 };
342
343 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
344         I2C_BOARD_INFO("tlv320aic3262", 0x18),
345         .platform_data = &aic3262_codec_pdata,
346 };
347
348 static void pluto_i2c_init(void)
349 {
350         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
351         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
352         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
353         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
354         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
355
356         platform_device_register(&tegra11_i2c_device5);
357         platform_device_register(&tegra11_i2c_device4);
358         platform_device_register(&tegra11_i2c_device3);
359         platform_device_register(&tegra11_i2c_device2);
360         platform_device_register(&tegra11_i2c_device1);
361
362         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
363         i2c_register_board_info(0, &cs42l73_board_info, 1);
364         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
365         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
366         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
367 }
368
369 static struct platform_device *pluto_uart_devices[] __initdata = {
370         &tegra_uarta_device,
371         &tegra_uartb_device,
372         &tegra_uartc_device,
373         &tegra_uartd_device,
374 };
375 static struct uart_clk_parent uart_parent_clk[] = {
376         [0] = {.name = "clk_m"},
377         [1] = {.name = "pll_p"},
378 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
379         [2] = {.name = "pll_m"},
380 #endif
381 };
382
383 static struct tegra_uart_platform_data pluto_uart_pdata;
384 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
385
386 static void __init uart_debug_init(void)
387 {
388         int debug_port_id;
389
390         debug_port_id = uart_console_debug_init(3);
391         if (debug_port_id < 0)
392                 return;
393         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
394 }
395
396 static void __init pluto_uart_init(void)
397 {
398         struct clk *c;
399         int i;
400
401         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
402                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
403                 if (IS_ERR_OR_NULL(c)) {
404                         pr_err("Not able to get the clock for %s\n",
405                                                 uart_parent_clk[i].name);
406                         continue;
407                 }
408                 uart_parent_clk[i].parent_clk = c;
409                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
410         }
411         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
412         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
413         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
414         pluto_loopback_uart_pdata.parent_clk_count =
415                                                 ARRAY_SIZE(uart_parent_clk);
416         pluto_loopback_uart_pdata.is_loopback = true;
417         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
418         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
419         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
420         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
421
422         /* Register low speed only if it is selected */
423         if (!is_tegra_debug_uartport_hs())
424                 uart_debug_init();
425
426         platform_add_devices(pluto_uart_devices,
427                                 ARRAY_SIZE(pluto_uart_devices));
428 }
429
430 static struct resource tegra_rtc_resources[] = {
431         [0] = {
432                 .start = TEGRA_RTC_BASE,
433                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
434                 .flags = IORESOURCE_MEM,
435         },
436         [1] = {
437                 .start = INT_RTC,
438                 .end = INT_RTC,
439                 .flags = IORESOURCE_IRQ,
440         },
441 };
442
443 static struct platform_device tegra_rtc_device = {
444         .name = "tegra_rtc",
445         .id   = -1,
446         .resource = tegra_rtc_resources,
447         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
448 };
449
450 static struct tegra_asoc_platform_data pluto_audio_pdata = {
451         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
452         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
453         .gpio_hp_mute           = -1,
454         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
455         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
456         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
457         .edp_support            =  true,
458         .edp_states             = {1776, 888, 0},
459         .i2s_param[HIFI_CODEC]  = {
460                 .audio_port_id  = 1,
461                 .is_i2s_master  = 0,
462                 .i2s_mode       = TEGRA_DAIFMT_I2S,
463                 .sample_size    = 16,
464                 .channels       = 2,
465         },
466         .i2s_param[BASEBAND]    = {
467                 .audio_port_id  = 2,
468                 .is_i2s_master  = 1,
469                 .i2s_mode       = TEGRA_DAIFMT_I2S,
470                 .sample_size    = 16,
471                 .rate           = 16000,
472                 .channels       = 2,
473                 .bit_clk        = 1024000,
474         },
475         .i2s_param[BT_SCO]      = {
476                 .audio_port_id  = 3,
477                 .is_i2s_master  = 1,
478                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
479                 .sample_size    = 16,
480                 .channels       = 1,
481                 .bit_clk        = 512000,
482         },
483         .i2s_param[VOICE_CODEC] = {
484                 .audio_port_id  = 0,
485                 .is_i2s_master  = 1,
486                 .i2s_mode       = TEGRA_DAIFMT_I2S,
487                 .sample_size    = 16,
488                 .rate           = 16000,
489                 .channels       = 2,
490         },
491 };
492
493 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
494         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
495         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
496         .gpio_hp_mute           = -1,
497         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
498         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
499         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
500         .edp_support            = true,
501         .edp_states             = {1776, 888, 0},
502         .i2s_param[HIFI_CODEC]  = {
503                 .audio_port_id  = 1,
504                 .is_i2s_master  = 0,
505                 .i2s_mode       = TEGRA_DAIFMT_I2S,
506                 .sample_size    = 16,
507                 .rate           = 48000,
508                 .channels       = 2,
509         },
510         .i2s_param[BASEBAND]    = {
511                 .audio_port_id  = 2,
512                 .is_i2s_master  = 1,
513                 .i2s_mode       = TEGRA_DAIFMT_I2S,
514                 .sample_size    = 16,
515                 .rate           = 16000,
516                 .channels       = 2,
517                 .bit_clk        = 1024000,
518         },
519         .i2s_param[BT_SCO]      = {
520                 .audio_port_id  = 3,
521                 .is_i2s_master  = 1,
522                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
523                 .sample_size    = 16,
524                 .channels       = 1,
525                 .bit_clk        = 512000,
526         },
527         .i2s_param[VOICE_CODEC] = {
528                 .audio_port_id  = 0,
529                 .is_i2s_master  = 1,
530                 .i2s_mode       = TEGRA_DAIFMT_I2S,
531                 .sample_size    = 16,
532                 .rate           = 16000,
533                 .channels       = 2,
534         },
535 };
536
537 static struct platform_device pluto_audio_device = {
538         .name   = "tegra-snd-cs42l73",
539         .id     = 2,
540         .dev    = {
541                 .platform_data = &pluto_audio_pdata,
542         },
543 };
544
545 static struct platform_device pluto_audio_aic326x_device = {
546         .name   = "tegra-snd-aic326x",
547         .id     = 2,
548         .dev    = {
549                 .platform_data  = &pluto_aic3262_pdata,
550         },
551 };
552
553
554 static struct tegra_spi_device_controller_data dev_bdata = {
555         .rx_clk_tap_delay = 0,
556         .tx_clk_tap_delay = 0,
557 };
558 static struct spi_board_info aic326x_spi_board_info[] = {
559         {
560                 .modalias = "tlv320aic3xxx",
561                 .bus_num = 3,
562                 .chip_select = 0,
563                 .max_speed_hz = 4*1000*1000,
564                 .mode = SPI_MODE_1,
565                 .controller_data = &dev_bdata,
566                 .platform_data = &aic3262_codec_pdata,
567         },
568 };
569
570
571
572 #ifdef CONFIG_MHI_NETDEV
573 struct platform_device mhi_netdevice0 = {
574         .name = "mhi_net_device",
575         .id = 0,
576 };
577 #endif /* CONFIG_MHI_NETDEV */
578
579 static struct platform_device *pluto_devices[] __initdata = {
580         &tegra_pmu_device,
581         &tegra_rtc_device,
582         &tegra_udc_device,
583 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
584         &tegra_smmu_device,
585 #endif
586 #if defined(CONFIG_TEGRA_WATCHDOG)
587         &tegra_wdt0_device,
588 #endif
589 #if defined(CONFIG_TEGRA_AVP)
590         &tegra_avp_device,
591 #endif
592 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
593         &tegra11_se_device,
594 #endif
595         &tegra_ahub_device,
596         &tegra_pcm_device,
597         &tegra_dam_device0,
598         &tegra_dam_device1,
599         &tegra_dam_device2,
600         &tegra_i2s_device0,
601         &tegra_i2s_device1,
602         &tegra_i2s_device2,
603         &tegra_i2s_device3,
604         &tegra_i2s_device4,
605         &tegra_spdif_device,
606         &spdif_dit_device,
607         &bluetooth_dit_device,
608         &baseband_dit_device,
609         &pluto_audio_device,
610         &pluto_audio_aic326x_device,
611         &tegra_hda_device,
612 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
613         &tegra_aes_device,
614 #endif
615 #ifdef CONFIG_MHI_NETDEV
616         &mhi_netdevice0,  /* MHI netdevice */
617 #endif /* CONFIG_MHI_NETDEV */
618 };
619
620 #ifdef CONFIG_USB_SUPPORT
621
622 static void pluto_usb_hsic_postsupend(void)
623 {
624         pr_debug("%s\n", __func__);
625 #ifdef CONFIG_TEGRA_BB_XMM_POWER
626         baseband_xmm_set_power_status(BBXMM_PS_L2);
627 #endif
628 }
629
630 static void pluto_usb_hsic_preresume(void)
631 {
632         pr_debug("%s\n", __func__);
633 #ifdef CONFIG_TEGRA_BB_XMM_POWER
634         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
635 #endif
636 }
637
638 static void pluto_usb_hsic_post_resume(void)
639 {
640         pr_debug("%s\n", __func__);
641 #ifdef CONFIG_TEGRA_BB_XMM_POWER
642         baseband_xmm_set_power_status(BBXMM_PS_L0);
643 #endif
644 }
645
646 static void pluto_usb_hsic_phy_power(void)
647 {
648         pr_debug("%s\n", __func__);
649 #ifdef CONFIG_TEGRA_BB_XMM_POWER
650         baseband_xmm_set_power_status(BBXMM_PS_L0);
651 #endif
652 }
653
654 static void pluto_usb_hsic_post_phy_off(void)
655 {
656         pr_debug("%s\n", __func__);
657 #ifdef CONFIG_TEGRA_BB_XMM_POWER
658         baseband_xmm_set_power_status(BBXMM_PS_L2);
659 #endif
660 }
661
662 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
663         .post_suspend = pluto_usb_hsic_postsupend,
664         .pre_resume = pluto_usb_hsic_preresume,
665         .port_power = pluto_usb_hsic_phy_power,
666         .post_resume = pluto_usb_hsic_post_resume,
667         .post_phy_off = pluto_usb_hsic_post_phy_off,
668 };
669
670 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
671         .port_otg = false,
672         .has_hostpc = true,
673         .unaligned_dma_buf_supported = false,
674         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
675         .op_mode        = TEGRA_USB_OPMODE_HOST,
676         .u_data.host = {
677                 .vbus_gpio = -1,
678                 .hot_plug = false,
679                 .remote_wakeup_supported = true,
680                 .power_off_on_suspend = true,
681         },
682 };
683
684 static struct tegra_usb_platform_data tegra_udc_pdata = {
685         .port_otg = true,
686         .has_hostpc = true,
687         .support_pmu_vbus = true,
688         .id_det_type = TEGRA_USB_PMU_ID,
689         .unaligned_dma_buf_supported = false,
690         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
691         .op_mode = TEGRA_USB_OPMODE_DEVICE,
692         .u_data.dev = {
693                 .vbus_pmu_irq = 0,
694                 .vbus_gpio = -1,
695                 .charging_supported = false,
696                 .remote_wakeup_supported = false,
697         },
698         .u_cfg.utmi = {
699                 .hssync_start_delay = 0,
700                 .elastic_limit = 16,
701                 .idle_wait_delay = 17,
702                 .term_range_adj = 6,
703                 .xcvr_setup = 8,
704                 .xcvr_lsfslew = 0,
705                 .xcvr_lsrslew = 3,
706                 .xcvr_setup_offset = 0,
707                 .xcvr_use_fuses = 1,
708         },
709 };
710
711 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
712         .port_otg = true,
713         .has_hostpc = true,
714         .support_pmu_vbus = true,
715         .id_det_type = TEGRA_USB_PMU_ID,
716         .unaligned_dma_buf_supported = false,
717         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
718         .op_mode = TEGRA_USB_OPMODE_HOST,
719         .u_data.host = {
720                 .vbus_gpio = -1,
721                 .hot_plug = false,
722                 .remote_wakeup_supported = true,
723                 .power_off_on_suspend = true,
724         },
725         .u_cfg.utmi = {
726                 .hssync_start_delay = 0,
727                 .elastic_limit = 16,
728                 .idle_wait_delay = 17,
729                 .term_range_adj = 6,
730                 .xcvr_setup = 15,
731                 .xcvr_lsfslew = 0,
732                 .xcvr_lsrslew = 3,
733                 .xcvr_setup_offset = 0,
734                 .xcvr_use_fuses = 1,
735                 .vbus_oc_map = 0x7,
736         },
737 };
738
739 static struct tegra_usb_otg_data tegra_otg_pdata = {
740         .ehci_device = &tegra_ehci1_device,
741         .ehci_pdata = &tegra_ehci1_utmi_pdata,
742         .id_extcon_dev_name = "MAX77665_MUIC_ID",
743         .vbus_extcon_dev_name = "palmas-extcon",
744 };
745
746 static struct regulator *baseband_reg;
747 static struct gpio modem_gpios[] = { /* i500 modem */
748         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
749 };
750
751 static struct gpio modem2_gpios[] = {
752         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
753         {MDM2_RST, GPIOF_OUT_INIT_LOW, "MODEM2 RESET"},
754 };
755
756 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
757         .port_otg = false,
758         .has_hostpc = true,
759         .unaligned_dma_buf_supported = false,
760         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
761         .op_mode = TEGRA_USB_OPMODE_HOST,
762         .u_data.host = {
763                 .vbus_gpio = -1,
764                 .hot_plug = false,
765                 .remote_wakeup_supported = true,
766                 .power_off_on_suspend = true,
767         },
768 };
769
770 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
771         .port_otg = false,
772         .has_hostpc = true,
773         .unaligned_dma_buf_supported = false,
774         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
775         .op_mode = TEGRA_USB_OPMODE_HOST,
776         .u_data.host = {
777                 .vbus_gpio = -1,
778                 .hot_plug = false,
779                 .remote_wakeup_supported = true,
780                 .power_off_on_suspend = true,
781         },
782 };
783
784 static struct tegra_usb_platform_data tegra_hsic_pdata = {
785         .port_otg = false,
786         .has_hostpc = true,
787         .unaligned_dma_buf_supported = false,
788         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
789         .op_mode        = TEGRA_USB_OPMODE_HOST,
790         .u_data.host = {
791                 .vbus_gpio = -1,
792                 .hot_plug = false,
793                 .remote_wakeup_supported = true,
794                 .power_off_on_suspend = true,
795         },
796 };
797
798 static struct platform_device *
799 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
800 {
801         struct platform_device *pdev;
802         int val;
803
804         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
805         if (!pdev)
806                 return NULL;
807
808         val = platform_device_add_resources(pdev, ehci_dev->resource,
809                                                 ehci_dev->num_resources);
810         if (val)
811                 goto error;
812
813         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
814         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
815
816         val = platform_device_add_data(pdev, &tegra_hsic_pdata,
817                         sizeof(struct tegra_usb_platform_data));
818         if (val)
819                 goto error;
820
821         val = platform_device_add(pdev);
822         if (val)
823                 goto error;
824
825         return pdev;
826
827 error:
828         pr_err("%s: failed to add the host contoller device\n", __func__);
829         platform_device_put(pdev);
830         return NULL;
831 }
832
833 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
834 {
835         struct platform_device *pdev = *platdev;
836
837         if (pdev && &pdev->dev) {
838                 platform_device_unregister(pdev);
839                 *platdev = NULL;
840         } else
841                 pr_err("%s: no platform device\n", __func__);
842 }
843
844 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
845
846 static union tegra_bb_gpio_id bb_gpio_oem1 = {
847         .oem1 = {
848                 .reset = BB_OEM1_GPIO_RST,
849                 .pwron = BB_OEM1_GPIO_ON,
850                 .awr = BB_OEM1_GPIO_AWR,
851                 .cwr = BB_OEM1_GPIO_CWR,
852                 .spare = BB_OEM1_GPIO_SPARE,
853                 .wdi = BB_OEM1_GPIO_WDI,
854         },
855 };
856
857 static struct tegra_bb_pdata bb_pdata_oem1 = {
858         .id = &bb_gpio_oem1,
859         .device = &tegra_ehci3_device,
860         .ehci_register = tegra_usb_hsic_host_register,
861         .ehci_unregister = tegra_usb_hsic_host_unregister,
862         .bb_id = TEGRA_BB_OEM1,
863 };
864
865 static struct platform_device tegra_bb_oem1 = {
866         .name = "tegra_baseband_power",
867         .id = -1,
868         .dev = {
869                 .platform_data = &bb_pdata_oem1,
870         },
871 };
872
873 static int baseband_init(void)
874 {
875         int ret;
876
877         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
878         if (ret) {
879                 pr_warn("%s:gpio request failed\n", __func__);
880                 return ret;
881         }
882
883         baseband_reg = regulator_get(NULL, "vdd_core_bb");
884         if (IS_ERR_OR_NULL(baseband_reg))
885                 pr_warn("%s: baseband regulator get failed\n", __func__);
886         else
887                 regulator_enable(baseband_reg);
888
889         /* enable pull-up for MDM1 UART RX */
890         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PU1,
891                                     TEGRA_PUPD_PULL_UP);
892
893         /* enable pull-down for MDM1_COLD_BOOT */
894         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
895                                     TEGRA_PUPD_PULL_DOWN);
896
897         /* export GPIO for user space access through sysfs */
898         gpio_export(MDM_RST, false);
899
900         return 0;
901 }
902
903 static const struct tegra_modem_operations baseband_operations = {
904         .init = baseband_init,
905 };
906
907 #define MODEM_BOOT_EDP_MAX 0
908 /* FIXME: get accurate boot current value */
909 static unsigned int modem_boot_edp_states[] = { 1900, 0 };
910 static struct edp_client modem_boot_edp_client = {
911         .name = "modem_boot",
912         .states = modem_boot_edp_states,
913         .num_states = ARRAY_SIZE(modem_boot_edp_states),
914         .e0_index = MODEM_BOOT_EDP_MAX,
915         .priority = EDP_MAX_PRIO,
916 };
917
918 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
919         .ops = &baseband_operations,
920         .wake_gpio = -1,
921         .boot_gpio = MDM_COLDBOOT,
922         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
923         .autosuspend_delay = 2000,
924         .short_autosuspend_delay = 50,
925         .tegra_ehci_device = &tegra_ehci2_device,
926         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
927         .modem_boot_edp_client = &modem_boot_edp_client,
928         .edp_manager_name = "battery",
929         .i_breach_ppm = 500000,
930         /* FIXME: get useful adjperiods */
931         .i_thresh_3g_adjperiod = 10000,
932         .i_thresh_lte_adjperiod = 10000,
933 };
934
935 static struct platform_device icera_baseband_device = {
936         .name = "tegra_usb_modem_power",
937         .id = -1,
938         .dev = {
939                 .platform_data = &baseband_pdata,
940         },
941 };
942
943 static void baseband2_start(void)
944 {
945         pr_info("%s\n", __func__);
946         gpio_set_value(MDM2_PWR_ON, 1);
947 }
948
949 static void baseband2_reset(void)
950 {
951         /* Initiate power cycle on baseband sub system */
952         pr_info("%s\n", __func__);
953         gpio_set_value(MDM2_RST, 0);
954         mdelay(200);
955         gpio_set_value(MDM2_RST, 1);
956 }
957
958 static int baseband2_init(void)
959 {
960         int ret;
961
962         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD, TEGRA_TRI_NORMAL);
963
964         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
965         if (ret)
966                 return ret;
967
968         /* enable pull-down for MDM2_COLD_BOOT */
969         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW4,
970                                     TEGRA_PUPD_PULL_DOWN);
971
972         /* export GPIO for user space access through sysfs */
973         gpio_export(MDM2_RST, false);
974
975         return 0;
976 }
977
978 static const struct tegra_modem_operations baseband2_operations = {
979         .init = baseband2_init,
980         .start = baseband2_start,
981         .reset = baseband2_reset,
982 };
983
984 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
985         .ops = &baseband2_operations,
986         .wake_gpio = -1,
987         .boot_gpio = MDM2_COLDBOOT,
988         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
989         .autosuspend_delay = 2000,
990         .short_autosuspend_delay = 50,
991         .tegra_ehci_device = &tegra_ehci3_device,
992         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
993 };
994
995 static struct platform_device icera_baseband2_device = {
996         .name = "tegra_usb_modem_power",
997         .id = -1,
998         .dev = {
999                 .platform_data = &baseband2_pdata,
1000         },
1001 };
1002
1003 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
1004         .baseband_type = BASEBAND_XMM,
1005         .modem = {
1006                 .xmm = {
1007                         .bb_rst = XMM_GPIO_BB_RST,
1008                         .bb_on = XMM_GPIO_BB_ON,
1009                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1010                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1011                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1012                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1013                 },
1014         },
1015 };
1016
1017 static struct platform_device tegra_baseband_xmm_power_device = {
1018         .name = "baseband_xmm_power",
1019         .id = -1,
1020         .dev = {
1021                 .platform_data = &tegra_baseband_xmm_power_data,
1022         },
1023 };
1024
1025 static struct platform_device tegra_baseband_xmm_power2_device = {
1026         .name = "baseband_xmm_power2",
1027         .id = -1,
1028         .dev = {
1029                 .platform_data = &tegra_baseband_xmm_power_data,
1030         },
1031 };
1032
1033 static void pluto_usb_init(void)
1034 {
1035         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1036
1037         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1038                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1039                 platform_device_register(&tegra_otg_device);
1040
1041                 /* Setup the udc platform data */
1042                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1043         }
1044 }
1045
1046 static void pluto_modem_init(void)
1047 {
1048         int modem_id = tegra_get_modem_id();
1049         struct board_info board_info;
1050         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1051
1052         tegra_get_board_info(&board_info);
1053         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1054
1055         switch (modem_id) {
1056         case TEGRA_BB_I500: /* on board i500 HSIC */
1057                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)) {
1058                         platform_device_register(&icera_baseband_device);
1059                 }
1060                 break;
1061         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1062                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1063                         platform_device_register(&icera_baseband2_device);
1064                 }
1065                 break;
1066         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1067                 if ((board_info.board_id == BOARD_E1575) ||
1068                         ((board_info.board_id == BOARD_E1580) &&
1069                                 (board_info.fab >= BOARD_FAB_A03))) {
1070                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1071                                                         TEGRA_TRI_NORMAL);
1072                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1073                 }
1074                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1075                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1076                         tegra_ehci3_device.dev.platform_data
1077                                 = &tegra_hsic_pdata;
1078                         platform_device_register(&tegra_bb_oem1);
1079                 }
1080                 break;
1081         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1082                 /* fix wrong wiring in Pluto A02 */
1083                 if ((board_info.board_id == BOARD_E1580) &&
1084                         (board_info.fab == BOARD_FAB_A02)) {
1085                         pr_info(
1086 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1087                                 __func__);
1088                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1089                                 != MDM2_PWR_ON)
1090                                 pr_err(
1091 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1092                                         __func__);
1093                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1094                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1095                 }
1096                 /* baseband-power.ko will register ehci3 device */
1097                 tegra_hsic_pdata.ops = &oem2_plat_ops;
1098                 tegra_hsic_pdata.u_data.host.remote_wakeup_supported = false;
1099                 tegra_hsic_pdata.u_data.host.power_off_on_suspend = false;
1100                 tegra_ehci3_device.dev.platform_data =
1101                                         &tegra_hsic_pdata;
1102                 tegra_baseband_xmm_power_data.hsic_register =
1103                                                 &tegra_usb_hsic_host_register;
1104                 tegra_baseband_xmm_power_data.hsic_unregister =
1105                                                 &tegra_usb_hsic_host_unregister;
1106                 tegra_baseband_xmm_power_data.ehci_device =
1107                                         &tegra_ehci3_device;
1108                 platform_device_register(&tegra_baseband_xmm_power_device);
1109                 platform_device_register(&tegra_baseband_xmm_power2_device);
1110                 /* override audio settings - use 8kHz */
1111                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1112                         = 2;
1113                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1114                         = 1;
1115                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1116                         = TEGRA_DAIFMT_I2S;
1117                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1118                         = 16;
1119                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1120                         = 8000;
1121                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1122                         = 2;
1123                 break;
1124         case TEGRA_BB_HSIC_HUB: /* HSIC hub */
1125                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1126                         tegra_ehci3_device.dev.platform_data =
1127                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1128                         platform_device_register(&tegra_ehci3_device);
1129                 }
1130                 break;
1131         default:
1132                 return;
1133         }
1134 }
1135
1136 static struct tegra_xusb_pad_data xusb_padctl_data = {
1137         .pad_mux = (0x1 << 0),
1138         .port_cap = (0x1 << 0),
1139         .snps_oc_map = (0x1ff << 0),
1140         .usb2_oc_map = (0x3c << 0),
1141         .ss_port_map = (0x0 << 0),
1142         .oc_det = (0x3f << 10),
1143         .rx_wander = (0xf << 4),
1144         .rx_eq = (0x3070 << 8),
1145         .cdr_cntl = (0x26 << 24),
1146         .dfe_cntl = 0x002008EE,
1147         .hs_slew = (0xE << 6),
1148         .ls_rslew = (0x3 << 14),
1149         .otg_pad0_ctl0 = (0x0 << 19),
1150         .otg_pad1_ctl0 = (0x7 << 19),
1151         .otg_pad0_ctl1 = (0x0 << 0),
1152         .otg_pad1_ctl1 = (0x0 << 0),
1153         .hs_disc_lvl = (0x5 << 2),
1154         .hsic_pad0_ctl0 = (0x00 << 8),
1155         .hsic_pad0_ctl1 = (0x00 << 8),
1156 };
1157
1158 static struct tegra_xusb_board_data xusb_bdata = {
1159         .padctl_data = &xusb_padctl_data,
1160         .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0,
1161         /* ss_portmap[0:3] = SS0 map, ss_portmap[4:7] = SS1 map */
1162         .ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0),
1163 };
1164
1165 static void pluto_xusb_init(void)
1166 {
1167         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1168
1169         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1170                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1171
1172                 pr_info("dalmore_xusb_init: usb_calib0 = 0x%08x\n", usb_calib0);
1173                 /*
1174                  * read from usb_calib0 and pass to driver
1175                  * set HS_CURR_LEVEL (PAD0)     = usb_calib0[5:0]
1176                  * set TERM_RANGE_ADJ           = usb_calib0[10:7]
1177                  * set HS_SQUELCH_LEVEL         = usb_calib0[12:11]
1178                  * set HS_IREF_CAP              = usb_calib0[14:13]
1179                  * set HS_CURR_LEVEL (PAD1)     = usb_calib0[20:15]
1180                  */
1181
1182                 xusb_padctl_data.hs_curr_level_pad0 = (usb_calib0 >> 0) & 0x3f;
1183                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1184                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1185                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1186                 xusb_padctl_data.hs_curr_level_pad1 = (usb_calib0 >> 15) & 0x3f;
1187
1188                 tegra_xusb_init(&xusb_bdata);
1189         }
1190 }
1191 #else
1192 static void pluto_usb_init(void) { }
1193 static void pluto_modem_init(void) { }
1194 static void pluto_xusb_init(void) { }
1195 #endif
1196
1197 static void pluto_audio_init(void)
1198 {
1199         struct board_info board_info;
1200
1201         tegra_get_board_info(&board_info);
1202
1203         spi_register_board_info(aic326x_spi_board_info,
1204                                         ARRAY_SIZE(aic326x_spi_board_info));
1205 }
1206
1207 static struct platform_device *pluto_spi_devices[] __initdata = {
1208         &tegra11_spi_device4,
1209 };
1210
1211 struct spi_clk_parent spi_parent_clk_pluto[] = {
1212         [0] = {.name = "pll_p"},
1213 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
1214         [1] = {.name = "pll_m"},
1215         [2] = {.name = "clk_m"},
1216 #else
1217         [1] = {.name = "clk_m"},
1218 #endif
1219 };
1220
1221 static struct tegra_spi_platform_data pluto_spi_pdata = {
1222         .max_dma_buffer         = 16 * 1024,
1223         .is_clkon_always        = false,
1224         .max_rate               = 25000000,
1225 };
1226
1227 static void __init pluto_spi_init(void)
1228 {
1229         int i;
1230         struct clk *c;
1231         struct board_info board_info, display_board_info;
1232
1233         tegra_get_board_info(&board_info);
1234         tegra_get_display_board_info(&display_board_info);
1235
1236         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_pluto); ++i) {
1237                 c = tegra_get_clock_by_name(spi_parent_clk_pluto[i].name);
1238                 if (IS_ERR_OR_NULL(c)) {
1239                         pr_err("Not able to get the clock for %s\n",
1240                                                 spi_parent_clk_pluto[i].name);
1241                         continue;
1242                 }
1243                 spi_parent_clk_pluto[i].parent_clk = c;
1244                 spi_parent_clk_pluto[i].fixed_clk_rate = clk_get_rate(c);
1245         }
1246         pluto_spi_pdata.parent_clk_list = spi_parent_clk_pluto;
1247         pluto_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_pluto);
1248         pluto_spi_pdata.is_dma_based = (tegra_revision == TEGRA_REVISION_A01)
1249                                                 ? false : true ;
1250         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1251         platform_add_devices(pluto_spi_devices,
1252                                 ARRAY_SIZE(pluto_spi_devices));
1253 }
1254
1255 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1256         /* name         parent          rate            enabled */
1257         { "extern2",    "pll_p",        41000000,       false},
1258         { "clk_out_2",  "extern2",      40800000,       false},
1259         { NULL,         NULL,           0,              0},
1260 };
1261
1262 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1263         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
1264         .config = 0,
1265         .platform_id = RM_PLATFORM_P005,
1266         .name_of_clock = "clk_out_2",
1267         .name_of_clock_con = "extern2",
1268 };
1269
1270 static struct tegra_spi_device_controller_data dev_cdata = {
1271         .rx_clk_tap_delay = 0,
1272         .tx_clk_tap_delay = 0,
1273 };
1274
1275 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1276         {
1277          .modalias = "rm_ts_spidev",
1278          .bus_num = 3,
1279          .chip_select = 2,
1280          .max_speed_hz = 12 * 1000 * 1000,
1281          .mode = SPI_MODE_0,
1282          .controller_data = &dev_cdata,
1283          .platform_data = &rm31080ts_pluto_data,
1284          },
1285 };
1286
1287 static int __init pluto_touch_init(void)
1288 {
1289         tegra_clk_init_from_table(touch_clk_init_table);
1290         rm31080a_pluto_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1291         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1292                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
1293                                 &rm31080ts_pluto_data,
1294                                 &rm31080a_pluto_spi_board[0],
1295                                 ARRAY_SIZE(rm31080a_pluto_spi_board));
1296         return 0;
1297 }
1298
1299 static void __init pluto_dtv_init(void)
1300 {
1301         platform_device_register(&tegra_dtv_device);
1302 }
1303
1304 static void __init tegra_pluto_init(void)
1305 {
1306         pluto_sysedp_init();
1307         tegra_clk_init_from_table(pluto_clk_init_table);
1308         tegra_clk_verify_parents();
1309         tegra_soc_device_init("tegra_pluto");
1310         tegra_enable_pinmux();
1311         pluto_pinmux_init();
1312         pluto_i2c_init();
1313         pluto_spi_init();
1314         pluto_usb_init();
1315         pluto_xusb_init();
1316         pluto_uart_init();
1317         pluto_audio_init();
1318         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1319         tegra_ram_console_debug_init();
1320         tegra_io_dpd_init();
1321         pluto_sdhci_init();
1322         pluto_regulator_init();
1323         pluto_dtv_init();
1324         pluto_suspend_init();
1325         pluto_touch_init();
1326         pluto_emc_init();
1327         pluto_edp_init();
1328         pluto_panel_init();
1329         pluto_pmon_init();
1330         pluto_kbc_init();
1331 #ifdef CONFIG_BT_BLUESLEEP
1332         pluto_setup_bluesleep();
1333         pluto_setup_bt_rfkill();
1334 #elif defined CONFIG_BLUEDROID_PM
1335         pluto_setup_bluedroid_pm();
1336 #endif
1337         tegra_release_bootloader_fb();
1338         pluto_modem_init();
1339 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1340         tegra_wdt_recovery_init();
1341 #endif
1342         pluto_sensors_init();
1343         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1344         pluto_soctherm_init();
1345         tegra_register_fuse();
1346         pluto_sysedp_core_init();
1347         pluto_sysedp_psydepl_init();
1348 }
1349
1350 static void __init pluto_ramconsole_reserve(unsigned long size)
1351 {
1352         tegra_ram_console_debug_reserve(SZ_1M);
1353 }
1354
1355 static void __init tegra_pluto_dt_init(void)
1356 {
1357 #ifdef CONFIG_USE_OF
1358         of_platform_populate(NULL,
1359                 of_default_bus_match_table, NULL, NULL);
1360 #endif
1361
1362         tegra_pluto_init();
1363 }
1364 static void __init tegra_pluto_reserve(void)
1365 {
1366 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1367         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1368         tegra_reserve(0, SZ_16M, SZ_4M);
1369 #else
1370         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1371 #endif
1372         pluto_ramconsole_reserve(SZ_1M);
1373 }
1374
1375 static const char * const pluto_dt_board_compat[] = {
1376         "nvidia,pluto",
1377         NULL
1378 };
1379
1380 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1381         .atag_offset    = 0x100,
1382         .soc            = &tegra_soc_desc,
1383         .map_io         = tegra_map_common_io,
1384         .reserve        = tegra_pluto_reserve,
1385         .init_early     = tegra11x_init_early,
1386         .init_irq       = tegra_init_irq,
1387         .handle_irq     = gic_handle_irq,
1388         .timer          = &tegra_timer,
1389         .init_machine   = tegra_pluto_dt_init,
1390         .restart        = tegra_assert_system_reset,
1391         .dt_compat      = pluto_dt_board_compat,
1392 MACHINE_END