ARM: tegra: pluto: fix power rail entry
[linux-2.6.git] / arch / arm / mach-tegra / board-pluto-power.c
1 /*
2  * arch/arm/mach-tegra/board-pluto-power.c
3  *
4  * Copyright (C) 2012 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25
26 #include <mach/iomap.h>
27 #include <mach/irqs.h>
28 #include <linux/regulator/fixed.h>
29 #include <linux/mfd/palmas.h>
30 #include <linux/regulator/machine.h>
31
32 #include <asm/mach-types.h>
33
34 #include "pm.h"
35 #include "board.h"
36 #include "board-pluto.h"
37
38 #define PMC_CTRL                0x0
39 #define PMC_CTRL_INTR_LOW       (1 << 17)
40
41 /************************ Pluto based regulator ****************/
42 static struct regulator_consumer_supply palmas_smps123_supply[] = {
43         REGULATOR_SUPPLY("vdd_cpu", NULL),
44 };
45
46 static struct regulator_consumer_supply palmas_smps45_supply[] = {
47         REGULATOR_SUPPLY("vdd_core", NULL),
48 };
49
50 static struct regulator_consumer_supply palmas_smps6_supply[] = {
51         REGULATOR_SUPPLY("vdd_core_bb", NULL),
52 };
53
54 static struct regulator_consumer_supply palmas_smps7_supply[] = {
55         REGULATOR_SUPPLY("vddio_ddr", NULL),
56         REGULATOR_SUPPLY("vddio_lpddr3", NULL),
57         REGULATOR_SUPPLY("vcore2_lpddr3", NULL),
58         REGULATOR_SUPPLY("vcore_audio_1v2", NULL),
59 };
60
61 static struct regulator_consumer_supply palmas_smps8_supply[] = {
62         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
63         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
64         REGULATOR_SUPPLY("avdd_osc", NULL),
65         REGULATOR_SUPPLY("vddio_sys", NULL),
66         REGULATOR_SUPPLY("vddio_bb", NULL),
67         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
68         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
69         REGULATOR_SUPPLY("vdd_emmc", "sdhci-tegra.3"),
70         REGULATOR_SUPPLY("vddio_audio", NULL),
71         REGULATOR_SUPPLY("vddio_uart", NULL),
72         REGULATOR_SUPPLY("vddio_gmi", NULL),
73         REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
74         REGULATOR_SUPPLY("vdd_gps", NULL),
75         REGULATOR_SUPPLY("vdd_nfc", NULL),
76         REGULATOR_SUPPLY("vdd_sensor", NULL),
77         REGULATOR_SUPPLY("vdd_dtv", NULL),
78         REGULATOR_SUPPLY("vdd_bb", NULL),
79         REGULATOR_SUPPLY("vcore1_lpddr", NULL),
80         REGULATOR_SUPPLY("vcore_lpddr", NULL),
81         REGULATOR_SUPPLY("vddio_lpddr", NULL),
82         REGULATOR_SUPPLY("vdd_rf", NULL),
83         REGULATOR_SUPPLY("vdd_modem2", NULL),
84         REGULATOR_SUPPLY("vdd_dbg", NULL),
85         REGULATOR_SUPPLY("vdd_sim_1v8", NULL),
86         REGULATOR_SUPPLY("vdd_sim1a_1v8", NULL),
87         REGULATOR_SUPPLY("vdd_sim1b_1v8", NULL),
88         REGULATOR_SUPPLY("dvdd_audio", NULL),
89         REGULATOR_SUPPLY("avdd_audio", NULL),
90         REGULATOR_SUPPLY("vdd_mic", NULL),
91         REGULATOR_SUPPLY("vdd_com_1v8", NULL),
92         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
93         REGULATOR_SUPPLY("avdd_pll_bb", NULL),
94 };
95
96 static struct regulator_consumer_supply palmas_smps9_supply[] = {
97         REGULATOR_SUPPLY("vcore_emmc", NULL),
98         REGULATOR_SUPPLY("vdd_sim_mmc", NULL),
99         REGULATOR_SUPPLY("vdd_sim1a_mmc", NULL),
100         REGULATOR_SUPPLY("vdd_sim1b_mmc", NULL),
101 };
102
103 static struct regulator_consumer_supply palmas_smps10_supply[] = {
104         REGULATOR_SUPPLY("unused_smps10", NULL),
105         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
106         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
107         REGULATOR_SUPPLY("vdd_lcd", NULL),
108 };
109
110 static struct regulator_consumer_supply palmas_ldo1_supply[] = {
111         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
112         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
113         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
114         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
115         REGULATOR_SUPPLY("avdd_pllm", NULL),
116         REGULATOR_SUPPLY("avdd_pllu", NULL),
117         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
118         REGULATOR_SUPPLY("avdd_pllx", NULL),
119         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
120         REGULATOR_SUPPLY("avdd_plle", NULL),
121 };
122
123 static struct regulator_consumer_supply palmas_ldo2_supply[] = {
124         REGULATOR_SUPPLY("avdd_lcd", NULL),
125 };
126
127 static struct regulator_consumer_supply palmas_ldo3_supply[] = {
128         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
129         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
130         REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
131         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.0"),
132         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
133         REGULATOR_SUPPLY("vddio_hsic_bb", NULL),
134         REGULATOR_SUPPLY("vddio_hsic_modem2", NULL),
135 };
136
137 static struct regulator_consumer_supply palmas_ldo4_supply[] = {
138         REGULATOR_SUPPLY("vdd_spare", NULL),
139 };
140
141 static struct regulator_consumer_supply palmas_ldo5_supply[] = {
142         REGULATOR_SUPPLY("avdd_cam1", NULL),
143 };
144
145 static struct regulator_consumer_supply palmas_ldo6_supply[] = {
146         REGULATOR_SUPPLY("vdd_temp", NULL),
147         REGULATOR_SUPPLY("vdd_mb", NULL),
148         REGULATOR_SUPPLY("avdd_ts_3v0", NULL),
149         REGULATOR_SUPPLY("vdd_nfc_3v0", NULL),
150         REGULATOR_SUPPLY("vdd_irled", NULL),
151         REGULATOR_SUPPLY("vdd_sensor_3v0", NULL),
152         REGULATOR_SUPPLY("vdd_3v0_pm", NULL),
153         REGULATOR_SUPPLY("vaux_3v3", NULL),
154 };
155
156 static struct regulator_consumer_supply palmas_ldo7_supply[] = {
157         REGULATOR_SUPPLY("vdd_af_cam1", NULL),
158 };
159 static struct regulator_consumer_supply palmas_ldo8_supply[] = {
160         REGULATOR_SUPPLY("vdd_rtc", NULL),
161 };
162 static struct regulator_consumer_supply palmas_ldo9_supply[] = {
163         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
164 };
165 static struct regulator_consumer_supply palmas_ldoln_supply[] = {
166         REGULATOR_SUPPLY("avdd_cam2", NULL),
167 };
168
169 static struct regulator_consumer_supply palmas_ldousb_supply[] = {
170         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
171         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
172         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
173         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
174         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
175         REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
176         REGULATOR_SUPPLY("vdd_dtv_3v3", NULL),
177
178 };
179
180 #define PALMAS_PDATA_INIT(_name, _minmv, _maxmv, _supply_reg, _always_on, \
181         _boot_on, _apply_uv)                                            \
182         static struct regulator_init_data reg_idata_##_name = {         \
183                 .constraints = {                                        \
184                         .name = palmas_rails(_name),                    \
185                         .min_uV = (_minmv)*1000,                        \
186                         .max_uV = (_maxmv)*1000,                        \
187                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
188                                         REGULATOR_MODE_STANDBY),        \
189                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
190                                         REGULATOR_CHANGE_STATUS |       \
191                                         REGULATOR_CHANGE_VOLTAGE),      \
192                         .always_on = _always_on,                        \
193                         .boot_on = _boot_on,                            \
194                         .apply_uV = _apply_uv,                          \
195                 },                                                      \
196                 .num_consumer_supplies =                                \
197                         ARRAY_SIZE(palmas_##_name##_supply),            \
198                 .consumer_supplies = palmas_##_name##_supply,           \
199                 .supply_regulator = _supply_reg,                        \
200         }
201
202 PALMAS_PDATA_INIT(smps123, 900,  1300, NULL, 0, 0, 0);
203 PALMAS_PDATA_INIT(smps45, 900,  1400, NULL, 0, 0, 0);
204 PALMAS_PDATA_INIT(smps6, 1000,  3300, NULL, 0, 0, 0);
205 PALMAS_PDATA_INIT(smps7, 1200,  1200, NULL, 0, 0, 1);
206 PALMAS_PDATA_INIT(smps8, 1800,  1800, NULL, 0, 1, 1);
207 PALMAS_PDATA_INIT(smps9, 2800,  2800, NULL, 0, 0, 1);
208 PALMAS_PDATA_INIT(smps10, 5000,  5000, NULL, 0, 0, 0);
209 PALMAS_PDATA_INIT(ldo1, 1050,  1050, palmas_rails(smps7), 0, 0, 1);
210 PALMAS_PDATA_INIT(ldo2, 2800,  2800, NULL, 0, 0, 1);
211 PALMAS_PDATA_INIT(ldo3, 1200,  1200, palmas_rails(smps8), 0, 0, 1);
212 PALMAS_PDATA_INIT(ldo4, 900,  3300, NULL, 0, 0, 0);
213 PALMAS_PDATA_INIT(ldo5, 2700,  2700, NULL, 0, 0, 1);
214 PALMAS_PDATA_INIT(ldo6, 3000,  3000, NULL, 0, 0, 1);
215 PALMAS_PDATA_INIT(ldo7, 2800,  2800, NULL, 0, 0, 1);
216 PALMAS_PDATA_INIT(ldo8, 1150,  1150, NULL, 1, 1, 1);
217 PALMAS_PDATA_INIT(ldo9, 1800,  3300, palmas_rails(smps9), 0, 0, 1);
218 PALMAS_PDATA_INIT(ldoln, 2700, 2700, NULL, 0, 0, 1);
219 PALMAS_PDATA_INIT(ldousb, 3300,  3300, NULL, 0, 0, 1);
220
221 #define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
222
223 static struct regulator_init_data *pluto_reg_data[] = {
224         NULL,
225         PALMAS_REG_PDATA(smps123),
226         NULL,
227         PALMAS_REG_PDATA(smps45),
228         NULL,
229         PALMAS_REG_PDATA(smps6),
230         PALMAS_REG_PDATA(smps7),
231         PALMAS_REG_PDATA(smps8),
232         PALMAS_REG_PDATA(smps9),
233         PALMAS_REG_PDATA(smps10),
234         PALMAS_REG_PDATA(ldo1),
235         PALMAS_REG_PDATA(ldo2),
236         PALMAS_REG_PDATA(ldo3),
237         PALMAS_REG_PDATA(ldo4),
238         PALMAS_REG_PDATA(ldo5),
239         PALMAS_REG_PDATA(ldo6),
240         PALMAS_REG_PDATA(ldo7),
241         PALMAS_REG_PDATA(ldo8),
242         PALMAS_REG_PDATA(ldo9),
243         PALMAS_REG_PDATA(ldoln),
244         PALMAS_REG_PDATA(ldousb),
245 };
246
247 #define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,   \
248                 _tstep, _vsel)                                          \
249         static struct palmas_reg_init reg_init_data_##_name = {         \
250                 .warm_reset = _warm_reset,                              \
251                 .roof_floor =   _roof_floor,                            \
252                 .mode_sleep = _mode_sleep,              \
253                 .tstep = _tstep,                        \
254                 .vsel = _vsel,          \
255         }
256
257 PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
258 PALMAS_REG_INIT(smps123, 0, 0, 0, 0, 0);
259 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
260 PALMAS_REG_INIT(smps45, 0, 0, 0, 0, 0);
261 PALMAS_REG_INIT(smps457, 0, 0, 0, 0, 0);
262 PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
263 PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
264 PALMAS_REG_INIT(smps8, 0, 0, 0, 0, 0);
265 PALMAS_REG_INIT(smps9, 0, 0, 0, 0, 0);
266 PALMAS_REG_INIT(smps10, 0, 0, 0, 0, 0);
267 PALMAS_REG_INIT(ldo1, 0, 0, 0, 0, 0);
268 PALMAS_REG_INIT(ldo2, 0, 0, 0, 0, 0);
269 PALMAS_REG_INIT(ldo3, 0, 0, 0, 0, 0);
270 PALMAS_REG_INIT(ldo4, 0, 0, 0, 0, 0);
271 PALMAS_REG_INIT(ldo5, 0, 0, 0, 0, 0);
272 PALMAS_REG_INIT(ldo6, 0, 0, 0, 0, 0);
273 PALMAS_REG_INIT(ldo7, 0, 0, 0, 0, 0);
274 PALMAS_REG_INIT(ldo8, 0, 0, 0, 0, 0);
275 PALMAS_REG_INIT(ldo9, 0, 0, 0, 0, 0);
276 PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
277 PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
278
279 #define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
280 static struct palmas_reg_init *pluto_reg_init[] = {
281         PALMAS_REG_INIT_DATA(smps12),
282         PALMAS_REG_INIT_DATA(smps123),
283         PALMAS_REG_INIT_DATA(smps3),
284         PALMAS_REG_INIT_DATA(smps45),
285         PALMAS_REG_INIT_DATA(smps457),
286         PALMAS_REG_INIT_DATA(smps6),
287         PALMAS_REG_INIT_DATA(smps7),
288         PALMAS_REG_INIT_DATA(smps8),
289         PALMAS_REG_INIT_DATA(smps9),
290         PALMAS_REG_INIT_DATA(smps10),
291         PALMAS_REG_INIT_DATA(ldo1),
292         PALMAS_REG_INIT_DATA(ldo2),
293         PALMAS_REG_INIT_DATA(ldo3),
294         PALMAS_REG_INIT_DATA(ldo4),
295         PALMAS_REG_INIT_DATA(ldo5),
296         PALMAS_REG_INIT_DATA(ldo6),
297         PALMAS_REG_INIT_DATA(ldo7),
298         PALMAS_REG_INIT_DATA(ldo8),
299         PALMAS_REG_INIT_DATA(ldo9),
300         PALMAS_REG_INIT_DATA(ldoln),
301         PALMAS_REG_INIT_DATA(ldousb),
302 };
303
304 static int ac_online(void)
305 {
306         return 1;
307 }
308
309 static struct resource pluto_pda_resources[] = {
310         [0] = {
311                 .name   = "ac",
312         },
313 };
314
315 static struct pda_power_pdata pluto_pda_data = {
316         .is_ac_online   = ac_online,
317 };
318
319 static struct platform_device pluto_pda_power_device = {
320         .name           = "pda-power",
321         .id             = -1,
322         .resource       = pluto_pda_resources,
323         .num_resources  = ARRAY_SIZE(pluto_pda_resources),
324         .dev    = {
325                 .platform_data  = &pluto_pda_data,
326         },
327 };
328
329 /* Always ON /Battery regulator */
330 static struct regulator_consumer_supply fixed_reg_en_battery_supply[] = {
331                 REGULATOR_SUPPLY("vdd_sys_cam", NULL),
332 };
333
334 static struct regulator_consumer_supply fixed_reg_en_vdd_1v8_cam_supply[] = {
335         REGULATOR_SUPPLY("vddio_cam_mb", NULL),
336         REGULATOR_SUPPLY("vdd_1v8_cam12", NULL),
337 };
338
339 static struct regulator_consumer_supply fixed_reg_en_vdd_1v2_cam_supply[] = {
340         REGULATOR_SUPPLY("vdd_1v2_cam", NULL),
341 };
342
343 static struct regulator_consumer_supply fixed_reg_en_avdd_usb3_1v05_supply[] = {
344         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
345         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
346 };
347
348 static struct regulator_consumer_supply fixed_reg_en_vdd_mmc_sdmmc3_supply[] = {
349         REGULATOR_SUPPLY("vdd_sd_slot", "sdhci-tegra.2"),
350 };
351
352 static struct regulator_consumer_supply fixed_reg_en_vdd_lcd_1v8_supply[] = {
353         REGULATOR_SUPPLY("vdd_lcd_1v8_s", NULL),
354 };
355
356 static struct regulator_consumer_supply fixed_reg_en_vdd_lcd_mmc_supply[] = {
357         REGULATOR_SUPPLY("vdd_lcd_mmc_s_f", NULL),
358 };
359
360 static struct regulator_consumer_supply fixed_reg_en_vdd_1v8_mic_supply[] = {
361         REGULATOR_SUPPLY("unused_fixed_reg_en_vdd_1v8_mic", NULL),
362 };
363
364 static struct regulator_consumer_supply fixed_reg_en_vdd_hdmi_5v0_supply[] = {
365         REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
366 };
367
368 static struct regulator_consumer_supply fixed_reg_en_vpp_fuse_supply[] = {
369         REGULATOR_SUPPLY("vpp_fuse", NULL),
370         REGULATOR_SUPPLY("v_efuse", NULL),
371 };
372
373 /* Macro for defining fixed regulator sub device data */
374 #define FIXED_SUPPLY(_name) "fixed_reg_en"#_name
375 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
376         _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts)  \
377         static struct regulator_init_data ri_data_##_var =              \
378         {                                                               \
379                 .supply_regulator = _in_supply,                         \
380                 .num_consumer_supplies =                                \
381                         ARRAY_SIZE(fixed_reg_en_##_name##_supply),      \
382                 .consumer_supplies = fixed_reg_en_##_name##_supply,     \
383                 .constraints = {                                        \
384                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
385                                         REGULATOR_MODE_STANDBY),        \
386                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
387                                         REGULATOR_CHANGE_STATUS |       \
388                                         REGULATOR_CHANGE_VOLTAGE),      \
389                         .always_on = _always_on,                        \
390                         .boot_on = _boot_on,                            \
391                 },                                                      \
392         };                                                              \
393         static struct fixed_voltage_config fixed_reg_en_##_var##_pdata = \
394         {                                                               \
395                 .supply_name = FIXED_SUPPLY(_name),                     \
396                 .microvolts = _millivolts * 1000,                       \
397                 .gpio = _gpio_nr,                                       \
398                 .gpio_is_open_drain = _open_drain,                      \
399                 .enable_high = _active_high,                            \
400                 .enabled_at_boot = _boot_state,                         \
401                 .init_data = &ri_data_##_var,                           \
402         };                                                              \
403         static struct platform_device fixed_reg_en_##_var##_dev = {     \
404                 .name = "reg-fixed-voltage",                            \
405                 .id = _id,                                              \
406                 .dev = {                                                \
407                         .platform_data = &fixed_reg_en_##_var##_pdata,  \
408                 },                                                      \
409         }
410
411 FIXED_REG(0,    battery,        battery,
412         NULL,   0,      0,
413         -1,     false, true,    0,      3300);
414
415 FIXED_REG(1,    vdd_1v8_cam,    vdd_1v8_cam,
416         palmas_rails(smps8),    0,      0,
417         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO1,  false, true,    0,      1800);
418
419 FIXED_REG(2,    vdd_1v2_cam,    vdd_1v2_cam,
420         palmas_rails(smps7),    0,      0,
421         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO2,  false, true,    0,      1200);
422
423 FIXED_REG(3,    avdd_usb3_1v05, avdd_usb3_1v05,
424         palmas_rails(smps8),    0,      0,
425         TEGRA_GPIO_PK5, false,  true,   0,      1050);
426
427 FIXED_REG(4,    vdd_mmc_sdmmc3, vdd_mmc_sdmmc3,
428         palmas_rails(smps9),    0,      0,
429         TEGRA_GPIO_PK1, false,  true,   0,      3300);
430
431 FIXED_REG(5,    vdd_lcd_1v8,    vdd_lcd_1v8,
432         palmas_rails(smps8),    0,      0,
433         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO4,  false,  true,   0,      1800);
434
435 FIXED_REG(6,    vdd_lcd_mmc,    vdd_lcd_mmc,
436         palmas_rails(smps9),    0,      0,
437         TEGRA_GPIO_PI4, false,  true,   0,      1800);
438
439 FIXED_REG(7,    vdd_1v8_mic,    vdd_1v8_mic,
440         palmas_rails(smps8),    0,      0,
441         -1,     false,  true,   0,      1800);
442
443 FIXED_REG(8,    vdd_hdmi_5v0,   vdd_hdmi_5v0,
444         palmas_rails(smps10),   0,      0,
445         TEGRA_GPIO_PK6, true,   true,   0,      5000);
446
447 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
448 FIXED_REG(9,    vpp_fuse,       vpp_fuse,
449         palmas_rails(smps8),    0,      0,
450         TEGRA_GPIO_PX4, false,  true,   0,      1800);
451 #else
452 FIXED_REG(9,    vpp_fuse,       vpp_fuse,
453         palmas_rails(smps8),    0,      0,
454         TEGRA_GPIO_PX0, false,  true,   0,      1800);
455 #endif
456
457 /*
458  * Creating the fixed regulator device tables
459  */
460 #define ADD_FIXED_REG(_name)    (&fixed_reg_en_##_name##_dev)
461
462 #define E1580_COMMON_FIXED_REG                  \
463         ADD_FIXED_REG(battery),                 \
464         ADD_FIXED_REG(vdd_1v8_cam),             \
465         ADD_FIXED_REG(vdd_1v2_cam),             \
466         ADD_FIXED_REG(avdd_usb3_1v05),          \
467         ADD_FIXED_REG(vdd_mmc_sdmmc3),          \
468         ADD_FIXED_REG(vdd_lcd_1v8),             \
469         ADD_FIXED_REG(vdd_lcd_mmc),             \
470         ADD_FIXED_REG(vdd_1v8_mic),             \
471         ADD_FIXED_REG(vdd_hdmi_5v0),
472
473 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
474 #define E1580_T114_FIXED_REG                    \
475         ADD_FIXED_REG(vpp_fuse),
476 #endif
477
478 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
479 #define E1580_T30_FIXED_REG                     \
480         ADD_FIXED_REG(vpp_fuse),
481 #endif
482
483 /* Gpio switch regulator platform data for Pluto E1580 */
484 static struct platform_device *pfixed_reg_devs[] = {
485         E1580_COMMON_FIXED_REG
486 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
487         E1580_T114_FIXED_REG
488 #endif
489 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
490         E1580_T30_FIXED_REG
491 #endif
492 };
493
494 static struct palmas_pmic_platform_data pmic_platform = {
495         .reg_data = pluto_reg_data,
496         .reg_init = pluto_reg_init,
497 };
498
499 static struct palmas_platform_data palmas_pdata = {
500         .gpio_base = PALMAS_TEGRA_GPIO_BASE,
501         .irq_base = PALMAS_TEGRA_IRQ_BASE,
502         .pmic_pdata = &pmic_platform,
503         .mux_from_pdata = true,
504         .pad1 = 0,
505         .pad2 = 0,
506 };
507
508 static struct i2c_board_info palma_device[] = {
509         {
510                 I2C_BOARD_INFO("tps65913", 0x58),
511                 .irq            = INT_EXTERNAL_PMU,
512                 .platform_data  = &palmas_pdata,
513         },
514 };
515
516 int __init pluto_regulator_init(void)
517 {
518         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
519         u32 pmc_ctrl;
520
521         /* TPS65913: Normal state of INT request line is LOW.
522          * configure the power management controller to trigger PMU
523          * interrupts when HIGH.
524          */
525         pmc_ctrl = readl(pmc + PMC_CTRL);
526         writel(pmc_ctrl & ~PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
527
528         platform_device_register(&pluto_pda_power_device);
529         i2c_register_board_info(4, palma_device,
530                         ARRAY_SIZE(palma_device));
531         return 0;
532 }
533
534 static int __init pluto_fixed_regulator_init(void)
535 {
536         if (!machine_is_tegra_pluto())
537                 return 0;
538
539         return platform_add_devices(pfixed_reg_devs,
540                         ARRAY_SIZE(pfixed_reg_devs));
541 }
542 subsys_initcall_sync(pluto_fixed_regulator_init);
543
544 static struct tegra_suspend_platform_data pluto_suspend_data = {
545         .cpu_timer      = 2000,
546         .cpu_off_timer  = 0,
547         .suspend_mode   = TEGRA_SUSPEND_NONE,
548         .core_timer     = 0x7e7e,
549         .core_off_timer = 0,
550         .corereq_high   = false,
551         .sysclkreq_high = true,
552 };
553
554 int __init pluto_suspend_init(void)
555 {
556         tegra_init_suspend(&pluto_suspend_data);
557         return 0;
558 }
559