ARM: tegra: pluto: enable sleep for rails
[linux-2.6.git] / arch / arm / mach-tegra / board-pluto-power.c
1 /*
2  * arch/arm/mach-tegra/board-pluto-power.c
3  *
4  * Copyright (C) 2012 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25
26 #include <mach/iomap.h>
27 #include <mach/irqs.h>
28 #include <linux/regulator/fixed.h>
29 #include <linux/mfd/palmas.h>
30 #include <linux/regulator/machine.h>
31
32 #include <asm/mach-types.h>
33
34 #include "pm.h"
35 #include "board.h"
36 #include "board-pluto.h"
37
38 #define PMC_CTRL                0x0
39 #define PMC_CTRL_INTR_LOW       (1 << 17)
40
41 /************************ Pluto based regulator ****************/
42 static struct regulator_consumer_supply palmas_smps123_supply[] = {
43         REGULATOR_SUPPLY("vdd_cpu", NULL),
44 };
45
46 static struct regulator_consumer_supply palmas_smps45_supply[] = {
47         REGULATOR_SUPPLY("vdd_core", NULL),
48 };
49
50 static struct regulator_consumer_supply palmas_smps6_supply[] = {
51         REGULATOR_SUPPLY("vdd_core_bb", NULL),
52 };
53
54 static struct regulator_consumer_supply palmas_smps7_supply[] = {
55         REGULATOR_SUPPLY("vddio_ddr", NULL),
56         REGULATOR_SUPPLY("vddio_lpddr3", NULL),
57         REGULATOR_SUPPLY("vcore2_lpddr3", NULL),
58         REGULATOR_SUPPLY("vcore_audio_1v2", NULL),
59 };
60
61 static struct regulator_consumer_supply palmas_smps8_supply[] = {
62         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
63         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
64         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
65         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
66         REGULATOR_SUPPLY("avdd_osc", NULL),
67         REGULATOR_SUPPLY("vddio_sys", NULL),
68         REGULATOR_SUPPLY("vddio_bb", NULL),
69         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
70         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
71         REGULATOR_SUPPLY("vdd_emmc", "sdhci-tegra.3"),
72         REGULATOR_SUPPLY("vddio_audio", NULL),
73         REGULATOR_SUPPLY("vddio_uart", NULL),
74         REGULATOR_SUPPLY("vddio_gmi", NULL),
75         REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
76         REGULATOR_SUPPLY("vdd_gps", NULL),
77         REGULATOR_SUPPLY("vdd_nfc", NULL),
78         REGULATOR_SUPPLY("vdd_sensor", NULL),
79         REGULATOR_SUPPLY("vdd_dtv", NULL),
80         REGULATOR_SUPPLY("vdd_bb", NULL),
81         REGULATOR_SUPPLY("vcore1_lpddr", NULL),
82         REGULATOR_SUPPLY("vcore_lpddr", NULL),
83         REGULATOR_SUPPLY("vddio_lpddr", NULL),
84         REGULATOR_SUPPLY("vdd_rf", NULL),
85         REGULATOR_SUPPLY("vdd_modem2", NULL),
86         REGULATOR_SUPPLY("vdd_dbg", NULL),
87         REGULATOR_SUPPLY("vdd_sim_1v8", NULL),
88         REGULATOR_SUPPLY("vdd_sim1a_1v8", NULL),
89         REGULATOR_SUPPLY("vdd_sim1b_1v8", NULL),
90         REGULATOR_SUPPLY("dvdd_audio", NULL),
91         REGULATOR_SUPPLY("avdd_audio", NULL),
92         REGULATOR_SUPPLY("vdd_com_1v8", NULL),
93         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
94         REGULATOR_SUPPLY("avdd_pll_bb", NULL),
95 };
96
97 static struct regulator_consumer_supply palmas_smps9_supply[] = {
98         REGULATOR_SUPPLY("vcore_emmc", NULL),
99         REGULATOR_SUPPLY("vdd_sim_mmc", NULL),
100         REGULATOR_SUPPLY("vdd_sim1a_mmc", NULL),
101         REGULATOR_SUPPLY("vdd_sim1b_mmc", NULL),
102 };
103
104 static struct regulator_consumer_supply palmas_smps10_supply[] = {
105         REGULATOR_SUPPLY("unused_smps10", NULL),
106         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
107         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
108         REGULATOR_SUPPLY("vdd_lcd", NULL),
109 };
110
111 static struct regulator_consumer_supply palmas_ldo1_supply[] = {
112         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
113         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
114         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
115         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
116         REGULATOR_SUPPLY("avdd_pllm", NULL),
117         REGULATOR_SUPPLY("avdd_pllu", NULL),
118         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
119         REGULATOR_SUPPLY("avdd_pllx", NULL),
120         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
121         REGULATOR_SUPPLY("avdd_plle", NULL),
122 };
123
124 static struct regulator_consumer_supply palmas_ldo2_supply[] = {
125         REGULATOR_SUPPLY("avdd_lcd", NULL),
126 };
127
128 static struct regulator_consumer_supply palmas_ldo3_supply[] = {
129         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
130         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
131         REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
132         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.0"),
133         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
134         REGULATOR_SUPPLY("vddio_hsic_bb", NULL),
135         REGULATOR_SUPPLY("vddio_hsic_modem2", NULL),
136 };
137
138 static struct regulator_consumer_supply palmas_ldo4_supply[] = {
139         REGULATOR_SUPPLY("vdd_spare", NULL),
140 };
141
142 static struct regulator_consumer_supply palmas_ldo5_supply[] = {
143         REGULATOR_SUPPLY("avdd_cam1", NULL),
144 };
145
146 static struct regulator_consumer_supply palmas_ldo6_supply[] = {
147         REGULATOR_SUPPLY("vdd_temp", NULL),
148         REGULATOR_SUPPLY("vdd_mb", NULL),
149         REGULATOR_SUPPLY("avdd_ts_3v0", NULL),
150         REGULATOR_SUPPLY("vdd_nfc_3v0", NULL),
151         REGULATOR_SUPPLY("vdd_irled", NULL),
152         REGULATOR_SUPPLY("vdd_sensor_3v0", NULL),
153         REGULATOR_SUPPLY("vdd_3v0_pm", NULL),
154         REGULATOR_SUPPLY("vaux_3v3", NULL),
155         REGULATOR_SUPPLY("vdd", "0-0044"),
156 };
157
158 static struct regulator_consumer_supply palmas_ldo7_supply[] = {
159         REGULATOR_SUPPLY("vdd_af_cam1", NULL),
160 };
161 static struct regulator_consumer_supply palmas_ldo8_supply[] = {
162         REGULATOR_SUPPLY("vdd_rtc", NULL),
163 };
164 static struct regulator_consumer_supply palmas_ldo9_supply[] = {
165         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
166 };
167 static struct regulator_consumer_supply palmas_ldoln_supply[] = {
168         REGULATOR_SUPPLY("avdd_cam2", NULL),
169 };
170
171 static struct regulator_consumer_supply palmas_ldousb_supply[] = {
172         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
173         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
174         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
175         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
176         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
177         REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
178         REGULATOR_SUPPLY("vdd_dtv_3v3", NULL),
179
180 };
181
182 static struct regulator_consumer_supply palmas_regen1_supply[] = {
183         REGULATOR_SUPPLY("mic_ventral", NULL),
184 };
185
186 static struct regulator_consumer_supply palmas_regen2_supply[] = {
187         REGULATOR_SUPPLY("vdd_mic", NULL),
188 };
189
190 #define PALMAS_PDATA_INIT(_name, _minmv, _maxmv, _supply_reg, _always_on, \
191         _boot_on, _apply_uv)                                            \
192         static struct regulator_init_data reg_idata_##_name = {         \
193                 .constraints = {                                        \
194                         .name = palmas_rails(_name),                    \
195                         .min_uV = (_minmv)*1000,                        \
196                         .max_uV = (_maxmv)*1000,                        \
197                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
198                                         REGULATOR_MODE_STANDBY),        \
199                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
200                                         REGULATOR_CHANGE_STATUS |       \
201                                         REGULATOR_CHANGE_VOLTAGE),      \
202                         .always_on = _always_on,                        \
203                         .boot_on = _boot_on,                            \
204                         .apply_uV = _apply_uv,                          \
205                 },                                                      \
206                 .num_consumer_supplies =                                \
207                         ARRAY_SIZE(palmas_##_name##_supply),            \
208                 .consumer_supplies = palmas_##_name##_supply,           \
209                 .supply_regulator = _supply_reg,                        \
210         }
211
212 PALMAS_PDATA_INIT(smps123, 900,  1300, NULL, 0, 0, 0);
213 PALMAS_PDATA_INIT(smps45, 900,  1400, NULL, 0, 0, 0);
214 PALMAS_PDATA_INIT(smps6, 1000,  3300, NULL, 0, 0, 0);
215 PALMAS_PDATA_INIT(smps7, 1200,  1200, NULL, 0, 0, 1);
216 PALMAS_PDATA_INIT(smps8, 1800,  1800, NULL, 0, 1, 1);
217 PALMAS_PDATA_INIT(smps9, 2800,  2800, NULL, 0, 0, 1);
218 PALMAS_PDATA_INIT(smps10, 5000,  5000, NULL, 0, 0, 0);
219 PALMAS_PDATA_INIT(ldo1, 1050,  1050, palmas_rails(smps7), 0, 0, 1);
220 PALMAS_PDATA_INIT(ldo2, 2800,  2800, NULL, 0, 0, 1);
221 PALMAS_PDATA_INIT(ldo3, 1200,  1200, palmas_rails(smps8), 0, 0, 1);
222 PALMAS_PDATA_INIT(ldo4, 900,  3300, NULL, 0, 0, 0);
223 PALMAS_PDATA_INIT(ldo5, 2700,  2700, NULL, 0, 0, 1);
224 PALMAS_PDATA_INIT(ldo6, 3000,  3000, NULL, 0, 0, 1);
225 PALMAS_PDATA_INIT(ldo7, 2800,  2800, NULL, 0, 0, 1);
226 PALMAS_PDATA_INIT(ldo8, 1150,  1150, NULL, 1, 1, 1);
227 PALMAS_PDATA_INIT(ldo9, 1800,  3300, palmas_rails(smps9), 0, 0, 1);
228 PALMAS_PDATA_INIT(ldoln, 2700, 2700, NULL, 0, 0, 1);
229 PALMAS_PDATA_INIT(ldousb, 3300,  3300, NULL, 0, 0, 1);
230 PALMAS_PDATA_INIT(regen1, 4300,  4300, NULL, 0, 0, 0);
231 PALMAS_PDATA_INIT(regen2, 4300,  4300, palmas_rails(smps8), 0, 0, 0);
232
233 #define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
234
235 static struct regulator_init_data *pluto_reg_data[] = {
236         NULL,
237         PALMAS_REG_PDATA(smps123),
238         NULL,
239         PALMAS_REG_PDATA(smps45),
240         NULL,
241         PALMAS_REG_PDATA(smps6),
242         PALMAS_REG_PDATA(smps7),
243         PALMAS_REG_PDATA(smps8),
244         PALMAS_REG_PDATA(smps9),
245         PALMAS_REG_PDATA(smps10),
246         PALMAS_REG_PDATA(ldo1),
247         PALMAS_REG_PDATA(ldo2),
248         PALMAS_REG_PDATA(ldo3),
249         PALMAS_REG_PDATA(ldo4),
250         PALMAS_REG_PDATA(ldo5),
251         PALMAS_REG_PDATA(ldo6),
252         PALMAS_REG_PDATA(ldo7),
253         PALMAS_REG_PDATA(ldo8),
254         PALMAS_REG_PDATA(ldo9),
255         PALMAS_REG_PDATA(ldoln),
256         PALMAS_REG_PDATA(ldousb),
257         PALMAS_REG_PDATA(regen1),
258         PALMAS_REG_PDATA(regen2),
259         NULL,
260         NULL,
261         NULL,
262 };
263
264 #define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,   \
265                 _tstep, _vsel)                                          \
266         static struct palmas_reg_init reg_init_data_##_name = {         \
267                 .warm_reset = _warm_reset,                              \
268                 .roof_floor =   _roof_floor,                            \
269                 .mode_sleep = _mode_sleep,              \
270                 .tstep = _tstep,                        \
271                 .vsel = _vsel,          \
272         }
273
274 PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
275 PALMAS_REG_INIT(smps123, 0, PALMAS_EXT_CONTROL_ENABLE1, 0, 0, 0);
276 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
277 PALMAS_REG_INIT(smps45, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
278 PALMAS_REG_INIT(smps457, 0, 0, 0, 0, 0);
279 PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
280 PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
281 PALMAS_REG_INIT(smps8, 0, 0, 0, 0, 0);
282 PALMAS_REG_INIT(smps9, 0, 0, 0, 0, 0);
283 PALMAS_REG_INIT(smps10, 0, 0, 0, 0, 0);
284 PALMAS_REG_INIT(ldo1, 0, 0, 0, 0, 0);
285 PALMAS_REG_INIT(ldo2, 0, 0, 0, 0, 0);
286 PALMAS_REG_INIT(ldo3, 0, 0, 0, 0, 0);
287 PALMAS_REG_INIT(ldo4, 0, 0, 0, 0, 0);
288 PALMAS_REG_INIT(ldo5, 0, 0, 0, 0, 0);
289 PALMAS_REG_INIT(ldo6, 0, 0, 0, 0, 0);
290 PALMAS_REG_INIT(ldo7, 0, 0, 0, 0, 0);
291 PALMAS_REG_INIT(ldo8, 0, 0, 0, 0, 0);
292 PALMAS_REG_INIT(ldo9, 0, 0, 0, 0, 0);
293 PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
294 PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
295
296 #define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
297 static struct palmas_reg_init *pluto_reg_init[] = {
298         PALMAS_REG_INIT_DATA(smps12),
299         PALMAS_REG_INIT_DATA(smps123),
300         PALMAS_REG_INIT_DATA(smps3),
301         PALMAS_REG_INIT_DATA(smps45),
302         PALMAS_REG_INIT_DATA(smps457),
303         PALMAS_REG_INIT_DATA(smps6),
304         PALMAS_REG_INIT_DATA(smps7),
305         PALMAS_REG_INIT_DATA(smps8),
306         PALMAS_REG_INIT_DATA(smps9),
307         PALMAS_REG_INIT_DATA(smps10),
308         PALMAS_REG_INIT_DATA(ldo1),
309         PALMAS_REG_INIT_DATA(ldo2),
310         PALMAS_REG_INIT_DATA(ldo3),
311         PALMAS_REG_INIT_DATA(ldo4),
312         PALMAS_REG_INIT_DATA(ldo5),
313         PALMAS_REG_INIT_DATA(ldo6),
314         PALMAS_REG_INIT_DATA(ldo7),
315         PALMAS_REG_INIT_DATA(ldo8),
316         PALMAS_REG_INIT_DATA(ldo9),
317         PALMAS_REG_INIT_DATA(ldoln),
318         PALMAS_REG_INIT_DATA(ldousb),
319 };
320
321 static int ac_online(void)
322 {
323         return 1;
324 }
325
326 static struct resource pluto_pda_resources[] = {
327         [0] = {
328                 .name   = "ac",
329         },
330 };
331
332 static struct pda_power_pdata pluto_pda_data = {
333         .is_ac_online   = ac_online,
334 };
335
336 static struct platform_device pluto_pda_power_device = {
337         .name           = "pda-power",
338         .id             = -1,
339         .resource       = pluto_pda_resources,
340         .num_resources  = ARRAY_SIZE(pluto_pda_resources),
341         .dev    = {
342                 .platform_data  = &pluto_pda_data,
343         },
344 };
345
346 /* Always ON /Battery regulator */
347 static struct regulator_consumer_supply fixed_reg_en_battery_supply[] = {
348                 REGULATOR_SUPPLY("vdd_sys_cam", NULL),
349                 REGULATOR_SUPPLY("vdd_sys_bl", NULL),
350 };
351
352 static struct regulator_consumer_supply fixed_reg_en_vdd_1v8_cam_supply[] = {
353         REGULATOR_SUPPLY("vddio_cam_mb", NULL),
354         REGULATOR_SUPPLY("vdd_1v8_cam12", NULL),
355 };
356
357 static struct regulator_consumer_supply fixed_reg_en_vdd_1v2_cam_supply[] = {
358         REGULATOR_SUPPLY("vdd_1v2_cam", NULL),
359 };
360
361 static struct regulator_consumer_supply fixed_reg_en_avdd_usb3_1v05_supply[] = {
362         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
363         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
364 };
365
366 static struct regulator_consumer_supply fixed_reg_en_vdd_mmc_sdmmc3_supply[] = {
367         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.2"),
368 };
369
370 static struct regulator_consumer_supply fixed_reg_en_vdd_lcd_1v8_supply[] = {
371         REGULATOR_SUPPLY("vdd_lcd_1v8_s", NULL),
372 };
373
374 static struct regulator_consumer_supply fixed_reg_en_vdd_lcd_mmc_supply[] = {
375         REGULATOR_SUPPLY("vdd_lcd_mmc_s_f", NULL),
376 };
377
378 static struct regulator_consumer_supply fixed_reg_en_vdd_1v8_mic_supply[] = {
379         REGULATOR_SUPPLY("unused_fixed_reg_en_vdd_1v8_mic", NULL),
380 };
381
382 static struct regulator_consumer_supply fixed_reg_en_vdd_hdmi_5v0_supply[] = {
383         REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
384 };
385
386 static struct regulator_consumer_supply fixed_reg_en_vpp_fuse_supply[] = {
387         REGULATOR_SUPPLY("vpp_fuse", NULL),
388         REGULATOR_SUPPLY("v_efuse", NULL),
389 };
390
391 /* Macro for defining fixed regulator sub device data */
392 #define FIXED_SUPPLY(_name) "fixed_reg_en"#_name
393 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
394         _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts)  \
395         static struct regulator_init_data ri_data_##_var =              \
396         {                                                               \
397                 .supply_regulator = _in_supply,                         \
398                 .num_consumer_supplies =                                \
399                         ARRAY_SIZE(fixed_reg_en_##_name##_supply),      \
400                 .consumer_supplies = fixed_reg_en_##_name##_supply,     \
401                 .constraints = {                                        \
402                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
403                                         REGULATOR_MODE_STANDBY),        \
404                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
405                                         REGULATOR_CHANGE_STATUS |       \
406                                         REGULATOR_CHANGE_VOLTAGE),      \
407                         .always_on = _always_on,                        \
408                         .boot_on = _boot_on,                            \
409                 },                                                      \
410         };                                                              \
411         static struct fixed_voltage_config fixed_reg_en_##_var##_pdata = \
412         {                                                               \
413                 .supply_name = FIXED_SUPPLY(_name),                     \
414                 .microvolts = _millivolts * 1000,                       \
415                 .gpio = _gpio_nr,                                       \
416                 .gpio_is_open_drain = _open_drain,                      \
417                 .enable_high = _active_high,                            \
418                 .enabled_at_boot = _boot_state,                         \
419                 .init_data = &ri_data_##_var,                           \
420         };                                                              \
421         static struct platform_device fixed_reg_en_##_var##_dev = {     \
422                 .name = "reg-fixed-voltage",                            \
423                 .id = _id,                                              \
424                 .dev = {                                                \
425                         .platform_data = &fixed_reg_en_##_var##_pdata,  \
426                 },                                                      \
427         }
428
429 FIXED_REG(0,    battery,        battery,
430         NULL,   0,      0,
431         -1,     false, true,    0,      3300);
432
433 FIXED_REG(1,    vdd_1v8_cam,    vdd_1v8_cam,
434         palmas_rails(smps8),    0,      0,
435         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO1,  false, true,    0,      1800);
436
437 FIXED_REG(2,    vdd_1v2_cam,    vdd_1v2_cam,
438         palmas_rails(smps7),    0,      0,
439         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO2,  false, true,    0,      1200);
440
441 FIXED_REG(3,    avdd_usb3_1v05, avdd_usb3_1v05,
442         palmas_rails(smps8),    0,      0,
443         TEGRA_GPIO_PK5, false,  true,   0,      1050);
444
445 FIXED_REG(4,    vdd_mmc_sdmmc3, vdd_mmc_sdmmc3,
446         palmas_rails(smps9),    0,      0,
447         TEGRA_GPIO_PK1, false,  true,   0,      3300);
448
449 FIXED_REG(5,    vdd_lcd_1v8,    vdd_lcd_1v8,
450         palmas_rails(smps8),    0,      0,
451         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO4,  false,  true,   0,      1800);
452
453 FIXED_REG(6,    vdd_lcd_mmc,    vdd_lcd_mmc,
454         palmas_rails(smps9),    0,      0,
455         TEGRA_GPIO_PI4, false,  true,   0,      1800);
456
457 FIXED_REG(7,    vdd_1v8_mic,    vdd_1v8_mic,
458         palmas_rails(smps8),    0,      0,
459         -1,     false,  true,   0,      1800);
460
461 FIXED_REG(8,    vdd_hdmi_5v0,   vdd_hdmi_5v0,
462         palmas_rails(smps10),   0,      0,
463         TEGRA_GPIO_PK6, true,   true,   0,      5000);
464
465 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
466 FIXED_REG(9,    vpp_fuse,       vpp_fuse,
467         palmas_rails(smps8),    0,      0,
468         TEGRA_GPIO_PX4, false,  true,   0,      1800);
469 #else
470 FIXED_REG(9,    vpp_fuse,       vpp_fuse,
471         palmas_rails(smps8),    0,      0,
472         TEGRA_GPIO_PX0, false,  true,   0,      1800);
473 #endif
474
475 /*
476  * Creating the fixed regulator device tables
477  */
478 #define ADD_FIXED_REG(_name)    (&fixed_reg_en_##_name##_dev)
479
480 #define E1580_COMMON_FIXED_REG                  \
481         ADD_FIXED_REG(battery),                 \
482         ADD_FIXED_REG(vdd_1v8_cam),             \
483         ADD_FIXED_REG(vdd_1v2_cam),             \
484         ADD_FIXED_REG(avdd_usb3_1v05),          \
485         ADD_FIXED_REG(vdd_mmc_sdmmc3),          \
486         ADD_FIXED_REG(vdd_lcd_1v8),             \
487         ADD_FIXED_REG(vdd_lcd_mmc),             \
488         ADD_FIXED_REG(vdd_1v8_mic),             \
489         ADD_FIXED_REG(vdd_hdmi_5v0),
490
491 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
492 #define E1580_T114_FIXED_REG                    \
493         ADD_FIXED_REG(vpp_fuse),
494 #endif
495
496 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
497 #define E1580_T30_FIXED_REG                     \
498         ADD_FIXED_REG(vpp_fuse),
499 #endif
500
501 /* Gpio switch regulator platform data for Pluto E1580 */
502 static struct platform_device *pfixed_reg_devs[] = {
503         E1580_COMMON_FIXED_REG
504 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
505         E1580_T114_FIXED_REG
506 #endif
507 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
508         E1580_T30_FIXED_REG
509 #endif
510 };
511
512 static struct palmas_pmic_platform_data pmic_platform = {
513         .reg_data = pluto_reg_data,
514         .reg_init = pluto_reg_init,
515         .enable_ldo8_tracking = true,
516 };
517
518 struct palmas_clk32k_init_data palmas_clk32k_idata[] = {
519         {
520                 .clk32k_id = PALMAS_CLOCK32KG,
521                 .enable = true,
522         }, {
523                 .clk32k_id = PALMAS_CLOCK32KG_AUDIO,
524                 .enable = true,
525         },
526 };
527
528 static struct palmas_platform_data palmas_pdata = {
529         .gpio_base = PALMAS_TEGRA_GPIO_BASE,
530         .irq_base = PALMAS_TEGRA_IRQ_BASE,
531         .pmic_pdata = &pmic_platform,
532         .mux_from_pdata = true,
533         .pad1 = 0,
534         .pad2 = (PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK &
535                         (1 << PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_SHIFT)),
536         .clk32k_init_data =  palmas_clk32k_idata,
537         .clk32k_init_data_size = ARRAY_SIZE(palmas_clk32k_idata),
538 };
539
540 static struct i2c_board_info palma_device[] = {
541         {
542                 I2C_BOARD_INFO("tps65913", 0x58),
543                 .irq            = INT_EXTERNAL_PMU,
544                 .platform_data  = &palmas_pdata,
545         },
546 };
547
548 int __init pluto_regulator_init(void)
549 {
550         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
551         u32 pmc_ctrl;
552
553         /* TPS65913: Normal state of INT request line is LOW.
554          * configure the power management controller to trigger PMU
555          * interrupts when HIGH.
556          */
557         pmc_ctrl = readl(pmc + PMC_CTRL);
558         writel(pmc_ctrl & ~PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
559
560         platform_device_register(&pluto_pda_power_device);
561         i2c_register_board_info(4, palma_device,
562                         ARRAY_SIZE(palma_device));
563         return 0;
564 }
565
566 static int __init pluto_fixed_regulator_init(void)
567 {
568         if (!machine_is_tegra_pluto())
569                 return 0;
570
571         return platform_add_devices(pfixed_reg_devs,
572                         ARRAY_SIZE(pfixed_reg_devs));
573 }
574 subsys_initcall_sync(pluto_fixed_regulator_init);
575
576 static struct tegra_suspend_platform_data pluto_suspend_data = {
577         .cpu_timer      = 2000,
578         .cpu_off_timer  = 0,
579         .suspend_mode   = TEGRA_SUSPEND_LP0,
580         .core_timer     = 0x7e7e,
581         .core_off_timer = 0,
582         .corereq_high   = false,
583         .sysclkreq_high = true,
584 };
585
586 int __init pluto_suspend_init(void)
587 {
588         tegra_init_suspend(&pluto_suspend_data);
589         return 0;
590 }
591