arm: tegra: sd: enable sd dpd
[linux-2.6.git] / arch / arm / mach-tegra / board-p1852.c
1 /*
2  * arch/arm/mach-tegra/board-p1852.c
3  *
4  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/i2c/panjit_ts.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/platform_data/tegra_nor.h>
36 #include <linux/spi/spi.h>
37 #include <linux/mtd/partitions.h>
38 #if defined(CONFIG_TOUCHSCREEN_ATMEL_MXT)
39 #include <linux/i2c/atmel_mxt_ts.h>
40 #endif
41 #include <mach/clk.h>
42 #include <mach/iomap.h>
43 #include <mach/irqs.h>
44 #include <mach/pinmux.h>
45 #include <mach/iomap.h>
46 #include <mach/io_dpd.h>
47 #include <mach/io.h>
48 #include <mach/pci.h>
49 #include <mach/audio.h>
50 #include <mach/tegra_p1852_pdata.h>
51 #include <asm/mach/flash.h>
52 #include <asm/mach-types.h>
53 #include <asm/mach/arch.h>
54 #include <mach/usb_phy.h>
55 #include <mach/tegra_fiq_debugger.h>
56 #include <sound/wm8903.h>
57 #include <mach/tsensor.h>
58 #include "board.h"
59 #include "clock.h"
60 #include "board-p1852.h"
61 #include "devices.h"
62 #include "gpio-names.h"
63 #include "fuse.h"
64 #include "common.h"
65
66 static __initdata struct tegra_clk_init_table p1852_clk_init_table[] = {
67         /* name         parent          rate            enabled */
68         { "pll_m",              NULL,           0,              true},
69         { "hda",                "pll_p",        108000000,      false},
70         { "hda2codec_2x",       "pll_p",        48000000,       false},
71         { "pwm",                "clk_32k",      32768,          false},
72         { "blink",              "clk_32k",      32768,          true},
73         { "pll_a",              NULL,           552960000,      false},
74         /* audio cif clock should be faster than i2s */
75         { "pll_a_out0",         NULL,           24576000,       false},
76         { "d_audio",            "pll_a_out0",   24576000,       false},
77         { "nor",                "pll_p",        102000000,      true},
78         { "uarta",              "pll_p",        480000000,      true},
79         { "uartd",              "pll_p",        480000000,      true},
80         { "uarte",              "pll_p",        480000000,      true},
81         { "sdmmc2",             "pll_p",        52000000,       true},
82         { "sbc1",               "pll_m",        100000000,      true},
83         { "sbc2",               "pll_m",        100000000,      true},
84         { "sbc3",               "pll_m",        100000000,      true},
85         { "sbc4",               "pll_m",        100000000,      true},
86         { "sbc5",               "pll_m",        100000000,      true},
87         { "sbc6",               "pll_m",        100000000,      true},
88         { "cpu_g",              "cclk_g",       900000000,      true},
89         { "i2s0",               "pll_a_out0",   24576000,       false},
90         { "i2s1",               "pll_a_out0",   24576000,       false},
91         { "i2s2",               "pll_a_out0",   24576000,       false},
92         { "i2s3",               "pll_a_out0",   24576000,       false},
93         { "i2s4",               "pll_a_out0",   24576000,       false},
94         { "apbif",              "clk_m",        12000000,       false},
95         { "dam0",               "clk_m",        12000000,       true},
96         { "dam1",               "clk_m",        12000000,       true},
97         { "dam2",               "clk_m",        12000000,       true},
98         { "vi",                 "pll_p",        470000000,      false},
99         { "vi_sensor",          "pll_p",        150000000,      false},
100         { "vde",                "pll_c",        484000000,      true},
101         { "host1x",             "pll_c",        242000000,      true},
102         { "mpe",                "pll_c",        484000000,      true},
103         { "se",                 "pll_m",        625000000,      true},
104         { "i2c1",               "pll_p",        3200000,        true},
105         { "i2c2",               "pll_p",        3200000,        true},
106         { "i2c3",               "pll_p",        3200000,        true},
107         { "i2c4",               "pll_p",        3200000,        true},
108         { "i2c5",               "pll_p",        3200000,        true},
109         { "sdmmc2",             "pll_p",        104000000,      false},
110         {"wake.sclk",           NULL,           334000000,      true },
111         { NULL,                 NULL,           0,              0},
112 };
113
114 static struct tegra_i2c_platform_data p1852_i2c1_platform_data = {
115         .adapter_nr     = 0,
116         .bus_count      = 1,
117         .bus_clk_rate   = { 100000, 0 },
118 };
119
120 static struct tegra_i2c_platform_data p1852_i2c2_platform_data = {
121         .adapter_nr     = 1,
122         .bus_count      = 1,
123         .bus_clk_rate   = { 100000, 0 },
124         .is_clkon_always = true,
125 };
126
127 static struct tegra_i2c_platform_data p1852_i2c4_platform_data = {
128         .adapter_nr     = 3,
129         .bus_count      = 1,
130         .bus_clk_rate   = { 100000, 0 },
131 };
132
133 static struct tegra_i2c_platform_data p1852_i2c5_platform_data = {
134         .adapter_nr     = 4,
135         .bus_count      = 1,
136         .bus_clk_rate   = { 100000, 0 },
137 };
138
139 static struct tegra_pci_platform_data p1852_pci_platform_data = {
140         .port_status[0] = 0,
141         .port_status[1] = 1,
142         .port_status[2] = 1,
143         .use_dock_detect = 0,
144         .gpio           = 0,
145 };
146
147 static void p1852_pcie_init(void)
148 {
149         tegra_pci_device.dev.platform_data = &p1852_pci_platform_data;
150         platform_device_register(&tegra_pci_device);
151 }
152
153 static void p1852_i2c_init(void)
154 {
155         tegra_i2c_device1.dev.platform_data = &p1852_i2c1_platform_data;
156         tegra_i2c_device2.dev.platform_data = &p1852_i2c2_platform_data;
157         tegra_i2c_device4.dev.platform_data = &p1852_i2c4_platform_data;
158         tegra_i2c_device5.dev.platform_data = &p1852_i2c5_platform_data;
159
160         platform_device_register(&tegra_i2c_device5);
161         platform_device_register(&tegra_i2c_device4);
162         platform_device_register(&tegra_i2c_device2);
163         platform_device_register(&tegra_i2c_device1);
164 }
165
166 static struct platform_device *p1852_uart_devices[] __initdata = {
167         &tegra_uarta_device,
168         &tegra_uartb_device,
169         &tegra_uartd_device,
170         &tegra_uarte_device,
171 };
172 static struct clk *debug_uart_clk;
173
174 static void __init uart_debug_init(void)
175 {
176         /* Use skuinfo to decide debug uart */
177         /* UARTB is the debug port. */
178         pr_info("Selecting UARTB as the debug console\n");
179         p1852_uart_devices[1] = &debug_uartb_device;
180         debug_uart_clk = clk_get_sys("serial8250.0", "uartb");
181 }
182
183 static void __init p1852_uart_init(void)
184 {
185         /* Register low speed only if it is selected */
186         if (!is_tegra_debug_uartport_hs()) {
187                 uart_debug_init();
188                 /* Clock enable for the debug channel */
189                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
190                         pr_info("The debug console clock name is %s\n",
191                                                 debug_uart_clk->name);
192                         clk_enable(debug_uart_clk);
193                         clk_set_rate(debug_uart_clk, 408000000);
194                 } else {
195                         pr_err("Not getting the clock %s for debug console\n",
196                                         debug_uart_clk->name);
197                 }
198         }
199
200         platform_add_devices(p1852_uart_devices,
201                                 ARRAY_SIZE(p1852_uart_devices));
202 }
203
204 #if defined(CONFIG_TEGRA_P1852_TDM)
205 static struct tegra_p1852_platform_data p1852_audio_tdm_pdata = {
206         .codec_info[0] = {
207                 .codec_dai_name = "dit-hifi",
208                 .cpu_dai_name = "tegra30-i2s.0",
209                 .codec_name = "spdif-dit.0",
210                 .name = "tegra-i2s-1",
211                 .pcm_driver = "tegra-tdm-pcm-audio",
212                 .i2s_format = format_tdm,
213                 .master = 1,
214                 .num_slots = 4,
215                 .slot_width = 32,
216                 .tx_mask = 0x0f,
217                 .rx_mask = 0x0f,
218         },
219         .codec_info[1] = {
220                 .codec_dai_name = "dit-hifi",
221                 .cpu_dai_name = "tegra30-i2s.4",
222                 .codec_name = "spdif-dit.1",
223                 .name = "tegra-i2s-2",
224                 .pcm_driver = "tegra-tdm-pcm-audio",
225                 .i2s_format = format_tdm,
226                 .master = 1,
227                 .num_slots = 8,
228                 .slot_width = 32,
229                 .tx_mask = 0xff,
230                 .rx_mask = 0xff,
231         },
232 };
233 #else
234 static struct tegra_p1852_platform_data p1852_audio_i2s_pdata = {
235         .codec_info[0] = {
236                 .codec_dai_name = "dit-hifi",
237                 .cpu_dai_name = "tegra30-i2s.0",
238                 .codec_name = "spdif-dit.0",
239                 .name = "tegra-i2s-1",
240                 .pcm_driver = "tegra-pcm-audio",
241                 .i2s_format = format_i2s,
242                 .master = 1,
243         },
244         .codec_info[1] = {
245                 .codec_dai_name = "dit-hifi",
246                 .cpu_dai_name = "tegra30-i2s.4",
247                 .codec_name = "spdif-dit.1",
248                 .name = "tegra-i2s-2",
249                 .pcm_driver = "tegra-pcm-audio",
250                 .i2s_format = format_i2s,
251                 .master = 0,
252         },
253 };
254 #endif
255 static struct platform_device generic_codec_1 = {
256         .name           = "spdif-dit",
257         .id                     = 0,
258 };
259 static struct platform_device generic_codec_2 = {
260         .name           = "spdif-dit",
261         .id                     = 1,
262 };
263
264 static struct platform_device tegra_snd_p1852 = {
265         .name       = "tegra-snd-p1852",
266         .id = 0,
267         .dev    = {
268 #if defined(CONFIG_TEGRA_P1852_TDM)
269                 .platform_data = &p1852_audio_tdm_pdata,
270 #else
271                 .platform_data = &p1852_audio_i2s_pdata,
272 #endif
273         },
274 };
275
276 static void p1852_i2s_audio_init(void)
277 {
278         platform_device_register(&tegra_pcm_device);
279         platform_device_register(&tegra_tdm_pcm_device);
280         platform_device_register(&generic_codec_1);
281         platform_device_register(&generic_codec_2);
282         platform_device_register(&tegra_i2s_device0);
283         platform_device_register(&tegra_i2s_device4);
284         platform_device_register(&tegra_ahub_device);
285         platform_device_register(&tegra_snd_p1852);
286 }
287
288
289 #if defined(CONFIG_SPI_TEGRA) && defined(CONFIG_SPI_SPIDEV)
290 static struct spi_board_info tegra_spi_devices[] __initdata = {
291         {
292                 .modalias = "spidev",
293                 .bus_num = 0,
294                 .chip_select = 0,
295                 .mode = SPI_MODE_0,
296                 .max_speed_hz = 18000000,
297                 .platform_data = NULL,
298                 .irq = 0,
299         },
300         {
301                 .modalias = "spidev",
302                 .bus_num = 1,
303                 .chip_select = 1,
304                 .mode = SPI_MODE_0,
305                 .max_speed_hz = 18000000,
306                 .platform_data = NULL,
307                 .irq = 0,
308         },
309         {
310                 .modalias = "spidev",
311                 .bus_num = 2,
312                 .chip_select = 0,
313                 .mode = SPI_MODE_0,
314                 .max_speed_hz = 18000000,
315                 .platform_data = NULL,
316                 .irq = 0,
317         },
318         {
319                 .modalias = "spidev",
320                 .bus_num = 3,
321                 .chip_select = 1,
322                 .mode = SPI_MODE_0,
323                 .max_speed_hz = 18000000,
324                 .platform_data = NULL,
325                 .irq = 0,
326         },
327 };
328
329 static void __init p852_register_spidev(void)
330 {
331         spi_register_board_info(tegra_spi_devices,
332                         ARRAY_SIZE(tegra_spi_devices));
333 }
334 #else
335 #define p852_register_spidev() do {} while (0)
336 #endif
337
338
339 static void p1852_spi_init(void)
340 {
341         tegra_spi_device2.name = "spi_slave_tegra";
342         platform_device_register(&tegra_spi_device1);
343         platform_device_register(&tegra_spi_device2);
344         platform_device_register(&tegra_spi_device3);
345         p852_register_spidev();
346 }
347
348 static struct platform_device tegra_camera = {
349         .name = "tegra_camera",
350         .id = -1,
351 };
352
353 static struct platform_device *p1852_devices[] __initdata = {
354 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
355         &tegra_smmu_device,
356 #endif
357 #if defined(CONFIG_TEGRA_AVP)
358         &tegra_avp_device,
359 #endif
360         &tegra_camera,
361         &tegra_wdt0_device,
362         &tegra_wdt1_device,
363         &tegra_wdt2_device
364 };
365
366
367 #ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
368
369 #define MXT_CONFIG_CRC  0xD62DE8
370 static const u8 config[] = {
371         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
372         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
373         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
374         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
375         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
376         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
377         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
378         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
379         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
380         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
381         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
382         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
383         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
384         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
385         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
386         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
387         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
388         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
389         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
390         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
391 };
392
393 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
394 static const u8 config_sku2000[] = {
395         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
396         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
397         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
398         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
399         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
400         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
401         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
402         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
403         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
404         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
405         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
406         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
407         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
408         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
409         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
410         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
411         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
412         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
413         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
414         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
415 };
416
417 static struct mxt_platform_data atmel_mxt_info = {
418         .x_line         = 27,
419         .y_line         = 42,
420         .x_size         = 768,
421         .y_size         = 1366,
422         .blen           = 0x20,
423         .threshold      = 0x3C,
424         .voltage        = 3300000,              /* 3.3V */
425         .orient         = 5,
426         .config         = config,
427         .config_length  = 157,
428         .config_crc     = MXT_CONFIG_CRC,
429         .irqflags       = IRQF_TRIGGER_FALLING,
430 /*      .read_chg       = &read_chg, */
431         .read_chg       = NULL,
432 };
433
434 static struct i2c_board_info __initdata atmel_i2c_info[] = {
435         {
436                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
437                 .irq = TEGRA_GPIO_TO_IRQ(TOUCH_GPIO_IRQ_ATMEL_T9),
438                 .platform_data = &atmel_mxt_info,
439         }
440 };
441
442 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
443         /* name         parent          rate            enabled */
444         { "sbc1",       "pll_p",        52000000,       true},
445         { NULL,         NULL,           0,              0},
446 };
447
448 static int __init p1852_touch_init(void)
449 {
450         tegra_gpio_enable(TOUCH_GPIO_IRQ_ATMEL_T9);
451         tegra_gpio_enable(TOUCH_GPIO_RST_ATMEL_T9);
452
453         gpio_request(TOUCH_GPIO_IRQ_ATMEL_T9, "atmel-irq");
454         gpio_direction_input(TOUCH_GPIO_IRQ_ATMEL_T9);
455
456         gpio_request(TOUCH_GPIO_RST_ATMEL_T9, "atmel-reset");
457         gpio_direction_output(TOUCH_GPIO_RST_ATMEL_T9, 0);
458         msleep(1);
459         gpio_set_value(TOUCH_GPIO_RST_ATMEL_T9, 1);
460         msleep(100);
461
462         atmel_mxt_info.config = config_sku2000;
463         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
464
465         i2c_register_board_info(TOUCH_BUS_ATMEL_T9, atmel_i2c_info, 1);
466
467         return 0;
468 }
469
470 #endif // CONFIG_TOUCHSCREEN_ATMEL_MXT
471
472 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
473         .port_otg = false,
474         .has_hostpc = true,
475         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
476         .op_mode = TEGRA_USB_OPMODE_HOST,
477         .u_data.host = {
478                 .vbus_gpio = -1,
479                 .vbus_reg = NULL,
480                 .hot_plug = false,
481                 .remote_wakeup_supported = true,
482                 .power_off_on_suspend = true,
483         },
484         .u_cfg.utmi = {
485                 .hssync_start_delay = 0,
486                 .idle_wait_delay = 17,
487                 .elastic_limit = 16,
488                 .term_range_adj = 6,
489                 .xcvr_setup = 63,
490                 .xcvr_setup_offset = 6,
491                 .xcvr_use_fuses = 1,
492                 .xcvr_lsfslew = 2,
493                 .xcvr_lsrslew = 2,
494                 .xcvr_use_lsb = 1,
495         },
496 };
497
498 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
499         .port_otg = false,
500         .has_hostpc = true,
501         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
502         .op_mode = TEGRA_USB_OPMODE_HOST,
503         .u_data.host = {
504                 .vbus_gpio = -1,
505                 .vbus_reg = NULL,
506                 .hot_plug = false,
507                 .remote_wakeup_supported = true,
508                 .power_off_on_suspend = true,
509         },
510         .u_cfg.utmi = {
511                 .hssync_start_delay = 0,
512                 .idle_wait_delay = 17,
513                 .elastic_limit = 16,
514                 .term_range_adj = 6,
515                 .xcvr_setup = 63,
516                 .xcvr_setup_offset = 6,
517                 .xcvr_use_fuses = 1,
518                 .xcvr_lsfslew = 2,
519                 .xcvr_lsrslew = 2,
520                 .xcvr_use_lsb = 1,
521         },
522 };
523
524 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
525         .port_otg = false,
526         .has_hostpc = true,
527         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
528         .op_mode = TEGRA_USB_OPMODE_HOST,
529         .u_data.host = {
530                 .vbus_gpio = -1,
531                 .vbus_reg = NULL,
532                 .hot_plug = false,
533                 .remote_wakeup_supported = true,
534                 .power_off_on_suspend = true,
535         },
536         .u_cfg.utmi = {
537                 .hssync_start_delay = 0,
538                 .idle_wait_delay = 17,
539                 .elastic_limit = 16,
540                 .term_range_adj = 6,
541                 .xcvr_setup = 63,
542                 .xcvr_setup_offset = 6,
543                 .xcvr_use_fuses = 1,
544                 .xcvr_lsfslew = 2,
545                 .xcvr_lsrslew = 2,
546                 .xcvr_use_lsb = 1,
547         },
548 };
549
550 static void p1852_usb_init(void)
551 {
552         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
553         platform_device_register(&tegra_ehci1_device);
554
555         tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
556         platform_device_register(&tegra_ehci2_device);
557
558         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
559         platform_device_register(&tegra_ehci3_device);
560 }
561
562 static struct tegra_nor_platform_data p1852_nor_data = {
563         .flash = {
564                 .map_name = "cfi_probe",
565                 .width = 2,
566         },
567         .chip_parms = {
568                 /* FIXME: Need to use characterized value */
569                 .timing_default = {
570                         .timing0 = 0x30300263,
571                         .timing1 = 0x00030302,
572                 },
573                 .timing_read = {
574                         .timing0 = 0x30300263,
575                         .timing1 = 0x00030302,
576                 },
577         },
578 };
579
580 static void p1852_nor_init(void)
581 {
582         tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
583         tegra_nor_device.dev.platform_data = &p1852_nor_data;
584         platform_device_register(&tegra_nor_device);
585 }
586
587 static void __init tegra_p1852_init(void)
588 {
589         tegra_init_board_info();
590         tegra_clk_init_from_table(p1852_clk_init_table);
591         tegra_enable_pinmux();
592         p1852_pinmux_init();
593         p1852_i2c_init();
594         p1852_i2s_audio_init();
595         p1852_gpio_init();
596         p1852_uart_init();
597         p1852_usb_init();
598         tegra_io_dpd_init();
599         p1852_sdhci_init();
600         p1852_spi_init();
601         platform_add_devices(p1852_devices, ARRAY_SIZE(p1852_devices));
602 #ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
603         p1852_touch_init();
604 #endif
605         p1852_panel_init();
606         p1852_nor_init();
607         p1852_pcie_init();
608         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
609 }
610
611 static void __init tegra_p1852_reserve(void)
612 {
613 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
614         tegra_reserve(0, SZ_8M, 0);
615 #else
616         tegra_reserve(SZ_128M, SZ_8M, 0);
617 #endif
618 }
619
620 MACHINE_START(P1852, "p1852")
621         .atag_offset    = 0x100,
622         .soc            = &tegra_soc_desc,
623         .init_irq       = tegra_init_irq,
624         .init_early     = tegra_init_early,
625         .init_machine   = tegra_p1852_init,
626         .map_io         = tegra_map_common_io,
627         .reserve        = tegra_p1852_reserve,
628         .timer          = &tegra_timer,
629 MACHINE_END