7e438680734c2f3d6b0ff9758e50306516b56124
[linux-2.6.git] / arch / arm / mach-tegra / board-p1852.c
1 /*
2  * arch/arm/mach-tegra/board-p1852.c
3  *
4  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/i2c/panjit_ts.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/platform_data/tegra_nor.h>
36 #include <linux/spi/spi.h>
37 #include <linux/mtd/partitions.h>
38 #if defined(CONFIG_TOUCHSCREEN_ATMEL_MXT)
39 #include <linux/i2c/atmel_mxt_ts.h>
40 #endif
41 #include <mach/clk.h>
42 #include <mach/iomap.h>
43 #include <mach/irqs.h>
44 #include <mach/pinmux.h>
45 #include <mach/iomap.h>
46 #include <mach/io.h>
47 #include <mach/pci.h>
48 #include <mach/audio.h>
49 #include <mach/tegra_p1852_pdata.h>
50 #include <asm/mach/flash.h>
51 #include <asm/mach-types.h>
52 #include <asm/mach/arch.h>
53 #include <mach/usb_phy.h>
54 #include <mach/tegra_fiq_debugger.h>
55 #include <sound/wm8903.h>
56 #include <mach/tsensor.h>
57 #include "board.h"
58 #include "clock.h"
59 #include "board-p1852.h"
60 #include "devices.h"
61 #include "gpio-names.h"
62 #include "fuse.h"
63 #include "common.h"
64
65 static __initdata struct tegra_clk_init_table p1852_clk_init_table[] = {
66         /* name         parent          rate            enabled */
67         { "pll_m",              NULL,           0,              true},
68         { "hda",                "pll_p",        108000000,      false},
69         { "hda2codec_2x",       "pll_p",        48000000,       false},
70         { "pwm",                "clk_32k",      32768,          false},
71         { "blink",              "clk_32k",      32768,          true},
72         { "pll_a",              NULL,           552960000,      false},
73         /* audio cif clock should be faster than i2s */
74         { "pll_a_out0",         NULL,           24576000,       false},
75         { "d_audio",            "pll_a_out0",   24576000,       false},
76         { "nor",                "pll_p",        102000000,      true},
77         { "uarta",              "pll_p",        480000000,      true},
78         { "uartd",              "pll_p",        480000000,      true},
79         { "uarte",              "pll_p",        480000000,      true},
80         { "sdmmc2",             "pll_p",        52000000,       true},
81         { "sbc1",               "pll_m",        100000000,      true},
82         { "sbc2",               "pll_m",        100000000,      true},
83         { "sbc3",               "pll_m",        100000000,      true},
84         { "sbc4",               "pll_m",        100000000,      true},
85         { "sbc5",               "pll_m",        100000000,      true},
86         { "sbc6",               "pll_m",        100000000,      true},
87         { "cpu_g",              "cclk_g",       900000000,      true},
88         { "i2s0",               "pll_a_out0",   24576000,       false},
89         { "i2s1",               "pll_a_out0",   24576000,       false},
90         { "i2s2",               "pll_a_out0",   24576000,       false},
91         { "i2s3",               "pll_a_out0",   24576000,       false},
92         { "i2s4",               "pll_a_out0",   24576000,       false},
93         { "apbif",              "clk_m",        12000000,       false},
94         { "dam0",               "clk_m",        12000000,       true},
95         { "dam1",               "clk_m",        12000000,       true},
96         { "dam2",               "clk_m",        12000000,       true},
97         { "vi",                 "pll_p",        470000000,      false},
98         { "vi_sensor",          "pll_p",        150000000,      false},
99         { "vde",                "pll_c",        484000000,      true},
100         { "host1x",             "pll_c",        242000000,      true},
101         { "mpe",                "pll_c",        484000000,      true},
102         { "se",                 "pll_m",        625000000,      true},
103         { "i2c1",               "pll_p",        3200000,        true},
104         { "i2c2",               "pll_p",        3200000,        true},
105         { "i2c3",               "pll_p",        3200000,        true},
106         { "i2c4",               "pll_p",        3200000,        true},
107         { "i2c5",               "pll_p",        3200000,        true},
108         { "sdmmc2",             "pll_p",        104000000,      false},
109         {"wake.sclk",           NULL,           334000000,      true },
110         { NULL,                 NULL,           0,              0},
111 };
112
113 static struct tegra_i2c_platform_data p1852_i2c1_platform_data = {
114         .adapter_nr     = 0,
115         .bus_count      = 1,
116         .bus_clk_rate   = { 100000, 0 },
117 };
118
119 static struct tegra_i2c_platform_data p1852_i2c2_platform_data = {
120         .adapter_nr     = 1,
121         .bus_count      = 1,
122         .bus_clk_rate   = { 100000, 0 },
123         .is_clkon_always = true,
124 };
125
126 static struct tegra_i2c_platform_data p1852_i2c4_platform_data = {
127         .adapter_nr     = 3,
128         .bus_count      = 1,
129         .bus_clk_rate   = { 100000, 0 },
130 };
131
132 static struct tegra_i2c_platform_data p1852_i2c5_platform_data = {
133         .adapter_nr     = 4,
134         .bus_count      = 1,
135         .bus_clk_rate   = { 100000, 0 },
136 };
137
138 static struct tegra_pci_platform_data p1852_pci_platform_data = {
139         .port_status[0] = 0,
140         .port_status[1] = 1,
141         .port_status[2] = 1,
142         .use_dock_detect = 0,
143         .gpio           = 0,
144 };
145
146 static void p1852_pcie_init(void)
147 {
148         tegra_pci_device.dev.platform_data = &p1852_pci_platform_data;
149         platform_device_register(&tegra_pci_device);
150 }
151
152 static void p1852_i2c_init(void)
153 {
154         tegra_i2c_device1.dev.platform_data = &p1852_i2c1_platform_data;
155         tegra_i2c_device2.dev.platform_data = &p1852_i2c2_platform_data;
156         tegra_i2c_device4.dev.platform_data = &p1852_i2c4_platform_data;
157         tegra_i2c_device5.dev.platform_data = &p1852_i2c5_platform_data;
158
159         platform_device_register(&tegra_i2c_device5);
160         platform_device_register(&tegra_i2c_device4);
161         platform_device_register(&tegra_i2c_device2);
162         platform_device_register(&tegra_i2c_device1);
163 }
164
165 static struct platform_device *p1852_uart_devices[] __initdata = {
166         &tegra_uarta_device,
167         &tegra_uartb_device,
168         &tegra_uartd_device,
169         &tegra_uarte_device,
170 };
171 static struct clk *debug_uart_clk;
172
173 static void __init uart_debug_init(void)
174 {
175         /* Use skuinfo to decide debug uart */
176         /* UARTB is the debug port. */
177         pr_info("Selecting UARTB as the debug console\n");
178         p1852_uart_devices[1] = &debug_uartb_device;
179         debug_uart_clk = clk_get_sys("serial8250.0", "uartb");
180 }
181
182 static void __init p1852_uart_init(void)
183 {
184         /* Register low speed only if it is selected */
185         if (!is_tegra_debug_uartport_hs()) {
186                 uart_debug_init();
187                 /* Clock enable for the debug channel */
188                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
189                         pr_info("The debug console clock name is %s\n",
190                                                 debug_uart_clk->name);
191                         clk_enable(debug_uart_clk);
192                         clk_set_rate(debug_uart_clk, 408000000);
193                 } else {
194                         pr_err("Not getting the clock %s for debug console\n",
195                                         debug_uart_clk->name);
196                 }
197         }
198
199         platform_add_devices(p1852_uart_devices,
200                                 ARRAY_SIZE(p1852_uart_devices));
201 }
202
203 #if defined(CONFIG_TEGRA_P1852_TDM)
204 static struct tegra_p1852_platform_data p1852_audio_tdm_pdata = {
205         .codec_info[0] = {
206                 .codec_dai_name = "dit-hifi",
207                 .cpu_dai_name = "tegra30-i2s.0",
208                 .codec_name = "spdif-dit.0",
209                 .name = "tegra-i2s-1",
210                 .pcm_driver = "tegra-tdm-pcm-audio",
211                 .i2s_format = format_tdm,
212                 .master = 1,
213                 .num_slots = 4,
214                 .slot_width = 32,
215                 .tx_mask = 0x0f,
216                 .rx_mask = 0x0f,
217         },
218         .codec_info[1] = {
219                 .codec_dai_name = "dit-hifi",
220                 .cpu_dai_name = "tegra30-i2s.4",
221                 .codec_name = "spdif-dit.1",
222                 .name = "tegra-i2s-2",
223                 .pcm_driver = "tegra-tdm-pcm-audio",
224                 .i2s_format = format_tdm,
225                 .master = 1,
226                 .num_slots = 8,
227                 .slot_width = 32,
228                 .tx_mask = 0xff,
229                 .rx_mask = 0xff,
230         },
231 };
232 #else
233 static struct tegra_p1852_platform_data p1852_audio_i2s_pdata = {
234         .codec_info[0] = {
235                 .codec_dai_name = "dit-hifi",
236                 .cpu_dai_name = "tegra30-i2s.0",
237                 .codec_name = "spdif-dit.0",
238                 .name = "tegra-i2s-1",
239                 .pcm_driver = "tegra-pcm-audio",
240                 .i2s_format = format_i2s,
241                 .master = 1,
242         },
243         .codec_info[1] = {
244                 .codec_dai_name = "dit-hifi",
245                 .cpu_dai_name = "tegra30-i2s.4",
246                 .codec_name = "spdif-dit.1",
247                 .name = "tegra-i2s-2",
248                 .pcm_driver = "tegra-pcm-audio",
249                 .i2s_format = format_i2s,
250                 .master = 0,
251         },
252 };
253 #endif
254 static struct platform_device generic_codec_1 = {
255         .name           = "spdif-dit",
256         .id                     = 0,
257 };
258 static struct platform_device generic_codec_2 = {
259         .name           = "spdif-dit",
260         .id                     = 1,
261 };
262
263 static struct platform_device tegra_snd_p1852 = {
264         .name       = "tegra-snd-p1852",
265         .id = 0,
266         .dev    = {
267 #if defined(CONFIG_TEGRA_P1852_TDM)
268                 .platform_data = &p1852_audio_tdm_pdata,
269 #else
270                 .platform_data = &p1852_audio_i2s_pdata,
271 #endif
272         },
273 };
274
275 static void p1852_i2s_audio_init(void)
276 {
277         platform_device_register(&tegra_pcm_device);
278         platform_device_register(&tegra_tdm_pcm_device);
279         platform_device_register(&generic_codec_1);
280         platform_device_register(&generic_codec_2);
281         platform_device_register(&tegra_i2s_device0);
282         platform_device_register(&tegra_i2s_device4);
283         platform_device_register(&tegra_ahub_device);
284         platform_device_register(&tegra_snd_p1852);
285 }
286
287
288 #if defined(CONFIG_SPI_TEGRA) && defined(CONFIG_SPI_SPIDEV)
289 static struct spi_board_info tegra_spi_devices[] __initdata = {
290         {
291                 .modalias = "spidev",
292                 .bus_num = 0,
293                 .chip_select = 0,
294                 .mode = SPI_MODE_0,
295                 .max_speed_hz = 18000000,
296                 .platform_data = NULL,
297                 .irq = 0,
298         },
299         {
300                 .modalias = "spidev",
301                 .bus_num = 1,
302                 .chip_select = 1,
303                 .mode = SPI_MODE_0,
304                 .max_speed_hz = 18000000,
305                 .platform_data = NULL,
306                 .irq = 0,
307         },
308         {
309                 .modalias = "spidev",
310                 .bus_num = 2,
311                 .chip_select = 0,
312                 .mode = SPI_MODE_0,
313                 .max_speed_hz = 18000000,
314                 .platform_data = NULL,
315                 .irq = 0,
316         },
317         {
318                 .modalias = "spidev",
319                 .bus_num = 3,
320                 .chip_select = 1,
321                 .mode = SPI_MODE_0,
322                 .max_speed_hz = 18000000,
323                 .platform_data = NULL,
324                 .irq = 0,
325         },
326 };
327
328 static void __init p852_register_spidev(void)
329 {
330         spi_register_board_info(tegra_spi_devices,
331                         ARRAY_SIZE(tegra_spi_devices));
332 }
333 #else
334 #define p852_register_spidev() do {} while (0)
335 #endif
336
337
338 static void p1852_spi_init(void)
339 {
340         tegra_spi_device2.name = "spi_slave_tegra";
341         platform_device_register(&tegra_spi_device1);
342         platform_device_register(&tegra_spi_device2);
343         platform_device_register(&tegra_spi_device3);
344         p852_register_spidev();
345 }
346
347 static struct platform_device tegra_camera = {
348         .name = "tegra_camera",
349         .id = -1,
350 };
351
352 static struct platform_device *p1852_devices[] __initdata = {
353 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
354         &tegra_smmu_device,
355 #endif
356 #if defined(CONFIG_TEGRA_AVP)
357         &tegra_avp_device,
358 #endif
359         &tegra_camera,
360         &tegra_wdt0_device,
361         &tegra_wdt1_device,
362         &tegra_wdt2_device
363 };
364
365
366 #ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
367
368 #define MXT_CONFIG_CRC  0xD62DE8
369 static const u8 config[] = {
370         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
371         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
372         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
373         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
374         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
375         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
376         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
377         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
378         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
379         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
380         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
381         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
382         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
383         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
384         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
385         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
386         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
387         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
388         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
389         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
390 };
391
392 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
393 static const u8 config_sku2000[] = {
394         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
395         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
396         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
397         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
398         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
399         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
400         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
401         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
402         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
403         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
404         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
405         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
406         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
407         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
408         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
409         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
410         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
411         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
412         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
413         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
414 };
415
416 static struct mxt_platform_data atmel_mxt_info = {
417         .x_line         = 27,
418         .y_line         = 42,
419         .x_size         = 768,
420         .y_size         = 1366,
421         .blen           = 0x20,
422         .threshold      = 0x3C,
423         .voltage        = 3300000,              /* 3.3V */
424         .orient         = 5,
425         .config         = config,
426         .config_length  = 157,
427         .config_crc     = MXT_CONFIG_CRC,
428         .irqflags       = IRQF_TRIGGER_FALLING,
429 /*      .read_chg       = &read_chg, */
430         .read_chg       = NULL,
431 };
432
433 static struct i2c_board_info __initdata atmel_i2c_info[] = {
434         {
435                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
436                 .irq = TEGRA_GPIO_TO_IRQ(TOUCH_GPIO_IRQ_ATMEL_T9),
437                 .platform_data = &atmel_mxt_info,
438         }
439 };
440
441 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
442         /* name         parent          rate            enabled */
443         { "sbc1",       "pll_p",        52000000,       true},
444         { NULL,         NULL,           0,              0},
445 };
446
447 static int __init p1852_touch_init(void)
448 {
449         tegra_gpio_enable(TOUCH_GPIO_IRQ_ATMEL_T9);
450         tegra_gpio_enable(TOUCH_GPIO_RST_ATMEL_T9);
451
452         gpio_request(TOUCH_GPIO_IRQ_ATMEL_T9, "atmel-irq");
453         gpio_direction_input(TOUCH_GPIO_IRQ_ATMEL_T9);
454
455         gpio_request(TOUCH_GPIO_RST_ATMEL_T9, "atmel-reset");
456         gpio_direction_output(TOUCH_GPIO_RST_ATMEL_T9, 0);
457         msleep(1);
458         gpio_set_value(TOUCH_GPIO_RST_ATMEL_T9, 1);
459         msleep(100);
460
461         atmel_mxt_info.config = config_sku2000;
462         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
463
464         i2c_register_board_info(TOUCH_BUS_ATMEL_T9, atmel_i2c_info, 1);
465
466         return 0;
467 }
468
469 #endif // CONFIG_TOUCHSCREEN_ATMEL_MXT
470
471 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
472         .port_otg = false,
473         .has_hostpc = true,
474         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
475         .op_mode = TEGRA_USB_OPMODE_HOST,
476         .u_data.host = {
477                 .vbus_gpio = -1,
478                 .vbus_reg = NULL,
479                 .hot_plug = false,
480                 .remote_wakeup_supported = true,
481                 .power_off_on_suspend = true,
482         },
483         .u_cfg.utmi = {
484                 .hssync_start_delay = 0,
485                 .idle_wait_delay = 17,
486                 .elastic_limit = 16,
487                 .term_range_adj = 6,
488                 .xcvr_setup = 63,
489                 .xcvr_setup_offset = 6,
490                 .xcvr_use_fuses = 1,
491                 .xcvr_lsfslew = 2,
492                 .xcvr_lsrslew = 2,
493                 .xcvr_use_lsb = 1,
494         },
495 };
496
497 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
498         .port_otg = false,
499         .has_hostpc = true,
500         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
501         .op_mode = TEGRA_USB_OPMODE_HOST,
502         .u_data.host = {
503                 .vbus_gpio = -1,
504                 .vbus_reg = NULL,
505                 .hot_plug = false,
506                 .remote_wakeup_supported = true,
507                 .power_off_on_suspend = true,
508         },
509         .u_cfg.utmi = {
510                 .hssync_start_delay = 0,
511                 .idle_wait_delay = 17,
512                 .elastic_limit = 16,
513                 .term_range_adj = 6,
514                 .xcvr_setup = 63,
515                 .xcvr_setup_offset = 6,
516                 .xcvr_use_fuses = 1,
517                 .xcvr_lsfslew = 2,
518                 .xcvr_lsrslew = 2,
519                 .xcvr_use_lsb = 1,
520         },
521 };
522
523 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
524         .port_otg = false,
525         .has_hostpc = true,
526         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
527         .op_mode = TEGRA_USB_OPMODE_HOST,
528         .u_data.host = {
529                 .vbus_gpio = -1,
530                 .vbus_reg = NULL,
531                 .hot_plug = false,
532                 .remote_wakeup_supported = true,
533                 .power_off_on_suspend = true,
534         },
535         .u_cfg.utmi = {
536                 .hssync_start_delay = 0,
537                 .idle_wait_delay = 17,
538                 .elastic_limit = 16,
539                 .term_range_adj = 6,
540                 .xcvr_setup = 63,
541                 .xcvr_setup_offset = 6,
542                 .xcvr_use_fuses = 1,
543                 .xcvr_lsfslew = 2,
544                 .xcvr_lsrslew = 2,
545                 .xcvr_use_lsb = 1,
546         },
547 };
548
549 static void p1852_usb_init(void)
550 {
551         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
552         platform_device_register(&tegra_ehci1_device);
553
554         tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
555         platform_device_register(&tegra_ehci2_device);
556
557         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
558         platform_device_register(&tegra_ehci3_device);
559 }
560
561 static struct tegra_nor_platform_data p1852_nor_data = {
562         .flash = {
563                 .map_name = "cfi_probe",
564                 .width = 2,
565         },
566         .chip_parms = {
567                 /* FIXME: Need to use characterized value */
568                 .timing_default = {
569                         .timing0 = 0x30300263,
570                         .timing1 = 0x00030302,
571                 },
572                 .timing_read = {
573                         .timing0 = 0x30300263,
574                         .timing1 = 0x00030302,
575                 },
576         },
577 };
578
579 static void p1852_nor_init(void)
580 {
581         tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
582         tegra_nor_device.dev.platform_data = &p1852_nor_data;
583         platform_device_register(&tegra_nor_device);
584 }
585
586 static void __init tegra_p1852_init(void)
587 {
588         tegra_init_board_info();
589         tegra_clk_init_from_table(p1852_clk_init_table);
590         tegra_enable_pinmux();
591         p1852_pinmux_init();
592         p1852_i2c_init();
593         p1852_i2s_audio_init();
594         p1852_gpio_init();
595         p1852_uart_init();
596         p1852_usb_init();
597         p1852_sdhci_init();
598         p1852_spi_init();
599         platform_add_devices(p1852_devices, ARRAY_SIZE(p1852_devices));
600 #ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
601         p1852_touch_init();
602 #endif
603         p1852_panel_init();
604         p1852_nor_init();
605         p1852_pcie_init();
606         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
607 }
608
609 static void __init tegra_p1852_reserve(void)
610 {
611 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
612         tegra_reserve(0, SZ_8M, 0);
613 #else
614         tegra_reserve(SZ_128M, SZ_8M, 0);
615 #endif
616 }
617
618 MACHINE_START(P1852, "p1852")
619         .atag_offset    = 0x100,
620         .soc            = &tegra_soc_desc,
621         .init_irq       = tegra_init_irq,
622         .init_early     = tegra_init_early,
623         .init_machine   = tegra_p1852_init,
624         .map_io         = tegra_map_common_io,
625         .reserve        = tegra_p1852_reserve,
626         .timer          = &tegra_timer,
627 MACHINE_END