Revert "Merge commit 'main-jb-2012.08.03-B4' into t114-0806"
[linux-2.6.git] / arch / arm / mach-tegra / board-p1852.c
1 /*
2  * arch/arm/mach-tegra/board-p1852.c
3  *
4  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/i2c/panjit_ts.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/platform_data/tegra_nor.h>
36 #include <linux/spi/spi.h>
37 #include <linux/mtd/partitions.h>
38 #if defined(CONFIG_TOUCHSCREEN_ATMEL_MXT)
39 #include <linux/i2c/atmel_mxt_ts.h>
40 #endif
41 #include <mach/clk.h>
42 #include <mach/iomap.h>
43 #include <mach/irqs.h>
44 #include <mach/pinmux.h>
45 #include <mach/iomap.h>
46 #include <mach/io_dpd.h>
47 #include <mach/io.h>
48 #include <mach/pci.h>
49 #include <mach/audio.h>
50 #include <mach/tegra_p1852_pdata.h>
51 #include <asm/mach/flash.h>
52 #include <asm/mach-types.h>
53 #include <asm/mach/arch.h>
54 #include <mach/usb_phy.h>
55 #include <mach/tegra_fiq_debugger.h>
56 #include <sound/wm8903.h>
57 #include <mach/tsensor.h>
58 #include "board.h"
59 #include "clock.h"
60 #include "board-p1852.h"
61 #include "devices.h"
62 #include "gpio-names.h"
63 #include "fuse.h"
64 #include "common.h"
65
66 static __initdata struct tegra_clk_init_table p1852_clk_init_table[] = {
67         /* name         parent          rate            enabled */
68         { "pll_m",              NULL,           0,              true},
69         { "hda",                "pll_p",        108000000,      false},
70         { "hda2codec_2x",       "pll_p",        48000000,       false},
71         { "pwm",                "clk_32k",      32768,          false},
72         { "blink",              "clk_32k",      32768,          true},
73         { "pll_a",              NULL,           552960000,      false},
74         /* audio cif clock should be faster than i2s */
75         { "pll_a_out0",         NULL,           24576000,       false},
76         { "d_audio",            "pll_a_out0",   24576000,       false},
77         { "nor",                "pll_p",        102000000,      true},
78         { "uarta",              "pll_p",        480000000,      true},
79         { "uartd",              "pll_p",        480000000,      true},
80         { "uarte",              "pll_p",        480000000,      true},
81         { "sdmmc2",             "pll_p",        52000000,       true},
82         { "sbc1",               "pll_m",        100000000,      true},
83         { "sbc2",               "pll_m",        100000000,      true},
84         { "sbc3",               "pll_m",        100000000,      true},
85         { "sbc4",               "pll_m",        100000000,      true},
86         { "sbc5",               "pll_m",        100000000,      true},
87         { "sbc6",               "pll_m",        100000000,      true},
88         { "cpu_g",              "cclk_g",       900000000,      true},
89         { "i2s0",               "pll_a_out0",   24576000,       false},
90         { "i2s1",               "pll_a_out0",   24576000,       false},
91         { "i2s2",               "pll_a_out0",   24576000,       false},
92         { "i2s3",               "pll_a_out0",   24576000,       false},
93         { "i2s4",               "pll_a_out0",   24576000,       false},
94         { "apbif",              "clk_m",        12000000,       false},
95         { "dam0",               "clk_m",        12000000,       true},
96         { "dam1",               "clk_m",        12000000,       true},
97         { "dam2",               "clk_m",        12000000,       true},
98         { "vi",                 "pll_p",        470000000,      false},
99         { "vi_sensor",          "pll_p",        150000000,      false},
100         { "vde",                "pll_c",        484000000,      true},
101         { "mpe",                "pll_c",        484000000,      true},
102         { "se",                 "pll_m",        625000000,      true},
103         { "i2c1",               "pll_p",        3200000,        true},
104         { "i2c2",               "pll_p",        3200000,        true},
105         { "i2c3",               "pll_p",        3200000,        true},
106         { "i2c4",               "pll_p",        3200000,        true},
107         { "i2c5",               "pll_p",        3200000,        true},
108         { "sdmmc2",             "pll_p",        104000000,      false},
109         {"wake.sclk",           NULL,           334000000,      true },
110         { NULL,                 NULL,           0,              0},
111 };
112
113 static struct tegra_i2c_platform_data p1852_i2c1_platform_data = {
114         .adapter_nr     = 0,
115         .bus_count      = 1,
116         .bus_clk_rate   = { 100000, 0 },
117 };
118
119 static struct tegra_i2c_platform_data p1852_i2c2_platform_data = {
120         .adapter_nr     = 1,
121         .bus_count      = 1,
122         .bus_clk_rate   = { 100000, 0 },
123         .is_clkon_always = true,
124 };
125
126 static struct tegra_i2c_platform_data p1852_i2c4_platform_data = {
127         .adapter_nr     = 3,
128         .bus_count      = 1,
129         .bus_clk_rate   = { 100000, 0 },
130 };
131
132 static struct tegra_i2c_platform_data p1852_i2c5_platform_data = {
133         .adapter_nr     = 4,
134         .bus_count      = 1,
135         .bus_clk_rate   = { 100000, 0 },
136 };
137
138 static struct tegra_pci_platform_data p1852_pci_platform_data = {
139         .port_status[0] = 0,
140         .port_status[1] = 1,
141         .port_status[2] = 1,
142         .use_dock_detect = 0,
143         .gpio           = 0,
144 };
145
146 static void p1852_pcie_init(void)
147 {
148         tegra_pci_device.dev.platform_data = &p1852_pci_platform_data;
149         platform_device_register(&tegra_pci_device);
150 }
151
152 static void p1852_i2c_init(void)
153 {
154         tegra_i2c_device1.dev.platform_data = &p1852_i2c1_platform_data;
155         tegra_i2c_device2.dev.platform_data = &p1852_i2c2_platform_data;
156         tegra_i2c_device4.dev.platform_data = &p1852_i2c4_platform_data;
157         tegra_i2c_device5.dev.platform_data = &p1852_i2c5_platform_data;
158
159         platform_device_register(&tegra_i2c_device5);
160         platform_device_register(&tegra_i2c_device4);
161         platform_device_register(&tegra_i2c_device2);
162         platform_device_register(&tegra_i2c_device1);
163 }
164
165 static struct platform_device *p1852_uart_devices[] __initdata = {
166         &tegra_uarta_device,
167         &tegra_uartb_device,
168         &tegra_uartd_device,
169         &tegra_uarte_device,
170 };
171 static struct clk *debug_uart_clk;
172
173 static void __init uart_debug_init(void)
174 {
175         /* Use skuinfo to decide debug uart */
176         /* UARTB is the debug port. */
177         pr_info("Selecting UARTB as the debug console\n");
178         p1852_uart_devices[1] = &debug_uartb_device;
179         debug_uart_clk = clk_get_sys("serial8250.0", "uartb");
180 }
181
182 static void __init p1852_uart_init(void)
183 {
184         /* Register low speed only if it is selected */
185         if (!is_tegra_debug_uartport_hs()) {
186                 uart_debug_init();
187                 /* Clock enable for the debug channel */
188                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
189                         pr_info("The debug console clock name is %s\n",
190                                                 debug_uart_clk->name);
191                         clk_enable(debug_uart_clk);
192                         clk_set_rate(debug_uart_clk, 408000000);
193                 } else {
194                         pr_err("Not getting the clock %s for debug console\n",
195                                         debug_uart_clk->name);
196                 }
197         }
198
199         platform_add_devices(p1852_uart_devices,
200                                 ARRAY_SIZE(p1852_uart_devices));
201 }
202
203 #if defined(CONFIG_TEGRA_P1852_TDM)
204 static struct tegra_p1852_platform_data p1852_audio_tdm_pdata = {
205         .codec_info[0] = {
206                 .codec_dai_name = "dit-hifi",
207                 .cpu_dai_name = "tegra30-i2s.0",
208                 .codec_name = "spdif-dit.0",
209                 .name = "tegra-i2s-1",
210                 .pcm_driver = "tegra-tdm-pcm-audio",
211                 .i2s_format = format_tdm,
212                 /* Defines whether the Codec Chip is Master or Slave */
213                 .master = 1,
214                 /* Defines the number of TDM slots */
215                 .num_slots = 8,
216                 /* Defines the width of each slot */
217                 .slot_width = 32,
218                 /* Defines which slots are enabled */
219                 .tx_mask = 0xff,
220                 .rx_mask = 0xff,
221         },
222         .codec_info[1] = {
223                 .codec_dai_name = "dit-hifi",
224                 .cpu_dai_name = "tegra30-i2s.4",
225                 .codec_name = "spdif-dit.1",
226                 .name = "tegra-i2s-2",
227                 .pcm_driver = "tegra-tdm-pcm-audio",
228                 .i2s_format = format_tdm,
229                 .master = 1,
230                 .num_slots = 8,
231                 .slot_width = 32,
232                 .tx_mask = 0xff,
233                 .rx_mask = 0xff,
234         },
235 };
236 #else
237 static struct tegra_p1852_platform_data p1852_audio_i2s_pdata = {
238         .codec_info[0] = {
239                 .codec_dai_name = "dit-hifi",
240                 .cpu_dai_name = "tegra30-i2s.0",
241                 .codec_name = "spdif-dit.0",
242                 .name = "tegra-i2s-1",
243                 .pcm_driver = "tegra-pcm-audio",
244                 .i2s_format = format_i2s,
245                 .master = 1,
246         },
247         .codec_info[1] = {
248                 .codec_dai_name = "dit-hifi",
249                 .cpu_dai_name = "tegra30-i2s.4",
250                 .codec_name = "spdif-dit.1",
251                 .name = "tegra-i2s-2",
252                 .pcm_driver = "tegra-pcm-audio",
253                 .i2s_format = format_i2s,
254                 .master = 0,
255         },
256 };
257 #endif
258 static struct platform_device generic_codec_1 = {
259         .name           = "spdif-dit",
260         .id                     = 0,
261 };
262 static struct platform_device generic_codec_2 = {
263         .name           = "spdif-dit",
264         .id                     = 1,
265 };
266
267 static struct platform_device tegra_snd_p1852 = {
268         .name       = "tegra-snd-p1852",
269         .id = 0,
270         .dev    = {
271 #if defined(CONFIG_TEGRA_P1852_TDM)
272                 .platform_data = &p1852_audio_tdm_pdata,
273 #else
274                 .platform_data = &p1852_audio_i2s_pdata,
275 #endif
276         },
277 };
278
279 static void p1852_i2s_audio_init(void)
280 {
281         platform_device_register(&tegra_pcm_device);
282         platform_device_register(&tegra_tdm_pcm_device);
283         platform_device_register(&generic_codec_1);
284         platform_device_register(&generic_codec_2);
285         platform_device_register(&tegra_i2s_device0);
286         platform_device_register(&tegra_i2s_device4);
287         platform_device_register(&tegra_ahub_device);
288         platform_device_register(&tegra_snd_p1852);
289 }
290
291
292 #if defined(CONFIG_SPI_TEGRA) && defined(CONFIG_SPI_SPIDEV)
293 static struct spi_board_info tegra_spi_devices[] __initdata = {
294         {
295                 .modalias = "spidev",
296                 .bus_num = 0,
297                 .chip_select = 0,
298                 .mode = SPI_MODE_0,
299                 .max_speed_hz = 18000000,
300                 .platform_data = NULL,
301                 .irq = 0,
302         },
303         {
304                 .modalias = "spidev",
305                 .bus_num = 1,
306                 .chip_select = 1,
307                 .mode = SPI_MODE_0,
308                 .max_speed_hz = 18000000,
309                 .platform_data = NULL,
310                 .irq = 0,
311         },
312         {
313                 .modalias = "spidev",
314                 .bus_num = 2,
315                 .chip_select = 0,
316                 .mode = SPI_MODE_0,
317                 .max_speed_hz = 18000000,
318                 .platform_data = NULL,
319                 .irq = 0,
320         },
321         {
322                 .modalias = "spidev",
323                 .bus_num = 3,
324                 .chip_select = 1,
325                 .mode = SPI_MODE_0,
326                 .max_speed_hz = 18000000,
327                 .platform_data = NULL,
328                 .irq = 0,
329         },
330 };
331
332 static void __init p852_register_spidev(void)
333 {
334         spi_register_board_info(tegra_spi_devices,
335                         ARRAY_SIZE(tegra_spi_devices));
336 }
337 #else
338 #define p852_register_spidev() do {} while (0)
339 #endif
340
341
342 static void p1852_spi_init(void)
343 {
344         tegra_spi_device2.name = "spi_slave_tegra";
345         platform_device_register(&tegra_spi_device1);
346         platform_device_register(&tegra_spi_device2);
347         platform_device_register(&tegra_spi_device3);
348         p852_register_spidev();
349 }
350
351 static struct platform_device tegra_camera = {
352         .name = "tegra_camera",
353         .id = -1,
354 };
355
356 static struct platform_device *p1852_devices[] __initdata = {
357 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
358         &tegra_smmu_device,
359 #endif
360 #if defined(CONFIG_TEGRA_AVP)
361         &tegra_avp_device,
362 #endif
363         &tegra_camera,
364         &tegra_wdt0_device,
365         &tegra_wdt1_device,
366         &tegra_wdt2_device
367 };
368
369
370 #ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
371
372 #define MXT_CONFIG_CRC  0xD62DE8
373 static const u8 config[] = {
374         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
375         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
376         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
377         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
378         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
379         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
380         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
381         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
382         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
383         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
384         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
385         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
386         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
387         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
388         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
389         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
390         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
391         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
392         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
393         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
394 };
395
396 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
397 static const u8 config_sku2000[] = {
398         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
399         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
400         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
401         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
402         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
403         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
404         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
405         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
406         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
407         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
408         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
409         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
410         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
411         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
412         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
413         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
414         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
415         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
416         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
417         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
418 };
419
420 static struct mxt_platform_data atmel_mxt_info = {
421         .x_line         = 27,
422         .y_line         = 42,
423         .x_size         = 768,
424         .y_size         = 1366,
425         .blen           = 0x20,
426         .threshold      = 0x3C,
427         .voltage        = 3300000,              /* 3.3V */
428         .orient         = 5,
429         .config         = config,
430         .config_length  = 157,
431         .config_crc     = MXT_CONFIG_CRC,
432         .irqflags       = IRQF_TRIGGER_FALLING,
433 /*      .read_chg       = &read_chg, */
434         .read_chg       = NULL,
435 };
436
437 static struct i2c_board_info __initdata atmel_i2c_info[] = {
438         {
439                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
440                 .irq = TEGRA_GPIO_TO_IRQ(TOUCH_GPIO_IRQ_ATMEL_T9),
441                 .platform_data = &atmel_mxt_info,
442         }
443 };
444
445 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
446         /* name         parent          rate            enabled */
447         { "sbc1",       "pll_p",        52000000,       true},
448         { NULL,         NULL,           0,              0},
449 };
450
451 static int __init p1852_touch_init(void)
452 {
453         tegra_gpio_enable(TOUCH_GPIO_IRQ_ATMEL_T9);
454         tegra_gpio_enable(TOUCH_GPIO_RST_ATMEL_T9);
455
456         gpio_request(TOUCH_GPIO_IRQ_ATMEL_T9, "atmel-irq");
457         gpio_direction_input(TOUCH_GPIO_IRQ_ATMEL_T9);
458
459         gpio_request(TOUCH_GPIO_RST_ATMEL_T9, "atmel-reset");
460         gpio_direction_output(TOUCH_GPIO_RST_ATMEL_T9, 0);
461         msleep(1);
462         gpio_set_value(TOUCH_GPIO_RST_ATMEL_T9, 1);
463         msleep(100);
464
465         atmel_mxt_info.config = config_sku2000;
466         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
467
468         i2c_register_board_info(TOUCH_BUS_ATMEL_T9, atmel_i2c_info, 1);
469
470         return 0;
471 }
472
473 #endif // CONFIG_TOUCHSCREEN_ATMEL_MXT
474
475 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
476         .port_otg = false,
477         .has_hostpc = true,
478         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
479         .op_mode = TEGRA_USB_OPMODE_HOST,
480         .u_data.host = {
481                 .vbus_gpio = -1,
482                 .vbus_reg = NULL,
483                 .hot_plug = false,
484                 .remote_wakeup_supported = true,
485                 .power_off_on_suspend = true,
486         },
487         .u_cfg.utmi = {
488                 .hssync_start_delay = 0,
489                 .idle_wait_delay = 17,
490                 .elastic_limit = 16,
491                 .term_range_adj = 6,
492                 .xcvr_setup = 63,
493                 .xcvr_setup_offset = 6,
494                 .xcvr_use_fuses = 1,
495                 .xcvr_lsfslew = 2,
496                 .xcvr_lsrslew = 2,
497                 .xcvr_use_lsb = 1,
498         },
499 };
500
501 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
502         .port_otg = false,
503         .has_hostpc = true,
504         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
505         .op_mode = TEGRA_USB_OPMODE_HOST,
506         .u_data.host = {
507                 .vbus_gpio = -1,
508                 .vbus_reg = NULL,
509                 .hot_plug = false,
510                 .remote_wakeup_supported = true,
511                 .power_off_on_suspend = true,
512         },
513         .u_cfg.utmi = {
514                 .hssync_start_delay = 0,
515                 .idle_wait_delay = 17,
516                 .elastic_limit = 16,
517                 .term_range_adj = 6,
518                 .xcvr_setup = 63,
519                 .xcvr_setup_offset = 6,
520                 .xcvr_use_fuses = 1,
521                 .xcvr_lsfslew = 2,
522                 .xcvr_lsrslew = 2,
523                 .xcvr_use_lsb = 1,
524         },
525 };
526
527 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
528         .port_otg = false,
529         .has_hostpc = true,
530         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
531         .op_mode = TEGRA_USB_OPMODE_HOST,
532         .u_data.host = {
533                 .vbus_gpio = -1,
534                 .vbus_reg = NULL,
535                 .hot_plug = false,
536                 .remote_wakeup_supported = true,
537                 .power_off_on_suspend = true,
538         },
539         .u_cfg.utmi = {
540                 .hssync_start_delay = 0,
541                 .idle_wait_delay = 17,
542                 .elastic_limit = 16,
543                 .term_range_adj = 6,
544                 .xcvr_setup = 63,
545                 .xcvr_setup_offset = 6,
546                 .xcvr_use_fuses = 1,
547                 .xcvr_lsfslew = 2,
548                 .xcvr_lsrslew = 2,
549                 .xcvr_use_lsb = 1,
550         },
551 };
552
553 static void p1852_usb_init(void)
554 {
555         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
556         platform_device_register(&tegra_ehci1_device);
557
558         tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
559         platform_device_register(&tegra_ehci2_device);
560
561         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
562         platform_device_register(&tegra_ehci3_device);
563 }
564
565 static struct tegra_nor_platform_data p1852_nor_data = {
566         .flash = {
567                 .map_name = "cfi_probe",
568                 .width = 2,
569         },
570         .chip_parms = {
571                 /* FIXME: Need to use characterized value */
572                 .timing_default = {
573                         .timing0 = 0x30300263,
574                         .timing1 = 0x00030302,
575                 },
576                 .timing_read = {
577                         .timing0 = 0x30300263,
578                         .timing1 = 0x00030302,
579                 },
580         },
581 };
582
583 static void p1852_nor_init(void)
584 {
585         tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
586         tegra_nor_device.dev.platform_data = &p1852_nor_data;
587         platform_device_register(&tegra_nor_device);
588 }
589
590 static void __init tegra_p1852_init(void)
591 {
592         tegra_init_board_info();
593         tegra_clk_init_from_table(p1852_clk_init_table);
594         tegra_enable_pinmux();
595         p1852_pinmux_init();
596         p1852_i2c_init();
597         p1852_i2s_audio_init();
598         p1852_gpio_init();
599         p1852_uart_init();
600         p1852_usb_init();
601         tegra_io_dpd_init();
602         p1852_sdhci_init();
603         p1852_spi_init();
604         platform_add_devices(p1852_devices, ARRAY_SIZE(p1852_devices));
605 #ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
606         p1852_touch_init();
607 #endif
608         p1852_panel_init();
609         p1852_nor_init();
610         p1852_pcie_init();
611         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
612 }
613
614 static void __init tegra_p1852_reserve(void)
615 {
616 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
617         tegra_reserve(0, SZ_8M, SZ_8M);
618 #else
619         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
620 #endif
621 }
622
623 int p1852_get_skuid()
624 {
625         switch (system_rev) {
626         case TEGRA_P1852_SKU2_A00:
627         case TEGRA_P1852_SKU2_B00:
628                 return 2;
629         case TEGRA_P1852_SKU5_A00:
630         case TEGRA_P1852_SKU5_B00:
631                 return 5;
632         case TEGRA_P1852_SKU8_A00:
633         case TEGRA_P1852_SKU8_B00:
634                 return 8;
635         default:
636                 return -1;
637         }
638 }
639
640 MACHINE_START(P1852, "p1852")
641         .atag_offset    = 0x100,
642         .soc            = &tegra_soc_desc,
643         .init_irq       = tegra_init_irq,
644         .init_early     = tegra_init_early,
645         .init_machine   = tegra_p1852_init,
646         .map_io         = tegra_map_common_io,
647         .reserve        = tegra_p1852_reserve,
648         .timer          = &tegra_timer,
649 MACHINE_END