36767cd348191ac70ec1c144e95ec97854ce2f23
[linux-2.6.git] / arch / arm / mach-tegra / board-p1852.c
1 /*
2  * arch/arm/mach-tegra/board-p1852.c
3  *
4  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/i2c/panjit_ts.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/platform_data/tegra_nor.h>
36 #include <linux/spi/spi.h>
37 #include <linux/mtd/partitions.h>
38 #if defined(CONFIG_TOUCHSCREEN_ATMEL_MXT)
39 #include <linux/i2c/atmel_mxt_ts.h>
40 #endif
41 #include <mach/clk.h>
42 #include <mach/iomap.h>
43 #include <mach/irqs.h>
44 #include <mach/pinmux.h>
45 #include <mach/iomap.h>
46 #include <mach/io.h>
47 #include <mach/pci.h>
48 #include <mach/audio.h>
49 #include <mach/tegra_p1852_pdata.h>
50 #include <asm/mach/flash.h>
51 #include <asm/mach-types.h>
52 #include <asm/mach/arch.h>
53 #include <mach/usb_phy.h>
54 #include <sound/wm8903.h>
55 #include <mach/tsensor.h>
56 #include "board.h"
57 #include "clock.h"
58 #include "board-p1852.h"
59 #include "devices.h"
60 #include "gpio-names.h"
61 #include "fuse.h"
62 #include "common.h"
63
64 static __initdata struct tegra_clk_init_table p1852_clk_init_table[] = {
65         /* name         parent          rate            enabled */
66         { "pll_m",              NULL,           0,              true},
67         { "hda",                "pll_p",        108000000,      false},
68         { "hda2codec_2x",       "pll_p",        48000000,       false},
69         { "pwm",                "clk_32k",      32768,          false},
70         { "blink",              "clk_32k",      32768,          true},
71         { "pll_a",              NULL,           552960000,      false},
72         /* audio cif clock should be faster than i2s */
73         { "pll_a_out0",         NULL,           24576000,       false},
74         { "d_audio",            "pll_a_out0",   24576000,       false},
75         { "nor",                "pll_p",        102000000,      true},
76         { "uarta",              "pll_p",        480000000,      true},
77         { "uartd",              "pll_p",        480000000,      true},
78         { "uarte",              "pll_p",        480000000,      true},
79         { "sdmmc2",             "pll_p",        52000000,       true},
80         { "sbc1",               "pll_m",        100000000,      true},
81         { "sbc2",               "pll_m",        100000000,      true},
82         { "sbc3",               "pll_m",        100000000,      true},
83         { "sbc4",               "pll_m",        100000000,      true},
84         { "sbc5",               "pll_m",        100000000,      true},
85         { "sbc6",               "pll_m",        100000000,      true},
86         { "cpu_g",              "cclk_g",       900000000,      true},
87         { "i2s0",               "pll_a_out0",   24576000,       false},
88         { "i2s1",               "pll_a_out0",   24576000,       false},
89         { "i2s2",               "pll_a_out0",   24576000,       false},
90         { "i2s3",               "pll_a_out0",   24576000,       false},
91         { "i2s4",               "pll_a_out0",   24576000,       false},
92         { "apbif",              "clk_m",        12000000,       false},
93         { "dam0",               "clk_m",        12000000,       true},
94         { "dam1",               "clk_m",        12000000,       true},
95         { "dam2",               "clk_m",        12000000,       true},
96         { "vi",                 "pll_p",        470000000,      false},
97         { "vi_sensor",          "pll_p",        150000000,      false},
98         { "vde",                "pll_c",        484000000,      true},
99         { "host1x",             "pll_c",        242000000,      true},
100         { "mpe",                "pll_c",        484000000,      true},
101         { "se",                 "pll_m",        625000000,      true},
102         { "i2c1",               "pll_p",        3200000,        true},
103         { "i2c2",               "pll_p",        3200000,        true},
104         { "i2c3",               "pll_p",        3200000,        true},
105         { "i2c4",               "pll_p",        3200000,        true},
106         { "i2c5",               "pll_p",        3200000,        true},
107         { "sdmmc2",             "pll_p",        104000000,      false},
108         {"wake.sclk",           NULL,           334000000,      true },
109         { NULL,                 NULL,           0,              0},
110 };
111
112 static struct tegra_i2c_platform_data p1852_i2c1_platform_data = {
113         .adapter_nr     = 0,
114         .bus_count      = 1,
115         .bus_clk_rate   = { 100000, 0 },
116 };
117
118 static struct tegra_i2c_platform_data p1852_i2c2_platform_data = {
119         .adapter_nr     = 1,
120         .bus_count      = 1,
121         .bus_clk_rate   = { 100000, 0 },
122         .is_clkon_always = true,
123 };
124
125 static struct tegra_i2c_platform_data p1852_i2c4_platform_data = {
126         .adapter_nr     = 3,
127         .bus_count      = 1,
128         .bus_clk_rate   = { 100000, 0 },
129 };
130
131 static struct tegra_i2c_platform_data p1852_i2c5_platform_data = {
132         .adapter_nr     = 4,
133         .bus_count      = 1,
134         .bus_clk_rate   = { 100000, 0 },
135 };
136
137 static struct tegra_pci_platform_data p1852_pci_platform_data = {
138         .port_status[0] = 0,
139         .port_status[1] = 1,
140         .port_status[2] = 1,
141         .use_dock_detect = 0,
142         .gpio           = 0,
143 };
144
145 static void p1852_pcie_init(void)
146 {
147         tegra_pci_device.dev.platform_data = &p1852_pci_platform_data;
148         platform_device_register(&tegra_pci_device);
149 }
150
151 static void p1852_i2c_init(void)
152 {
153         tegra_i2c_device1.dev.platform_data = &p1852_i2c1_platform_data;
154         tegra_i2c_device2.dev.platform_data = &p1852_i2c2_platform_data;
155         tegra_i2c_device4.dev.platform_data = &p1852_i2c4_platform_data;
156         tegra_i2c_device5.dev.platform_data = &p1852_i2c5_platform_data;
157
158         platform_device_register(&tegra_i2c_device5);
159         platform_device_register(&tegra_i2c_device4);
160         platform_device_register(&tegra_i2c_device2);
161         platform_device_register(&tegra_i2c_device1);
162 }
163
164 static struct platform_device *p1852_uart_devices[] __initdata = {
165         &tegra_uarta_device,
166         &tegra_uartb_device,
167         &tegra_uartd_device,
168         &tegra_uarte_device,
169 };
170 static struct clk *debug_uart_clk;
171
172 static void __init uart_debug_init(void)
173 {
174         /* Use skuinfo to decide debug uart */
175         /* UARTB is the debug port. */
176         pr_info("Selecting UARTB as the debug console\n");
177         p1852_uart_devices[1] = &debug_uartb_device;
178         debug_uart_clk = clk_get_sys("serial8250.0", "uartb");
179 }
180
181 static void __init p1852_uart_init(void)
182 {
183         /* Register low speed only if it is selected */
184         if (!is_tegra_debug_uartport_hs()) {
185                 uart_debug_init();
186                 /* Clock enable for the debug channel */
187                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
188                         pr_info("The debug console clock name is %s\n",
189                                                 debug_uart_clk->name);
190                         clk_enable(debug_uart_clk);
191                         clk_set_rate(debug_uart_clk, 408000000);
192                 } else {
193                         pr_err("Not getting the clock %s for debug console\n",
194                                         debug_uart_clk->name);
195                 }
196         }
197
198         platform_add_devices(p1852_uart_devices,
199                                 ARRAY_SIZE(p1852_uart_devices));
200 }
201
202 #if defined(CONFIG_TEGRA_P1852_TDM)
203 static struct tegra_p1852_platform_data p1852_audio_tdm_pdata = {
204         .codec_info[0] = {
205                 .codec_dai_name = "dit-hifi",
206                 .cpu_dai_name = "tegra30-i2s.0",
207                 .codec_name = "spdif-dit.0",
208                 .name = "tegra-i2s-1",
209                 .pcm_driver = "tegra-tdm-pcm-audio",
210                 .i2s_format = format_tdm,
211                 .master = 1,
212                 .num_slots = 4,
213                 .slot_width = 32,
214                 .tx_mask = 0x0f,
215                 .rx_mask = 0x0f,
216         },
217         .codec_info[1] = {
218                 .codec_dai_name = "dit-hifi",
219                 .cpu_dai_name = "tegra30-i2s.4",
220                 .codec_name = "spdif-dit.1",
221                 .name = "tegra-i2s-2",
222                 .pcm_driver = "tegra-tdm-pcm-audio",
223                 .i2s_format = format_tdm,
224                 .master = 1,
225                 .num_slots = 8,
226                 .slot_width = 32,
227                 .tx_mask = 0xff,
228                 .rx_mask = 0xff,
229         },
230 };
231 #else
232 static struct tegra_p1852_platform_data p1852_audio_i2s_pdata = {
233         .codec_info[0] = {
234                 .codec_dai_name = "dit-hifi",
235                 .cpu_dai_name = "tegra30-i2s.0",
236                 .codec_name = "spdif-dit.0",
237                 .name = "tegra-i2s-1",
238                 .pcm_driver = "tegra-pcm-audio",
239                 .i2s_format = format_i2s,
240                 .master = 1,
241         },
242         .codec_info[1] = {
243                 .codec_dai_name = "dit-hifi",
244                 .cpu_dai_name = "tegra30-i2s.4",
245                 .codec_name = "spdif-dit.1",
246                 .name = "tegra-i2s-2",
247                 .pcm_driver = "tegra-pcm-audio",
248                 .i2s_format = format_i2s,
249                 .master = 0,
250         },
251 };
252 #endif
253 static struct platform_device generic_codec_1 = {
254         .name           = "spdif-dit",
255         .id                     = 0,
256 };
257 static struct platform_device generic_codec_2 = {
258         .name           = "spdif-dit",
259         .id                     = 1,
260 };
261
262 static struct platform_device tegra_snd_p1852 = {
263         .name       = "tegra-snd-p1852",
264         .id = 0,
265         .dev    = {
266 #if defined(CONFIG_TEGRA_P1852_TDM)
267                 .platform_data = &p1852_audio_tdm_pdata,
268 #else
269                 .platform_data = &p1852_audio_i2s_pdata,
270 #endif
271         },
272 };
273
274 static void p1852_i2s_audio_init(void)
275 {
276         platform_device_register(&tegra_pcm_device);
277         platform_device_register(&tegra_tdm_pcm_device);
278         platform_device_register(&generic_codec_1);
279         platform_device_register(&generic_codec_2);
280         platform_device_register(&tegra_i2s_device0);
281         platform_device_register(&tegra_i2s_device4);
282         platform_device_register(&tegra_ahub_device);
283         platform_device_register(&tegra_snd_p1852);
284 }
285
286
287 #if defined(CONFIG_SPI_TEGRA) && defined(CONFIG_SPI_SPIDEV)
288 static struct spi_board_info tegra_spi_devices[] __initdata = {
289         {
290                 .modalias = "spidev",
291                 .bus_num = 0,
292                 .chip_select = 0,
293                 .mode = SPI_MODE_0,
294                 .max_speed_hz = 18000000,
295                 .platform_data = NULL,
296                 .irq = 0,
297         },
298         {
299                 .modalias = "spidev",
300                 .bus_num = 1,
301                 .chip_select = 1,
302                 .mode = SPI_MODE_0,
303                 .max_speed_hz = 18000000,
304                 .platform_data = NULL,
305                 .irq = 0,
306         },
307         {
308                 .modalias = "spidev",
309                 .bus_num = 2,
310                 .chip_select = 0,
311                 .mode = SPI_MODE_0,
312                 .max_speed_hz = 18000000,
313                 .platform_data = NULL,
314                 .irq = 0,
315         },
316         {
317                 .modalias = "spidev",
318                 .bus_num = 3,
319                 .chip_select = 1,
320                 .mode = SPI_MODE_0,
321                 .max_speed_hz = 18000000,
322                 .platform_data = NULL,
323                 .irq = 0,
324         },
325 };
326
327 static void __init p852_register_spidev(void)
328 {
329         spi_register_board_info(tegra_spi_devices,
330                         ARRAY_SIZE(tegra_spi_devices));
331 }
332 #else
333 #define p852_register_spidev() do {} while (0)
334 #endif
335
336
337 static void p1852_spi_init(void)
338 {
339         tegra_spi_device2.name = "spi_slave_tegra";
340         platform_device_register(&tegra_spi_device1);
341         platform_device_register(&tegra_spi_device2);
342         platform_device_register(&tegra_spi_device3);
343         p852_register_spidev();
344 }
345
346 static struct platform_device tegra_camera = {
347         .name = "tegra_camera",
348         .id = -1,
349 };
350
351 static struct platform_device *p1852_devices[] __initdata = {
352 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
353         &tegra_smmu_device,
354 #endif
355 #if defined(CONFIG_TEGRA_AVP)
356         &tegra_avp_device,
357 #endif
358         &tegra_camera,
359         &tegra_wdt_device
360 };
361
362
363 #ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
364
365 #define MXT_CONFIG_CRC  0xD62DE8
366 static const u8 config[] = {
367         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
368         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
369         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
370         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
371         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
372         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
373         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
374         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
375         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
376         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
377         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
378         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
379         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
380         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
381         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
382         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
383         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
384         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
385         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
386         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
387 };
388
389 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
390 static const u8 config_sku2000[] = {
391         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
392         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
393         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
394         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
395         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
396         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
397         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
398         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
399         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
400         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
401         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
402         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
403         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
404         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
405         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
406         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
407         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
408         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
409         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
410         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
411 };
412
413 static struct mxt_platform_data atmel_mxt_info = {
414         .x_line         = 27,
415         .y_line         = 42,
416         .x_size         = 768,
417         .y_size         = 1366,
418         .blen           = 0x20,
419         .threshold      = 0x3C,
420         .voltage        = 3300000,              /* 3.3V */
421         .orient         = 5,
422         .config         = config,
423         .config_length  = 157,
424         .config_crc     = MXT_CONFIG_CRC,
425         .irqflags       = IRQF_TRIGGER_FALLING,
426 /*      .read_chg       = &read_chg, */
427         .read_chg       = NULL,
428 };
429
430 static struct i2c_board_info __initdata atmel_i2c_info[] = {
431         {
432                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
433                 .irq = TEGRA_GPIO_TO_IRQ(TOUCH_GPIO_IRQ_ATMEL_T9),
434                 .platform_data = &atmel_mxt_info,
435         }
436 };
437
438 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
439         /* name         parent          rate            enabled */
440         { "sbc1",       "pll_p",        52000000,       true},
441         { NULL,         NULL,           0,              0},
442 };
443
444 static int __init p1852_touch_init(void)
445 {
446         tegra_gpio_enable(TOUCH_GPIO_IRQ_ATMEL_T9);
447         tegra_gpio_enable(TOUCH_GPIO_RST_ATMEL_T9);
448
449         gpio_request(TOUCH_GPIO_IRQ_ATMEL_T9, "atmel-irq");
450         gpio_direction_input(TOUCH_GPIO_IRQ_ATMEL_T9);
451
452         gpio_request(TOUCH_GPIO_RST_ATMEL_T9, "atmel-reset");
453         gpio_direction_output(TOUCH_GPIO_RST_ATMEL_T9, 0);
454         msleep(1);
455         gpio_set_value(TOUCH_GPIO_RST_ATMEL_T9, 1);
456         msleep(100);
457
458         atmel_mxt_info.config = config_sku2000;
459         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
460
461         i2c_register_board_info(TOUCH_BUS_ATMEL_T9, atmel_i2c_info, 1);
462
463         return 0;
464 }
465
466 #endif // CONFIG_TOUCHSCREEN_ATMEL_MXT
467
468 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
469         .port_otg = false,
470         .has_hostpc = true,
471         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
472         .op_mode = TEGRA_USB_OPMODE_HOST,
473         .u_data.host = {
474                 .vbus_gpio = -1,
475                 .vbus_reg = NULL,
476                 .hot_plug = false,
477                 .remote_wakeup_supported = true,
478                 .power_off_on_suspend = true,
479         },
480         .u_cfg.utmi = {
481                 .hssync_start_delay = 0,
482                 .idle_wait_delay = 17,
483                 .elastic_limit = 16,
484                 .term_range_adj = 6,
485                 .xcvr_setup = 63,
486                 .xcvr_setup_offset = 6,
487                 .xcvr_use_fuses = 1,
488                 .xcvr_lsfslew = 2,
489                 .xcvr_lsrslew = 2,
490                 .xcvr_use_lsb = 1,
491         },
492 };
493
494 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
495         .port_otg = false,
496         .has_hostpc = true,
497         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
498         .op_mode = TEGRA_USB_OPMODE_HOST,
499         .u_data.host = {
500                 .vbus_gpio = -1,
501                 .vbus_reg = NULL,
502                 .hot_plug = false,
503                 .remote_wakeup_supported = true,
504                 .power_off_on_suspend = true,
505         },
506         .u_cfg.utmi = {
507                 .hssync_start_delay = 0,
508                 .idle_wait_delay = 17,
509                 .elastic_limit = 16,
510                 .term_range_adj = 6,
511                 .xcvr_setup = 63,
512                 .xcvr_setup_offset = 6,
513                 .xcvr_use_fuses = 1,
514                 .xcvr_lsfslew = 2,
515                 .xcvr_lsrslew = 2,
516                 .xcvr_use_lsb = 1,
517         },
518 };
519
520 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
521         .port_otg = false,
522         .has_hostpc = true,
523         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
524         .op_mode = TEGRA_USB_OPMODE_HOST,
525         .u_data.host = {
526                 .vbus_gpio = -1,
527                 .vbus_reg = NULL,
528                 .hot_plug = false,
529                 .remote_wakeup_supported = true,
530                 .power_off_on_suspend = true,
531         },
532         .u_cfg.utmi = {
533                 .hssync_start_delay = 0,
534                 .idle_wait_delay = 17,
535                 .elastic_limit = 16,
536                 .term_range_adj = 6,
537                 .xcvr_setup = 63,
538                 .xcvr_setup_offset = 6,
539                 .xcvr_use_fuses = 1,
540                 .xcvr_lsfslew = 2,
541                 .xcvr_lsrslew = 2,
542                 .xcvr_use_lsb = 1,
543         },
544 };
545
546 static void p1852_usb_init(void)
547 {
548         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
549         platform_device_register(&tegra_ehci1_device);
550
551         tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
552         platform_device_register(&tegra_ehci2_device);
553
554         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
555         platform_device_register(&tegra_ehci3_device);
556 }
557
558 static struct tegra_nor_platform_data p1852_nor_data = {
559         .flash = {
560                 .map_name = "cfi_probe",
561                 .width = 2,
562         },
563         .chip_parms = {
564                 /* FIXME: Need to use characterized value */
565                 .timing_default = {
566                         .timing0 = 0x30300263,
567                         .timing1 = 0x00030302,
568                 },
569                 .timing_read = {
570                         .timing0 = 0x30300263,
571                         .timing1 = 0x00030302,
572                 },
573         },
574 };
575
576 static void p1852_nor_init(void)
577 {
578         tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
579         tegra_nor_device.dev.platform_data = &p1852_nor_data;
580         platform_device_register(&tegra_nor_device);
581 }
582
583 static void __init tegra_p1852_init(void)
584 {
585         tegra_init_board_info();
586         tegra_clk_init_from_table(p1852_clk_init_table);
587         tegra_enable_pinmux();
588         p1852_pinmux_init();
589         p1852_i2c_init();
590         p1852_i2s_audio_init();
591         p1852_gpio_init();
592         p1852_uart_init();
593         p1852_usb_init();
594         p1852_sdhci_init();
595         p1852_spi_init();
596         platform_add_devices(p1852_devices, ARRAY_SIZE(p1852_devices));
597 #ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
598         p1852_touch_init();
599 #endif
600         p1852_panel_init();
601         p1852_nor_init();
602         p1852_pcie_init();
603 }
604
605 static void __init tegra_p1852_reserve(void)
606 {
607 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
608         tegra_reserve(0, SZ_8M, 0);
609 #else
610         tegra_reserve(SZ_128M, SZ_8M, 0);
611 #endif
612 }
613
614 MACHINE_START(P1852, "p1852")
615         .atag_offset    = 0x100,
616         .soc            = &tegra_soc_desc,
617         .init_irq       = tegra_init_irq,
618         .init_early     = tegra_init_early,
619         .init_machine   = tegra_p1852_init,
620         .map_io         = tegra_map_common_io,
621         .reserve        = tegra_p1852_reserve,
622         .timer          = &tegra_timer,
623 MACHINE_END