arm: tegra: enterprise: Add builtin host support for enterprise
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/memblock.h>
40
41 #include <linux/nfc/pn544.h>
42 #include <sound/max98088.h>
43
44 #include <asm/hardware/gic.h>
45
46 #include <mach/clk.h>
47 #include <mach/iomap.h>
48 #include <mach/irqs.h>
49 #include <mach/pinmux.h>
50 #include <mach/iomap.h>
51 #include <mach/io.h>
52 #include <asm/mach-types.h>
53 #include <asm/mach/arch.h>
54 #include <mach/usb_phy.h>
55 #include <mach/i2s.h>
56 #include <mach/tegra_asoc_pdata.h>
57 #include <mach/thermal.h>
58 #include <mach/tegra-bb-power.h>
59 #include <mach/gpio-tegra.h>
60
61 #include "board.h"
62 #include "clock.h"
63 #include "board-enterprise.h"
64 #include "baseband-xmm-power.h"
65 #include "devices.h"
66 #include "gpio-names.h"
67 #include "fuse.h"
68 #include "pm.h"
69
70 /* All units are in millicelsius */
71 static struct tegra_thermal_data thermal_data = {
72         .temp_shutdown = 90000,
73         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
74 #ifdef CONFIG_TEGRA_EDP_LIMITS
75         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
76         .hysteresis_edp = 3000,
77 #endif
78 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
79         .temp_throttle = 85000,
80         .tc1 = 0,
81         .tc2 = 1,
82         .passive_delay = 2000,
83 #endif
84 };
85
86 static struct resource enterprise_bcm4329_rfkill_resources[] = {
87         {
88                 .name   = "bcm4329_nshutdown_gpio",
89                 .start  = TEGRA_GPIO_PE6,
90                 .end    = TEGRA_GPIO_PE6,
91                 .flags  = IORESOURCE_IO,
92         },
93 };
94
95 static struct platform_device enterprise_bcm4329_rfkill_device = {
96         .name = "bcm4329_rfkill",
97         .id             = -1,
98         .num_resources  = ARRAY_SIZE(enterprise_bcm4329_rfkill_resources),
99         .resource       = enterprise_bcm4329_rfkill_resources,
100 };
101
102 static struct resource enterprise_bluesleep_resources[] = {
103         [0] = {
104                 .name = "gpio_host_wake",
105                         .start  = TEGRA_GPIO_PS2,
106                         .end    = TEGRA_GPIO_PS2,
107                         .flags  = IORESOURCE_IO,
108         },
109         [1] = {
110                 .name = "gpio_ext_wake",
111                         .start  = TEGRA_GPIO_PE7,
112                         .end    = TEGRA_GPIO_PE7,
113                         .flags  = IORESOURCE_IO,
114         },
115         [2] = {
116                 .name = "host_wake",
117                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
118         },
119 };
120
121 static struct platform_device enterprise_bluesleep_device = {
122         .name           = "bluesleep",
123         .id             = -1,
124         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
125         .resource       = enterprise_bluesleep_resources,
126 };
127
128 static void __init enterprise_setup_bluesleep(void)
129 {
130         enterprise_bluesleep_resources[2].start =
131                 enterprise_bluesleep_resources[2].end =
132                         gpio_to_irq(TEGRA_GPIO_PS2);
133         platform_device_register(&enterprise_bluesleep_device);
134         return;
135 }
136
137 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
138         /* name         parent          rate            enabled */
139         { "pll_m",      NULL,           0,              false},
140         { "hda",        "pll_p",        108000000,      false},
141         { "hda2codec_2x","pll_p",       48000000,       false},
142         { "pwm",        "clk_32k",      32768,          false},
143         { "blink",      "clk_32k",      32768,          true},
144         { "i2s0",       "pll_a_out0",   0,              false},
145         { "i2s1",       "pll_a_out0",   0,              false},
146         { "i2s2",       "pll_a_out0",   0,              false},
147         { "i2s3",       "pll_a_out0",   0,              false},
148         { "spdif_out",  "pll_a_out0",   0,              false},
149         { "d_audio",    "clk_m",        12000000,       false},
150         { "dam0",       "clk_m",        12000000,       false},
151         { "dam1",       "clk_m",        12000000,       false},
152         { "dam2",       "clk_m",        12000000,       false},
153         { "audio0",     "i2s0_sync",    0,              false},
154         { "audio1",     "i2s1_sync",    0,              false},
155         { "audio2",     "i2s2_sync",    0,              false},
156         { "audio3",     "i2s3_sync",    0,              false},
157         { "vi",         "pll_p",        0,              false},
158         { "vi_sensor",  "pll_p",        0,              false},
159         { NULL,         NULL,           0,              0},
160 };
161
162 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
163         .adapter_nr     = 0,
164         .bus_count      = 1,
165         .bus_clk_rate   = { 100000, 0 },
166         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
167         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
168         .arb_recovery = arb_lost_recovery,
169 };
170
171 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
172         .adapter_nr     = 1,
173         .bus_count      = 1,
174         .bus_clk_rate   = { 400000, 0 },
175         .is_clkon_always = true,
176         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
177         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
178         .arb_recovery = arb_lost_recovery,
179 };
180
181 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
182         .adapter_nr     = 2,
183         .bus_count      = 1,
184         .bus_clk_rate   = { 271000, 0 },
185         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
186         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
187         .arb_recovery = arb_lost_recovery,
188 };
189
190 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
191         .adapter_nr     = 3,
192         .bus_count      = 1,
193         .bus_clk_rate   = { 10000, 0 },
194         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
195         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
196         .arb_recovery = arb_lost_recovery,
197 };
198
199 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
200         .adapter_nr     = 4,
201         .bus_count      = 1,
202         .bus_clk_rate   = { 100000, 0 },
203         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
204         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
205         .arb_recovery = arb_lost_recovery,
206 };
207
208 /* Equalizer filter coefs generated from the MAXIM MAX98088
209  * evkit software tool */
210 static struct max98088_eq_cfg max98088_eq_cfg[] = {
211         {
212                 .name = "FLAT",
213                 .rate = 44100,
214                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
215                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
216                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
217                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
218                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
219         },
220         {
221                 .name = "LOWPASS1K",
222                 .rate = 44100,
223                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
224                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
225                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
226                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
227                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
228         },
229         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
230                 .name = "HIBOOST",
231                 .rate = 44100,
232                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
233                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
234                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
235                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
236                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
237         },
238         { /* BASS=12dB, TREBLE=+12dB */
239                 .name = "LOUD12DB",
240                 .rate = 44100,
241                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
242                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
243                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
244                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
245                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
246         },
247         {
248                 .name = "FLAT",
249                 .rate = 16000,
250                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
251                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
252                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
253                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
254                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
255         },
256         {
257                 .name = "LOWPASS1K",
258                 .rate = 16000,
259                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
260                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
261                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
262                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
263                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
264         },
265         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
266                 .name = "HIBOOST",
267                 .rate = 16000,
268                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
269                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
270                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
271                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
272                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
273         },
274         { /* BASS=12dB, TREBLE=+12dB */
275                 .name = "LOUD12DB",
276                 .rate = 16000,
277                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
278                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
279                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
280                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
281                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
282         },
283 };
284
285
286 static struct max98088_pdata enterprise_max98088_pdata = {
287         /* equalizer configuration */
288         .eq_cfg = max98088_eq_cfg,
289         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
290
291         /* debounce time */
292         .debounce_time_ms = 200,
293
294         /* microphone configuration */
295         .digmic_left_mode = 1,
296         .digmic_right_mode = 1,
297
298         /* receiver output configuration */
299         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
300 };
301
302 static struct pn544_i2c_platform_data nfc_pdata = {
303                 .irq_gpio = TEGRA_GPIO_PS4,
304                 .ven_gpio = TEGRA_GPIO_PM6,
305                 .firm_gpio = 0,
306 };
307
308
309 static struct i2c_board_info __initdata max98088_board_info = {
310         I2C_BOARD_INFO("max98088", 0x10),
311         .platform_data = &enterprise_max98088_pdata,
312 };
313
314 static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
315         I2C_BOARD_INFO("aic3262-codec", 0x18),
316 };
317
318 static struct i2c_board_info __initdata nfc_board_info = {
319         I2C_BOARD_INFO("pn544", 0x28),
320         .platform_data = &nfc_pdata,
321 };
322
323 static void enterprise_i2c_init(void)
324 {
325         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
326         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
327         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
328         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
329         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
330
331         platform_device_register(&tegra_i2c_device5);
332         platform_device_register(&tegra_i2c_device4);
333         platform_device_register(&tegra_i2c_device3);
334         platform_device_register(&tegra_i2c_device2);
335         platform_device_register(&tegra_i2c_device1);
336
337         max98088_board_info.irq = enterprise_codec_aic326x_info.irq =
338                 gpio_to_irq(TEGRA_GPIO_HP_DET);
339         i2c_register_board_info(0, &max98088_board_info, 1);
340         i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
341         nfc_board_info.irq = gpio_to_irq(TEGRA_GPIO_PS4);
342         i2c_register_board_info(0, &nfc_board_info, 1);
343 }
344
345 static struct platform_device *enterprise_uart_devices[] __initdata = {
346         &tegra_uarta_device,
347         &tegra_uartb_device,
348         &tegra_uartc_device,
349         &tegra_uartd_device,
350         &tegra_uarte_device,
351 };
352
353 static struct uart_clk_parent uart_parent_clk[] = {
354         [0] = {.name = "clk_m"},
355         [1] = {.name = "pll_p"},
356 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
357         [2] = {.name = "pll_m"},
358 #endif
359 };
360 static struct tegra_uart_platform_data enterprise_uart_pdata;
361 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
362
363 static void __init uart_debug_init(void)
364 {
365         unsigned long rate;
366         struct clk *c;
367
368         /* UARTD is the debug port. */
369         pr_info("Selecting UARTD as the debug console\n");
370         enterprise_uart_devices[3] = &debug_uartd_device;
371         debug_uart_port_base = ((struct plat_serial8250_port *)(
372                         debug_uartd_device.dev.platform_data))->mapbase;
373         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
374
375         /* Clock enable for the debug channel */
376         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
377                 rate = ((struct plat_serial8250_port *)(
378                         debug_uartd_device.dev.platform_data))->uartclk;
379                 pr_info("The debug console clock name is %s\n",
380                                                 debug_uart_clk->name);
381                 c = tegra_get_clock_by_name("pll_p");
382                 if (IS_ERR_OR_NULL(c))
383                         pr_err("Not getting the parent clock pll_p\n");
384                 else
385                         clk_set_parent(debug_uart_clk, c);
386
387                 clk_enable(debug_uart_clk);
388                 clk_set_rate(debug_uart_clk, rate);
389         } else {
390                 pr_err("Not getting the clock %s for debug console\n",
391                                 debug_uart_clk->name);
392         }
393 }
394
395 static void __init enterprise_uart_init(void)
396 {
397         int i;
398         struct clk *c;
399
400         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
401                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
402                 if (IS_ERR_OR_NULL(c)) {
403                         pr_err("Not able to get the clock for %s\n",
404                                                 uart_parent_clk[i].name);
405                         continue;
406                 }
407                 uart_parent_clk[i].parent_clk = c;
408                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
409         }
410         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
411         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
412         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
413         enterprise_loopback_uart_pdata.parent_clk_count =
414                                                 ARRAY_SIZE(uart_parent_clk);
415         enterprise_loopback_uart_pdata.is_loopback = true;
416         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
417         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
418         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
419         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
420         /* UARTE is used for loopback test purpose */
421         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
422
423         /* Register low speed only if it is selected */
424         if (!is_tegra_debug_uartport_hs())
425                 uart_debug_init();
426
427         platform_add_devices(enterprise_uart_devices,
428                                 ARRAY_SIZE(enterprise_uart_devices));
429 }
430
431
432
433 static struct resource tegra_rtc_resources[] = {
434         [0] = {
435                 .start = TEGRA_RTC_BASE,
436                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
437                 .flags = IORESOURCE_MEM,
438         },
439         [1] = {
440                 .start = INT_RTC,
441                 .end = INT_RTC,
442                 .flags = IORESOURCE_IRQ,
443         },
444 };
445
446 static struct platform_device tegra_rtc_device = {
447         .name = "tegra_rtc",
448         .id   = -1,
449         .resource = tegra_rtc_resources,
450         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
451 };
452
453 static struct platform_device tegra_camera = {
454         .name = "tegra_camera",
455         .id = -1,
456 };
457
458 static struct tegra_asoc_platform_data enterprise_audio_pdata = {
459         .gpio_spkr_en           = -1,
460         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
461         .gpio_hp_mute           = -1,
462         .gpio_int_mic_en        = -1,
463         .gpio_ext_mic_en        = -1,
464         .debounce_time_hp = -1,
465         /*defaults for Enterprise board*/
466         .audio_port_id          = {
467                 [HIFI_CODEC] = 0,
468                 [BASEBAND] = 2,
469                 [BT_SCO] = 3,
470         },
471         .baseband_param         = {
472                 .rate = 8000,
473                 .channels = 1,
474         },
475 };
476
477 static struct platform_device enterprise_audio_device = {
478         .name   = "tegra-snd-max98088",
479         .id     = 0,
480         .dev    = {
481                 .platform_data  = &enterprise_audio_pdata,
482         },
483 };
484
485 static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
486         .gpio_spkr_en           = -1,
487         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
488         .gpio_hp_mute           = -1,
489         .gpio_int_mic_en        = -1,
490         .gpio_ext_mic_en        = -1,
491         /*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
492         .audio_port_id          = {
493                 [HIFI_CODEC] = 0,
494                 [BASEBAND] = 2,
495                 [BT_SCO] = 3,
496         },
497         .baseband_param         = {
498                 .rate = 8000,
499                 .channels = 1,
500                 .bit_format = TEGRA_DAIFMT_DSP_A,
501         },
502 };
503
504 static struct platform_device enterprise_audio_aic326x_device = {
505         .name   = "tegra-snd-aic326x",
506         .id     = 0,
507         .dev    = {
508                 .platform_data  = &enterprise_audio_aic326x_pdata,
509         },
510 };
511
512 static struct platform_device *enterprise_devices[] __initdata = {
513         &tegra_pmu_device,
514         &tegra_rtc_device,
515         &tegra_udc_device,
516 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
517         &tegra_smmu_device,
518 #endif
519         &tegra_wdt_device,
520 #if defined(CONFIG_TEGRA_AVP)
521         &tegra_avp_device,
522 #endif
523         &tegra_camera,
524         &enterprise_bcm4329_rfkill_device,
525         &tegra_spi_device4,
526         &tegra_hda_device,
527 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
528         &tegra_se_device,
529 #endif
530 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
531         &tegra_aes_device,
532 #endif
533 };
534
535 #define MXT_CONFIG_CRC 0x62F903
536 /*
537  * Config converted from memory-mapped cfg-file with
538  * following version information:
539  *
540  *
541  *
542  *      FAMILY_ID=128
543  *      VARIANT=1
544  *      VERSION=32
545  *      BUILD=170
546  *      VENDOR_ID=255
547  *      PRODUCT_ID=TBD
548  *      CHECKSUM=0xC189B6
549  *
550  *
551  */
552
553 static const u8 config[] = {
554         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
555         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
556         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
557         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
558         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
559         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
560         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
561         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
562         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
563         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
564         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
565         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
566         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
567         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
568         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
569         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
570         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
571         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
572         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
573         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
574         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
575         0x00
576 };
577
578 static struct mxt_platform_data atmel_mxt_info = {
579         .x_line         = 19,
580         .y_line         = 11,
581         .x_size         = 960,
582         .y_size         = 540,
583         .blen           = 0x10,
584         .threshold      = 0x32,
585         .voltage        = 3300000,              /* 3.3V */
586         .orient         = 3,
587         .config         = config,
588         .config_length  = 168,
589         .config_crc     = MXT_CONFIG_CRC,
590         .irqflags       = IRQF_TRIGGER_FALLING,
591 /*      .read_chg       = &read_chg, */
592         .read_chg       = NULL,
593 };
594
595 static struct i2c_board_info __initdata atmel_i2c_info[] = {
596         {
597                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
598                 .platform_data = &atmel_mxt_info,
599         }
600 };
601
602 static int __init enterprise_touch_init(void)
603 {
604         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
605         gpio_direction_input(TEGRA_GPIO_PH6);
606
607         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
608         gpio_direction_output(TEGRA_GPIO_PF5, 0);
609         msleep(1);
610         gpio_set_value(TEGRA_GPIO_PF5, 1);
611         msleep(100);
612
613         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH6);
614         i2c_register_board_info(1, atmel_i2c_info, 1);
615
616         return 0;
617 }
618
619 static void enterprise_usb_hsic_postsupend(void)
620 {
621         pr_debug("%s\n", __func__);
622 #ifdef CONFIG_TEGRA_BB_XMM_POWER
623         baseband_xmm_set_power_status(BBXMM_PS_L2);
624 #endif
625 }
626
627 static void enterprise_usb_hsic_preresume(void)
628 {
629         pr_debug("%s\n", __func__);
630 #ifdef CONFIG_TEGRA_BB_XMM_POWER
631         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
632 #endif
633 }
634
635 static void enterprise_usb_hsic_phy_power(void)
636 {
637         pr_debug("%s\n", __func__);
638 #ifdef CONFIG_TEGRA_BB_XMM_POWER
639         baseband_xmm_set_power_status(BBXMM_PS_L0);
640 #endif
641 }
642
643 static void enterprise_usb_hsic_post_phy_off(void)
644 {
645         pr_debug("%s\n", __func__);
646 #ifdef CONFIG_TEGRA_BB_XMM_POWER
647         baseband_xmm_set_power_status(BBXMM_PS_L3);
648 #endif
649 }
650
651 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
652         .post_suspend = enterprise_usb_hsic_postsupend,
653         .pre_resume = enterprise_usb_hsic_preresume,
654         .port_power = enterprise_usb_hsic_phy_power,
655         .post_phy_off = enterprise_usb_hsic_post_phy_off,
656 };
657
658 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
659         .port_otg = false,
660         .has_hostpc = true,
661         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
662         .op_mode        = TEGRA_USB_OPMODE_HOST,
663         .u_data.host = {
664                 .vbus_gpio = -1,
665                 .hot_plug = false,
666                 .remote_wakeup_supported = false,
667                 .power_off_on_suspend = false,
668         },
669         .u_cfg.hsic = {
670                 .sync_start_delay = 9,
671                 .idle_wait_delay = 17,
672                 .term_range_adj = 0,
673                 .elastic_underrun_limit = 16,
674                 .elastic_overrun_limit = 16,
675         },
676         .ops = &hsic_xmm_plat_ops,
677 };
678
679
680
681 static struct tegra_usb_platform_data tegra_udc_pdata = {
682         .port_otg = true,
683         .has_hostpc = true,
684         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
685         .op_mode = TEGRA_USB_OPMODE_DEVICE,
686         .u_data.dev = {
687                 .vbus_pmu_irq = ENT_TPS80031_IRQ_BASE +
688                                 TPS80031_INT_VBUS_DET,
689                 .vbus_gpio = -1,
690                 .charging_supported = false,
691                 .remote_wakeup_supported = false,
692         },
693         .u_cfg.utmi = {
694                 .hssync_start_delay = 0,
695                 .elastic_limit = 16,
696                 .idle_wait_delay = 17,
697                 .term_range_adj = 6,
698                 .xcvr_setup = 8,
699                 .xcvr_lsfslew = 2,
700                 .xcvr_lsrslew = 2,
701                 .xcvr_setup_offset = 0,
702                 .xcvr_use_fuses = 1,
703         },
704 };
705
706 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
707         .port_otg = true,
708         .has_hostpc = true,
709         .builtin_host_disabled = true,
710         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
711         .op_mode = TEGRA_USB_OPMODE_HOST,
712         .u_data.host = {
713                 .vbus_gpio = -1,
714                 .vbus_reg = "usb_vbus",
715                 .hot_plug = true,
716                 .remote_wakeup_supported = true,
717                 .power_off_on_suspend = true,
718         },
719         .u_cfg.utmi = {
720                 .hssync_start_delay = 0,
721                 .elastic_limit = 16,
722                 .idle_wait_delay = 17,
723                 .term_range_adj = 6,
724                 .xcvr_setup = 15,
725                 .xcvr_lsfslew = 2,
726                 .xcvr_lsrslew = 2,
727                 .xcvr_setup_offset = 0,
728                 .xcvr_use_fuses = 1,
729         },
730 };
731
732 static struct tegra_usb_otg_data tegra_otg_pdata = {
733         .ehci_device = &tegra_ehci1_device,
734         .ehci_pdata = &tegra_ehci1_utmi_pdata,
735 };
736
737 struct platform_device *tegra_usb_hsic_host_register(void)
738 {
739         struct platform_device *pdev;
740         int val;
741
742         pdev = platform_device_alloc(tegra_ehci2_device.name,
743                 tegra_ehci2_device.id);
744         if (!pdev)
745                 return NULL;
746
747         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
748                 tegra_ehci2_device.num_resources);
749         if (val)
750                 goto error;
751
752         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
753         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
754
755         val = platform_device_add_data(pdev, &tegra_ehci2_hsic_xmm_pdata,
756                         sizeof(struct tegra_usb_platform_data));
757         if (val)
758                 goto error;
759
760         val = platform_device_add(pdev);
761         if (val)
762                 goto error;
763
764         return pdev;
765
766 error:
767         pr_err("%s: failed to add the host contoller device\n", __func__);
768         platform_device_put(pdev);
769         return NULL;
770 }
771
772 void tegra_usb_hsic_host_unregister(struct platform_device *pdev)
773 {
774         platform_device_unregister(pdev);
775 }
776
777 static void enterprise_usb_init(void)
778 {
779         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
780
781         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
782         platform_device_register(&tegra_otg_device);
783 }
784
785 static struct platform_device *enterprise_audio_devices[] __initdata = {
786         &tegra_ahub_device,
787         &tegra_dam_device0,
788         &tegra_dam_device1,
789         &tegra_dam_device2,
790         &tegra_i2s_device0,
791         &tegra_i2s_device1,
792         &tegra_i2s_device2,
793         &tegra_i2s_device3,
794         &tegra_spdif_device,
795         &spdif_dit_device,
796         &bluetooth_dit_device,
797         &baseband_dit_device,
798         &tegra_pcm_device,
799         &enterprise_audio_device,
800         &enterprise_audio_aic326x_device,
801 };
802
803 static void enterprise_audio_init(void)
804 {
805         struct board_info board_info;
806
807         tegra_get_board_info(&board_info);
808
809         if (board_info.board_id == BOARD_E1197)
810                 enterprise_audio_pdata.audio_port_id[HIFI_CODEC] = 1;
811
812         platform_add_devices(enterprise_audio_devices,
813                         ARRAY_SIZE(enterprise_audio_devices));
814 }
815
816
817 static struct baseband_power_platform_data tegra_baseband_power_data = {
818         .baseband_type = BASEBAND_XMM,
819         .modem = {
820                 .xmm = {
821                         .bb_rst = XMM_GPIO_BB_RST,
822                         .bb_on = XMM_GPIO_BB_ON,
823                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
824                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
825                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
826                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
827                 },
828         },
829 };
830
831 static struct platform_device tegra_baseband_power_device = {
832         .name = "baseband_xmm_power",
833         .id = -1,
834         .dev = {
835                 .platform_data = &tegra_baseband_power_data,
836         },
837 };
838
839 static struct platform_device tegra_baseband_power2_device = {
840         .name = "baseband_xmm_power2",
841         .id = -1,
842         .dev = {
843                 .platform_data = &tegra_baseband_power_data,
844         },
845 };
846
847 #ifdef CONFIG_TEGRA_BB_M7400
848 static union tegra_bb_gpio_id m7400_gpio_id = {
849         .m7400 = {
850                 .pwr_status = GPIO_BB_RESET,
851                 .pwr_on = GPIO_BB_PWRON,
852                 .uart_awr = GPIO_BB_APACK,
853                 .uart_cwr = GPIO_BB_CPACK,
854                 .usb_awr = GPIO_BB_APACK2,
855                 .usb_cwr = GPIO_BB_CPACK2,
856                 .service = GPIO_BB_RSVD2,
857                 .resout2 = GPIO_BB_RSVD1,
858         },
859 };
860
861 static struct tegra_bb_pdata m7400_pdata = {
862         .id = &m7400_gpio_id,
863         .device = &tegra_ehci2_device,
864         .ehci_register = tegra_usb_hsic_host_register,
865         .ehci_unregister = tegra_usb_hsic_host_unregister,
866         .bb_id = TEGRA_BB_M7400,
867 };
868
869 static struct platform_device tegra_baseband_m7400_device = {
870         .name = "tegra_baseband_power",
871         .id = -1,
872         .dev = {
873                 .platform_data = &m7400_pdata,
874         },
875 };
876 #endif
877
878 static void enterprise_baseband_init(void)
879 {
880         int modem_id = tegra_get_modem_id();
881
882         switch (modem_id) {
883         case TEGRA_BB_PH450: /* PH450 ULPI */
884                 enterprise_modem_init();
885                 break;
886         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
887                 /* baseband-power.ko will register ehci2 device */
888                 tegra_ehci2_device.dev.platform_data =
889                                         &tegra_ehci2_hsic_xmm_pdata;
890                 tegra_baseband_power_data.hsic_register =
891                                                 &tegra_usb_hsic_host_register;
892                 tegra_baseband_power_data.hsic_unregister =
893                                                 &tegra_usb_hsic_host_unregister;
894
895                 platform_device_register(&tegra_baseband_power_device);
896                 platform_device_register(&tegra_baseband_power2_device);
897                 break;
898 #ifdef CONFIG_TEGRA_BB_M7400
899         case TEGRA_BB_M7400: /* M7400 HSIC */
900                 tegra_ehci2_hsic_xmm_pdata.u_data.host.power_off_on_suspend = 0;
901                 tegra_ehci2_device.dev.platform_data
902                         = &tegra_ehci2_hsic_xmm_pdata;
903                 platform_device_register(&tegra_baseband_m7400_device);
904                 break;
905 #endif
906         }
907 }
908
909 static void __init tegra_enterprise_init(void)
910 {
911         tegra_thermal_init(&thermal_data);
912         tegra_clk_init_from_table(enterprise_clk_init_table);
913         tegra_enable_pinmux();
914         enterprise_pinmux_init();
915         enterprise_i2c_init();
916         enterprise_uart_init();
917         enterprise_usb_init();
918         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
919         tegra_ram_console_debug_init();
920         enterprise_regulator_init();
921         enterprise_sdhci_init();
922 #ifdef CONFIG_TEGRA_EDP_LIMITS
923         enterprise_edp_init();
924 #endif
925         enterprise_kbc_init();
926         enterprise_touch_init();
927         enterprise_audio_init();
928         enterprise_baseband_init();
929         enterprise_panel_init();
930         enterprise_setup_bluesleep();
931         enterprise_emc_init();
932         enterprise_sensors_init();
933         enterprise_suspend_init();
934         enterprise_bpc_mgmt_init();
935         tegra_release_bootloader_fb();
936 }
937
938 static void __init tegra_enterprise_reserve(void)
939 {
940 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
941         tegra_reserve(0, SZ_4M, SZ_8M);
942 #else
943         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
944 #endif
945         tegra_ram_console_debug_reserve(SZ_1M);
946 }
947
948 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
949         .atag_offset    = 0x100,
950         .map_io         = tegra_map_common_io,
951         .reserve        = tegra_enterprise_reserve,
952         .init_early     = tegra30_init_early,
953         .init_irq       = tegra_init_irq,
954         .handle_irq     = gic_handle_irq,
955         .timer          = &tegra_timer,
956         .init_machine   = tegra_enterprise_init,
957         .restart        = tegra_assert_system_reset,
958 MACHINE_END