arm: tegra: move ram console to common codes
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/memblock.h>
40
41 #include <linux/nfc/pn544.h>
42 #include <sound/max98088.h>
43
44 #include <mach/clk.h>
45 #include <mach/iomap.h>
46 #include <mach/irqs.h>
47 #include <mach/pinmux.h>
48 #include <mach/iomap.h>
49 #include <mach/io.h>
50 #include <asm/mach-types.h>
51 #include <asm/mach/arch.h>
52 #include <mach/usb_phy.h>
53 #include <mach/i2s.h>
54 #include <mach/tegra_max98088_pdata.h>
55 #include <mach/thermal.h>
56 #include <mach/tegra-bb-power.h>
57 #include "board.h"
58 #include "clock.h"
59 #include "board-enterprise.h"
60 #include "baseband-xmm-power.h"
61 #include "devices.h"
62 #include "gpio-names.h"
63 #include "fuse.h"
64 #include "pm.h"
65
66 /* All units are in millicelsius */
67 static struct tegra_thermal_data thermal_data = {
68         .temp_throttle = 85000,
69         .temp_shutdown = 90000,
70         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
71 #ifdef CONFIG_TEGRA_EDP_LIMITS
72         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
73         .hysteresis_edp = 3000,
74 #endif
75 #ifdef CONFIG_TEGRA_THERMAL_SYSFS
76         .tc1 = 0,
77         .tc2 = 1,
78         .passive_delay = 2000,
79 #else
80         .hysteresis_throttle = 1000,
81 #endif
82 };
83
84 /* !!!TODO: Change for enterprise (Taken from Cardhu) */
85 static struct tegra_utmip_config utmi_phy_config[] = {
86         [0] = {
87                         .hssync_start_delay = 0,
88                         .idle_wait_delay = 17,
89                         .elastic_limit = 16,
90                         .term_range_adj = 6,
91                         .xcvr_setup = 15,
92                         .xcvr_setup_offset = 0,
93                         .xcvr_use_fuses = 1,
94                         .xcvr_lsfslew = 2,
95                         .xcvr_lsrslew = 2,
96         },
97         [1] = {
98                         .hssync_start_delay = 0,
99                         .idle_wait_delay = 17,
100                         .elastic_limit = 16,
101                         .term_range_adj = 6,
102                         .xcvr_setup = 15,
103                         .xcvr_setup_offset = 0,
104                         .xcvr_use_fuses = 1,
105                         .xcvr_lsfslew = 2,
106                         .xcvr_lsrslew = 2,
107         },
108         [2] = {
109                         .hssync_start_delay = 0,
110                         .idle_wait_delay = 17,
111                         .elastic_limit = 16,
112                         .term_range_adj = 6,
113                         .xcvr_setup = 8,
114                         .xcvr_setup_offset = 0,
115                         .xcvr_use_fuses = 1,
116                         .xcvr_lsfslew = 2,
117                         .xcvr_lsrslew = 2,
118         },
119 };
120
121 static struct resource enterprise_bcm4329_rfkill_resources[] = {
122         {
123                 .name   = "bcm4329_nshutdown_gpio",
124                 .start  = TEGRA_GPIO_PE6,
125                 .end    = TEGRA_GPIO_PE6,
126                 .flags  = IORESOURCE_IO,
127         },
128 };
129
130 static struct platform_device enterprise_bcm4329_rfkill_device = {
131         .name = "bcm4329_rfkill",
132         .id             = -1,
133         .num_resources  = ARRAY_SIZE(enterprise_bcm4329_rfkill_resources),
134         .resource       = enterprise_bcm4329_rfkill_resources,
135 };
136
137 static struct resource enterprise_bluesleep_resources[] = {
138         [0] = {
139                 .name = "gpio_host_wake",
140                         .start  = TEGRA_GPIO_PS2,
141                         .end    = TEGRA_GPIO_PS2,
142                         .flags  = IORESOURCE_IO,
143         },
144         [1] = {
145                 .name = "gpio_ext_wake",
146                         .start  = TEGRA_GPIO_PE7,
147                         .end    = TEGRA_GPIO_PE7,
148                         .flags  = IORESOURCE_IO,
149         },
150         [2] = {
151                 .name = "host_wake",
152                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
153                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
154                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
155         },
156 };
157
158 static struct platform_device enterprise_bluesleep_device = {
159         .name           = "bluesleep",
160         .id             = -1,
161         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
162         .resource       = enterprise_bluesleep_resources,
163 };
164
165 static void __init enterprise_setup_bluesleep(void)
166 {
167         platform_device_register(&enterprise_bluesleep_device);
168         tegra_gpio_enable(TEGRA_GPIO_PS2);
169         tegra_gpio_enable(TEGRA_GPIO_PE7);
170         return;
171 }
172
173 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
174         /* name         parent          rate            enabled */
175         { "pll_m",      NULL,           0,              false},
176         { "hda",        "pll_p",        108000000,      false},
177         { "hda2codec_2x","pll_p",       48000000,       false},
178         { "pwm",        "clk_32k",      32768,          false},
179         { "blink",      "clk_32k",      32768,          true},
180         { "i2s0",       "pll_a_out0",   0,              false},
181         { "i2s1",       "pll_a_out0",   0,              false},
182         { "i2s2",       "pll_a_out0",   0,              false},
183         { "i2s3",       "pll_a_out0",   0,              false},
184         { "spdif_out",  "pll_a_out0",   0,              false},
185         { "d_audio",    "clk_m",        12000000,       false},
186         { "dam0",       "clk_m",        12000000,       false},
187         { "dam1",       "clk_m",        12000000,       false},
188         { "dam2",       "clk_m",        12000000,       false},
189         { "audio0",     "i2s0_sync",    0,              false},
190         { "audio1",     "i2s1_sync",    0,              false},
191         { "audio2",     "i2s2_sync",    0,              false},
192         { "audio3",     "i2s3_sync",    0,              false},
193         { "vi",         "pll_p",        0,              false},
194         { "vi_sensor",  "pll_p",        0,              false},
195         { NULL,         NULL,           0,              0},
196 };
197
198 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
199         .adapter_nr     = 0,
200         .bus_count      = 1,
201         .bus_clk_rate   = { 100000, 0 },
202         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
203         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
204         .arb_recovery = arb_lost_recovery,
205 };
206
207 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
208         .adapter_nr     = 1,
209         .bus_count      = 1,
210         .bus_clk_rate   = { 100000, 0 },
211         .is_clkon_always = true,
212         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
213         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
214         .arb_recovery = arb_lost_recovery,
215 };
216
217 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
218         .adapter_nr     = 2,
219         .bus_count      = 1,
220         .bus_clk_rate   = { 271000, 0 },
221         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
222         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
223         .arb_recovery = arb_lost_recovery,
224 };
225
226 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
227         .adapter_nr     = 3,
228         .bus_count      = 1,
229         .bus_clk_rate   = { 100000, 0 },
230         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
231         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
232         .arb_recovery = arb_lost_recovery,
233 };
234
235 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
236         .adapter_nr     = 4,
237         .bus_count      = 1,
238         .bus_clk_rate   = { 100000, 0 },
239         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
240         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
241         .arb_recovery = arb_lost_recovery,
242 };
243
244 /* Equalizer filter coefs generated from the MAXIM MAX98088
245  * evkit software tool */
246 static struct max98088_eq_cfg max98088_eq_cfg[] = {
247         {
248                 .name = "FLAT",
249                 .rate = 44100,
250                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
251                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
252                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
253                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
254                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
255         },
256         {
257                 .name = "LOWPASS1K",
258                 .rate = 44100,
259                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
260                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
261                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
262                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
263                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
264         },
265         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
266                 .name = "HIBOOST",
267                 .rate = 44100,
268                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
269                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
270                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
271                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
272                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
273         },
274         { /* BASS=12dB, TREBLE=+12dB */
275                 .name = "LOUD12DB",
276                 .rate = 44100,
277                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
278                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
279                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
280                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
281                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
282         },
283         {
284                 .name = "FLAT",
285                 .rate = 16000,
286                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
287                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
288                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
289                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
290                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
291         },
292         {
293                 .name = "LOWPASS1K",
294                 .rate = 16000,
295                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
296                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
297                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
298                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
299                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
300         },
301         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
302                 .name = "HIBOOST",
303                 .rate = 16000,
304                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
305                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
306                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
307                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
308                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
309         },
310         { /* BASS=12dB, TREBLE=+12dB */
311                 .name = "LOUD12DB",
312                 .rate = 16000,
313                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
314                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
315                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
316                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
317                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
318         },
319 };
320
321
322 static struct max98088_pdata enterprise_max98088_pdata = {
323         /* equalizer configuration */
324         .eq_cfg = max98088_eq_cfg,
325         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
326
327         /* debounce time */
328         .debounce_time_ms = 200,
329
330         /* microphone configuration */
331         .digmic_left_mode = 1,
332         .digmic_right_mode = 1,
333
334         /* receiver output configuration */
335         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
336 };
337
338 static struct pn544_i2c_platform_data nfc_pdata = {
339                 .irq_gpio = TEGRA_GPIO_PS4,
340                 .ven_gpio = TEGRA_GPIO_PM6,
341                 .firm_gpio = 0,
342 };
343
344
345 static struct i2c_board_info __initdata max98088_board_info = {
346         I2C_BOARD_INFO("max98088", 0x10),
347         .platform_data = &enterprise_max98088_pdata,
348         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
349 };
350
351 static struct i2c_board_info __initdata nfc_board_info = {
352         I2C_BOARD_INFO("pn544", 0x28),
353         .platform_data = &nfc_pdata,
354         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS4),
355 };
356
357 static void enterprise_i2c_init(void)
358 {
359         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
360         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
361         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
362         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
363         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
364
365         platform_device_register(&tegra_i2c_device5);
366         platform_device_register(&tegra_i2c_device4);
367         platform_device_register(&tegra_i2c_device3);
368         platform_device_register(&tegra_i2c_device2);
369         platform_device_register(&tegra_i2c_device1);
370
371         i2c_register_board_info(0, &max98088_board_info, 1);
372         i2c_register_board_info(0, &nfc_board_info, 1);
373 }
374
375 static struct platform_device *enterprise_uart_devices[] __initdata = {
376         &tegra_uarta_device,
377         &tegra_uartb_device,
378         &tegra_uartc_device,
379         &tegra_uartd_device,
380         &tegra_uarte_device,
381 };
382
383 static struct uart_clk_parent uart_parent_clk[] = {
384         [0] = {.name = "clk_m"},
385         [1] = {.name = "pll_p"},
386 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
387         [2] = {.name = "pll_m"},
388 #endif
389 };
390 static struct tegra_uart_platform_data enterprise_uart_pdata;
391 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
392
393 static void __init uart_debug_init(void)
394 {
395         unsigned long rate;
396         struct clk *c;
397
398         /* UARTD is the debug port. */
399         pr_info("Selecting UARTD as the debug console\n");
400         enterprise_uart_devices[3] = &debug_uartd_device;
401         debug_uart_port_base = ((struct plat_serial8250_port *)(
402                         debug_uartd_device.dev.platform_data))->mapbase;
403         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
404
405         /* Clock enable for the debug channel */
406         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
407                 rate = ((struct plat_serial8250_port *)(
408                         debug_uartd_device.dev.platform_data))->uartclk;
409                 pr_info("The debug console clock name is %s\n",
410                                                 debug_uart_clk->name);
411                 c = tegra_get_clock_by_name("pll_p");
412                 if (IS_ERR_OR_NULL(c))
413                         pr_err("Not getting the parent clock pll_p\n");
414                 else
415                         clk_set_parent(debug_uart_clk, c);
416
417                 clk_enable(debug_uart_clk);
418                 clk_set_rate(debug_uart_clk, rate);
419         } else {
420                 pr_err("Not getting the clock %s for debug console\n",
421                                 debug_uart_clk->name);
422         }
423 }
424
425 static void __init enterprise_uart_init(void)
426 {
427         int i;
428         struct clk *c;
429
430         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
431                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
432                 if (IS_ERR_OR_NULL(c)) {
433                         pr_err("Not able to get the clock for %s\n",
434                                                 uart_parent_clk[i].name);
435                         continue;
436                 }
437                 uart_parent_clk[i].parent_clk = c;
438                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
439         }
440         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
441         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
442         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
443         enterprise_loopback_uart_pdata.parent_clk_count =
444                                                 ARRAY_SIZE(uart_parent_clk);
445         enterprise_loopback_uart_pdata.is_loopback = true;
446         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
447         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
448         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
449         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
450         /* UARTE is used for loopback test purpose */
451         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
452
453         /* Register low speed only if it is selected */
454         if (!is_tegra_debug_uartport_hs())
455                 uart_debug_init();
456
457         platform_add_devices(enterprise_uart_devices,
458                                 ARRAY_SIZE(enterprise_uart_devices));
459 }
460
461
462
463 static struct resource tegra_rtc_resources[] = {
464         [0] = {
465                 .start = TEGRA_RTC_BASE,
466                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
467                 .flags = IORESOURCE_MEM,
468         },
469         [1] = {
470                 .start = INT_RTC,
471                 .end = INT_RTC,
472                 .flags = IORESOURCE_IRQ,
473         },
474 };
475
476 static struct platform_device tegra_rtc_device = {
477         .name = "tegra_rtc",
478         .id   = -1,
479         .resource = tegra_rtc_resources,
480         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
481 };
482
483 static struct platform_device tegra_camera = {
484         .name = "tegra_camera",
485         .id = -1,
486 };
487
488 static struct tegra_max98088_platform_data enterprise_audio_pdata = {
489         .gpio_spkr_en           = -1,
490         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
491         .gpio_hp_mute           = -1,
492         .gpio_int_mic_en        = -1,
493         .gpio_ext_mic_en        = -1,
494         .audio_port_id          = {
495                 [HIFI_CODEC] = 0,
496                 [BASEBAND] = 2,
497                 [BT_SCO] = 3,
498         },
499         .baseband_param         = {
500                 .rate = 8000,
501                 .channels = 1,
502         },
503 };
504
505 static struct platform_device enterprise_audio_device = {
506         .name   = "tegra-snd-max98088",
507         .id     = 0,
508         .dev    = {
509                 .platform_data  = &enterprise_audio_pdata,
510         },
511 };
512
513 static struct platform_device *enterprise_devices[] __initdata = {
514         &tegra_pmu_device,
515         &tegra_rtc_device,
516         &tegra_udc_device,
517 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
518         &tegra_smmu_device,
519 #endif
520         &tegra_wdt_device,
521 #if defined(CONFIG_TEGRA_AVP)
522         &tegra_avp_device,
523 #endif
524         &tegra_camera,
525         &enterprise_bcm4329_rfkill_device,
526         &tegra_spi_device4,
527         &tegra_hda_device,
528 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
529         &tegra_se_device,
530 #endif
531 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
532         &tegra_aes_device,
533 #endif
534 };
535
536 #define MXT_CONFIG_CRC 0x62F903
537 /*
538  * Config converted from memory-mapped cfg-file with
539  * following version information:
540  *
541  *
542  *
543  *      FAMILY_ID=128
544  *      VARIANT=1
545  *      VERSION=32
546  *      BUILD=170
547  *      VENDOR_ID=255
548  *      PRODUCT_ID=TBD
549  *      CHECKSUM=0xC189B6
550  *
551  *
552  */
553
554 static const u8 config[] = {
555         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
556         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
557         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
558         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
559         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
560         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
561         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
562         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
563         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
564         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
565         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
566         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
567         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
568         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
569         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
570         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
571         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
572         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
573         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
574         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
575         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
576         0x00
577 };
578
579 static struct mxt_platform_data atmel_mxt_info = {
580         .x_line         = 19,
581         .y_line         = 11,
582         .x_size         = 960,
583         .y_size         = 540,
584         .blen           = 0x10,
585         .threshold      = 0x32,
586         .voltage        = 3300000,              /* 3.3V */
587         .orient         = 3,
588         .config         = config,
589         .config_length  = 168,
590         .config_crc     = MXT_CONFIG_CRC,
591         .irqflags       = IRQF_TRIGGER_FALLING,
592 /*      .read_chg       = &read_chg, */
593         .read_chg       = NULL,
594 };
595
596 static struct i2c_board_info __initdata atmel_i2c_info[] = {
597         {
598                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
599                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH6),
600                 .platform_data = &atmel_mxt_info,
601         }
602 };
603
604 static int __init enterprise_touch_init(void)
605 {
606         tegra_gpio_enable(TEGRA_GPIO_PH6);
607         tegra_gpio_enable(TEGRA_GPIO_PF5);
608
609         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
610         gpio_direction_input(TEGRA_GPIO_PH6);
611
612         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
613         gpio_direction_output(TEGRA_GPIO_PF5, 0);
614         msleep(1);
615         gpio_set_value(TEGRA_GPIO_PF5, 1);
616         msleep(100);
617
618         i2c_register_board_info(1, atmel_i2c_info, 1);
619
620         return 0;
621 }
622
623 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
624         [0] = {
625                         .instance = 0,
626                         .vbus_gpio = -1,
627                         .vbus_reg_supply = "usb_vbus",
628                         .vbus_irq = ENT_TPS80031_IRQ_BASE +
629                                                         TPS80031_INT_VBUS_DET,
630         },
631         [1] = {
632                         .instance = 1,
633                         .vbus_gpio = -1,
634         },
635         [2] = {
636                         .instance = 2,
637                         .vbus_gpio = -1,
638         },
639 };
640
641 static struct tegra_uhsic_config uhsic_phy_config = {
642         .enable_gpio = -1,
643         .reset_gpio = -1,
644         .sync_start_delay = 9,
645         .idle_wait_delay = 17,
646         .term_range_adj = 0,
647         .elastic_underrun_limit = 16,
648         .elastic_overrun_limit = 16,
649 };
650
651 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
652         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
653         .phy_config = &uhsic_phy_config,
654         .operating_mode = TEGRA_USB_HOST,
655         .power_down_on_bus_suspend = 1,
656 };
657
658 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
659         [0] = {
660                         .phy_config = &utmi_phy_config[0],
661                         .operating_mode = TEGRA_USB_HOST,
662                         .power_down_on_bus_suspend = 1,
663                         .default_enable = false,
664         },
665         [1] = {
666                         .phy_config = &utmi_phy_config[1],
667                         .operating_mode = TEGRA_USB_HOST,
668                         .power_down_on_bus_suspend = 1,
669                         .default_enable = false,
670         },
671         [2] = {
672                         .phy_config = &utmi_phy_config[2],
673                         .operating_mode = TEGRA_USB_HOST,
674                         .power_down_on_bus_suspend = 1,
675                         .default_enable = false,
676         },
677 };
678
679 static struct tegra_otg_platform_data tegra_otg_pdata = {
680         .ehci_device = &tegra_ehci1_device,
681         .ehci_pdata = &tegra_ehci_pdata[0],
682 };
683
684 struct platform_device *tegra_usb_hsic_host_register(void)
685 {
686         struct platform_device *pdev;
687         void *platform_data;
688         int val;
689
690         pdev = platform_device_alloc(tegra_ehci2_device.name,
691                 tegra_ehci2_device.id);
692         if (!pdev)
693                 return NULL;
694
695         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
696                 tegra_ehci2_device.num_resources);
697         if (val)
698                 goto error;
699
700         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
701         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
702
703         platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
704                 GFP_KERNEL);
705         if (!platform_data)
706                 goto error;
707
708         memcpy(platform_data, &tegra_ehci_uhsic_pdata,
709                                 sizeof(struct tegra_ehci_platform_data));
710         pdev->dev.platform_data = platform_data;
711
712         val = platform_device_add(pdev);
713         if (val)
714                 goto error_add;
715
716         return pdev;
717
718 error_add:
719         kfree(platform_data);
720 error:
721         pr_err("%s: failed to add the host contoller device\n", __func__);
722         platform_device_put(pdev);
723         return NULL;
724 }
725
726 void tegra_usb_hsic_host_unregister(struct platform_device *pdev)
727 {
728         platform_device_unregister(pdev);
729 }
730
731 static int enterprise_usb_hsic_postsupend(void)
732 {
733         pr_debug("%s\n", __func__);
734 #ifdef CONFIG_TEGRA_BB_XMM_POWER
735         baseband_xmm_set_power_status(BBXMM_PS_L2);
736 #endif
737         return 0;
738 }
739
740 static int enterprise_usb_hsic_preresume(void)
741 {
742         pr_debug("%s\n", __func__);
743 #ifdef CONFIG_TEGRA_BB_XMM_POWER
744         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
745 #endif
746         return 0;
747 }
748
749 static int enterprise_usb_hsic_phy_ready(void)
750 {
751         pr_debug("%s\n", __func__);
752 #ifdef CONFIG_TEGRA_BB_XMM_POWER
753         baseband_xmm_set_power_status(BBXMM_PS_L0);
754 #endif
755         return 0;
756 }
757
758 static int enterprise_usb_hsic_phy_off(void)
759 {
760         pr_debug("%s\n", __func__);
761 #ifdef CONFIG_TEGRA_BB_XMM_POWER
762         baseband_xmm_set_power_status(BBXMM_PS_L3);
763 #endif
764         return 0;
765 }
766
767 static void enterprise_usb_init(void)
768 {
769         struct  fsl_usb2_platform_data *udc_pdata;
770
771         tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
772
773         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
774         platform_device_register(&tegra_otg_device);
775
776         udc_pdata = tegra_udc_device.dev.platform_data;
777 }
778
779 static struct platform_device *enterprise_audio_devices[] __initdata = {
780         &tegra_ahub_device,
781         &tegra_dam_device0,
782         &tegra_dam_device1,
783         &tegra_dam_device2,
784         &tegra_i2s_device2,
785         &tegra_i2s_device3,
786         &tegra_spdif_device,
787         &spdif_dit_device,
788         &bluetooth_dit_device,
789         &baseband_dit_device,
790         &tegra_pcm_device,
791         &enterprise_audio_device,
792 };
793
794 static void enterprise_audio_init(void)
795 {
796         struct board_info board_info;
797
798         tegra_get_board_info(&board_info);
799         if (board_info.board_id == BOARD_E1197) {
800                 platform_device_register(&tegra_i2s_device1);
801                 enterprise_audio_pdata.audio_port_id[HIFI_CODEC] = 1;
802         } else
803                 platform_device_register(&tegra_i2s_device0);
804
805         platform_add_devices(enterprise_audio_devices,
806                         ARRAY_SIZE(enterprise_audio_devices));
807 }
808
809 static void enterprise_gps_init(void)
810 {
811         tegra_gpio_enable(TEGRA_GPIO_PE4);
812         tegra_gpio_enable(TEGRA_GPIO_PE5);
813 }
814
815 static struct baseband_power_platform_data tegra_baseband_power_data = {
816         .baseband_type = BASEBAND_XMM,
817         .modem = {
818                 .xmm = {
819                         .bb_rst = XMM_GPIO_BB_RST,
820                         .bb_on = XMM_GPIO_BB_ON,
821                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
822                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
823                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
824                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
825                 },
826         },
827 };
828
829 static struct platform_device tegra_baseband_power_device = {
830         .name = "baseband_xmm_power",
831         .id = -1,
832         .dev = {
833                 .platform_data = &tegra_baseband_power_data,
834         },
835 };
836
837 static struct platform_device tegra_baseband_power2_device = {
838         .name = "baseband_xmm_power2",
839         .id = -1,
840         .dev = {
841                 .platform_data = &tegra_baseband_power_data,
842         },
843 };
844
845 #ifdef CONFIG_TEGRA_BB_M7400
846 static union tegra_bb_gpio_id m7400_gpio_id = {
847         .m7400 = {
848                 .pwr_status = GPIO_BB_RESET,
849                 .pwr_on = GPIO_BB_PWRON,
850                 .uart_awr = GPIO_BB_APACK,
851                 .uart_cwr = GPIO_BB_CPACK,
852                 .usb_awr = GPIO_BB_APACK2,
853                 .usb_cwr = GPIO_BB_CPACK2,
854                 .service = GPIO_BB_RSVD2,
855                 .resout2 = GPIO_BB_RSVD1,
856         },
857 };
858
859 static struct tegra_bb_pdata m7400_pdata = {
860         .id = &m7400_gpio_id,
861         .device = &tegra_ehci2_device,
862         .ehci_register = tegra_usb_hsic_host_register,
863         .ehci_unregister = tegra_usb_hsic_host_unregister,
864         .bb_id = TEGRA_BB_M7400,
865 };
866
867 static struct platform_device tegra_baseband_m7400_device = {
868         .name = "tegra_baseband_power",
869         .id = -1,
870         .dev = {
871                 .platform_data = &m7400_pdata,
872         },
873 };
874 #endif
875
876 static void enterprise_baseband_init(void)
877 {
878         int modem_id = tegra_get_modem_id();
879
880         switch (modem_id) {
881         case TEGRA_BB_PH450: /* PH450 ULPI */
882                 enterprise_modem_init();
883                 break;
884         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
885                 /* xmm baseband - do not switch off phy during suspend */
886                 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
887                 uhsic_phy_config.postsuspend = enterprise_usb_hsic_postsupend;
888                 uhsic_phy_config.preresume = enterprise_usb_hsic_preresume;
889                 uhsic_phy_config.usb_phy_ready = enterprise_usb_hsic_phy_ready;
890                 uhsic_phy_config.post_phy_off = enterprise_usb_hsic_phy_off;
891                 /* enable XMM6260 baseband gpio(s) */
892                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
893                         .mdm_reset);
894                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
895                         .mdm_on);
896                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
897                         .ap2mdm_ack);
898                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
899                         .mdm2ap_ack);
900                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
901                         .ap2mdm_ack2);
902                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
903                         .mdm2ap_ack2);
904                 tegra_baseband_power_data.hsic_register =
905                                                 &tegra_usb_hsic_host_register;
906                 tegra_baseband_power_data.hsic_unregister =
907                                                 &tegra_usb_hsic_host_unregister;
908                 platform_device_register(&tegra_baseband_power_device);
909                 platform_device_register(&tegra_baseband_power2_device);
910                 break;
911 #ifdef CONFIG_TEGRA_BB_M7400
912         case TEGRA_BB_M7400: /* M7400 HSIC */
913                 tegra_ehci2_device.dev.platform_data
914                         = &tegra_ehci_uhsic_pdata;
915                 platform_device_register(&tegra_baseband_m7400_device);
916                 break;
917 #endif
918         }
919 }
920
921 static void enterprise_nfc_init(void)
922 {
923         tegra_gpio_enable(TEGRA_GPIO_PS4);
924         tegra_gpio_enable(TEGRA_GPIO_PM6);
925 }
926
927 static void __init tegra_enterprise_init(void)
928 {
929         tegra_thermal_init(&thermal_data);
930         tegra_clk_init_from_table(enterprise_clk_init_table);
931         enterprise_pinmux_init();
932         enterprise_i2c_init();
933         enterprise_uart_init();
934         enterprise_usb_init();
935         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
936         tegra_ram_console_debug_init();
937         enterprise_regulator_init();
938         enterprise_sdhci_init();
939 #ifdef CONFIG_TEGRA_EDP_LIMITS
940         enterprise_edp_init();
941 #endif
942         enterprise_kbc_init();
943         enterprise_touch_init();
944         enterprise_audio_init();
945         enterprise_gps_init();
946         enterprise_baseband_init();
947         enterprise_panel_init();
948         enterprise_setup_bluesleep();
949         enterprise_emc_init();
950         enterprise_sensors_init();
951         enterprise_suspend_init();
952         enterprise_bpc_mgmt_init();
953         tegra_release_bootloader_fb();
954         enterprise_nfc_init();
955 }
956
957 static void __init tegra_enterprise_ramconsole_reserve(unsigned long size)
958 {
959         struct resource *res;
960         long ret;
961
962         tegra_ram_console_debug_reserve(SZ_1M);
963 }
964
965 static void __init tegra_enterprise_reserve(void)
966 {
967 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
968         tegra_reserve(0, SZ_4M, SZ_8M);
969 #else
970         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
971 #endif
972         tegra_enterprise_ramconsole_reserve(SZ_1M);
973 }
974
975 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
976         .boot_params    = 0x80000100,
977         .map_io         = tegra_map_common_io,
978         .reserve        = tegra_enterprise_reserve,
979         .init_early     = tegra_init_early,
980         .init_irq       = tegra_init_irq,
981         .timer          = &tegra_timer,
982         .init_machine   = tegra_enterprise_init,
983 MACHINE_END