ARM: tegra: uarte: Enable loopback
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39
40 #include <linux/nfc/pn544.h>
41 #include <sound/max98088.h>
42
43 #include <mach/clk.h>
44 #include <mach/iomap.h>
45 #include <mach/irqs.h>
46 #include <mach/pinmux.h>
47 #include <mach/iomap.h>
48 #include <mach/io.h>
49 #include <asm/mach-types.h>
50 #include <asm/mach/arch.h>
51 #include <mach/usb_phy.h>
52 #include <mach/i2s.h>
53 #include <mach/tegra_max98088_pdata.h>
54 #include <mach/thermal.h>
55
56 #include "board.h"
57 #include "clock.h"
58 #include "board-enterprise.h"
59 #include "devices.h"
60 #include "gpio-names.h"
61 #include "fuse.h"
62 #include "pm.h"
63
64 /* All units are in millicelsius */
65 static struct tegra_thermal_data thermal_data = {
66         .temp_throttle = 85000,
67         .temp_shutdown = 90000,
68         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
69 #ifdef CONFIG_TEGRA_EDP_LIMITS
70         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
71         .hysteresis_edp = 3000,
72 #endif
73 #ifdef CONFIG_TEGRA_THERMAL_SYSFS
74         .tc1 = 0,
75         .tc2 = 1,
76         .passive_delay = 2000,
77 #else
78         .hysteresis_throttle = 1000,
79 #endif
80 };
81
82 /* !!!TODO: Change for enterprise (Taken from Cardhu) */
83 static struct tegra_utmip_config utmi_phy_config[] = {
84         [0] = {
85                         .hssync_start_delay = 0,
86                         .idle_wait_delay = 17,
87                         .elastic_limit = 16,
88                         .term_range_adj = 6,
89                         .xcvr_setup = 15,
90                         .xcvr_setup_offset = 0,
91                         .xcvr_use_fuses = 1,
92                         .xcvr_lsfslew = 2,
93                         .xcvr_lsrslew = 2,
94         },
95         [1] = {
96                         .hssync_start_delay = 0,
97                         .idle_wait_delay = 17,
98                         .elastic_limit = 16,
99                         .term_range_adj = 6,
100                         .xcvr_setup = 15,
101                         .xcvr_setup_offset = 0,
102                         .xcvr_use_fuses = 1,
103                         .xcvr_lsfslew = 2,
104                         .xcvr_lsrslew = 2,
105         },
106         [2] = {
107                         .hssync_start_delay = 0,
108                         .idle_wait_delay = 17,
109                         .elastic_limit = 16,
110                         .term_range_adj = 6,
111                         .xcvr_setup = 8,
112                         .xcvr_setup_offset = 0,
113                         .xcvr_use_fuses = 1,
114                         .xcvr_lsfslew = 2,
115                         .xcvr_lsrslew = 2,
116         },
117 };
118
119 #ifdef CONFIG_BCM4329_RFKILL
120 static struct resource enterprise_bcm4329_rfkill_resources[] = {
121         {
122                 .name   = "bcm4329_nshutdown_gpio",
123                 .start  = TEGRA_GPIO_PE6,
124                 .end    = TEGRA_GPIO_PE6,
125                 .flags  = IORESOURCE_IO,
126         },
127 };
128
129 static struct platform_device enterprise_bcm4329_rfkill_device = {
130         .name = "bcm4329_rfkill",
131         .id             = -1,
132         .num_resources  = ARRAY_SIZE(enterprise_bcm4329_rfkill_resources),
133         .resource       = enterprise_bcm4329_rfkill_resources,
134 };
135
136 static noinline void __init enterprise_bt_rfkill(void)
137 {
138         platform_device_register(&enterprise_bcm4329_rfkill_device);
139
140         return;
141 }
142 #else
143 static inline void enterprise_bt_rfkill(void) { }
144 #endif
145
146 static void __init enterprise_setup_bluesleep(void)
147 {
148         struct platform_device *pdev = NULL;
149         struct resource *res;
150
151         pdev = platform_device_alloc("bluesleep", 0);
152         if (!pdev) {
153                 pr_err("unable to allocate platform device for bluesleep");
154                 return;
155         }
156
157         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
158         if (!res) {
159                 pr_err("unable to allocate resource for bluesleep\n");
160                 goto err_free_dev;
161         }
162
163         res[0].name   = "gpio_host_wake";
164         res[0].start  = TEGRA_GPIO_PS2;
165         res[0].end    = TEGRA_GPIO_PS2;
166         res[0].flags  = IORESOURCE_IO;
167
168         res[1].name   = "gpio_ext_wake";
169         res[1].start  = TEGRA_GPIO_PE7;
170         res[1].end    = TEGRA_GPIO_PE7;
171         res[1].flags  = IORESOURCE_IO;
172
173         res[2].name   = "host_wake";
174         res[2].start  = gpio_to_irq(TEGRA_GPIO_PS2);
175         res[2].end    = gpio_to_irq(TEGRA_GPIO_PS2);
176         res[2].flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE ;
177
178         if (platform_device_add_resources(pdev, res, 3)) {
179                 pr_err("unable to add resources to bluesleep device\n");
180                 goto err_free_res;
181         }
182
183         if (platform_device_add(pdev)) {
184                 pr_err("unable to add bluesleep device\n");
185                 goto err_free_res;
186         }
187         tegra_gpio_enable(TEGRA_GPIO_PS2);
188         tegra_gpio_enable(TEGRA_GPIO_PE7);
189
190         return;
191
192 err_free_res:
193         kfree(res);
194 err_free_dev:
195         platform_device_put(pdev);
196         return;
197 }
198
199 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
200         /* name         parent          rate            enabled */
201         { "pll_m",      NULL,           0,              false},
202         { "hda",        "pll_p",        108000000,      false},
203         { "hda2codec_2x","pll_p",       48000000,       false},
204         { "pwm",        "clk_32k",      32768,          false},
205         { "blink",      "clk_32k",      32768,          true},
206         { "pll_a",      NULL,           564480000,      false},
207         { "pll_a_out0", NULL,           11289600,       false},
208         { "i2s0",       "pll_a_out0",   0,              false},
209         { "i2s1",       "pll_a_out0",   0,              false},
210         { "i2s2",       "pll_a_out0",   0,              false},
211         { "i2s3",       "pll_a_out0",   0,              false},
212         { "spdif_out",  "pll_a_out0",   0,              false},
213         { "d_audio",    "pll_a_out0",   0,              false},
214         { "dam0",       "pll_a_out0",   0,              false},
215         { "dam1",       "pll_a_out0",   0,              false},
216         { "dam2",       "pll_a_out0",   0,              false},
217         { "audio0",     "i2s0_sync",    0,              false},
218         { "audio1",     "i2s1_sync",    0,              false},
219         { "audio2",     "i2s2_sync",    0,              false},
220         { "audio3",     "i2s3_sync",    0,              false},
221         { NULL,         NULL,           0,              0},
222 };
223
224 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
225         .adapter_nr     = 0,
226         .bus_count      = 1,
227         .bus_clk_rate   = { 100000, 0 },
228         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
229         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
230         .arb_recovery = arb_lost_recovery,
231 };
232
233 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
234         .adapter_nr     = 1,
235         .bus_count      = 1,
236         .bus_clk_rate   = { 100000, 0 },
237         .is_clkon_always = true,
238         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
239         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
240         .arb_recovery = arb_lost_recovery,
241 };
242
243 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
244         .adapter_nr     = 2,
245         .bus_count      = 1,
246         .bus_clk_rate   = { 100000, 0 },
247         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
248         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
249         .arb_recovery = arb_lost_recovery,
250 };
251
252 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
253         .adapter_nr     = 3,
254         .bus_count      = 1,
255         .bus_clk_rate   = { 100000, 0 },
256         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
257         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
258         .arb_recovery = arb_lost_recovery,
259 };
260
261 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
262         .adapter_nr     = 4,
263         .bus_count      = 1,
264         .bus_clk_rate   = { 100000, 0 },
265         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
266         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
267         .arb_recovery = arb_lost_recovery,
268 };
269
270 /* Equalizer filter coefs generated from the MAXIM MAX98088
271  * evkit software tool */
272 static struct max98088_eq_cfg max98088_eq_cfg[] = {
273         {
274                 .name = "FLAT",
275                 .rate = 44100,
276                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
277                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
278                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
279                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
280                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
281         },
282         {
283                 .name = "LOWPASS1K",
284                 .rate = 44100,
285                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
286                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
287                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
288                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
289                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
290         },
291         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
292                 .name = "HIBOOST",
293                 .rate = 44100,
294                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
295                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
296                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
297                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
298                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
299         },
300         { /* BASS=12dB, TREBLE=+12dB */
301                 .name = "LOUD12DB",
302                 .rate = 44100,
303                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
304                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
305                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
306                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
307                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
308         },
309         {
310                 .name = "FLAT",
311                 .rate = 16000,
312                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
313                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
314                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
315                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
316                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
317         },
318         {
319                 .name = "LOWPASS1K",
320                 .rate = 16000,
321                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
322                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
323                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
324                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
325                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
326         },
327         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
328                 .name = "HIBOOST",
329                 .rate = 16000,
330                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
331                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
332                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
333                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
334                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
335         },
336         { /* BASS=12dB, TREBLE=+12dB */
337                 .name = "LOUD12DB",
338                 .rate = 16000,
339                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
340                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
341                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
342                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
343                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
344         },
345 };
346
347
348 static struct max98088_pdata enterprise_max98088_pdata = {
349         /* equalizer configuration */
350         .eq_cfg = max98088_eq_cfg,
351         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
352
353         /* debounce time */
354         .debounce_time_ms = 200,
355
356         /* microphone configuration */
357         .digmic_left_mode = 1,
358         .digmic_right_mode = 1,
359
360         /* receiver output configuration */
361         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
362 };
363
364 static struct pn544_i2c_platform_data nfc_pdata = {
365                 .irq_gpio = TEGRA_GPIO_PS4,
366                 .ven_gpio = TEGRA_GPIO_PM6,
367                 .firm_gpio = 0,
368 };
369
370
371 static struct i2c_board_info __initdata max98088_board_info = {
372         I2C_BOARD_INFO("max98088", 0x10),
373         .platform_data = &enterprise_max98088_pdata,
374         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
375 };
376
377 static struct i2c_board_info __initdata nfc_board_info = {
378         I2C_BOARD_INFO("pn544", 0x28),
379         .platform_data = &nfc_pdata,
380         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS4),
381 };
382
383 static void enterprise_i2c_init(void)
384 {
385         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
386         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
387         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
388         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
389         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
390
391         platform_device_register(&tegra_i2c_device5);
392         platform_device_register(&tegra_i2c_device4);
393         platform_device_register(&tegra_i2c_device3);
394         platform_device_register(&tegra_i2c_device2);
395         platform_device_register(&tegra_i2c_device1);
396
397         i2c_register_board_info(0, &max98088_board_info, 1);
398         i2c_register_board_info(0, &nfc_board_info, 1);
399 }
400
401 static struct platform_device *enterprise_uart_devices[] __initdata = {
402         &tegra_uarta_device,
403         &tegra_uartb_device,
404         &tegra_uartc_device,
405         &tegra_uartd_device,
406         &tegra_uarte_device,
407 };
408
409 static struct uart_clk_parent uart_parent_clk[] = {
410         [0] = {.name = "clk_m"},
411         [1] = {.name = "pll_p"},
412 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
413         [2] = {.name = "pll_m"},
414 #endif
415 };
416 static struct tegra_uart_platform_data enterprise_uart_pdata;
417 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
418
419 static void __init uart_debug_init(void)
420 {
421         unsigned long rate;
422         struct clk *c;
423
424         /* UARTD is the debug port. */
425         pr_info("Selecting UARTD as the debug console\n");
426         enterprise_uart_devices[3] = &debug_uartd_device;
427         debug_uart_port_base = ((struct plat_serial8250_port *)(
428                         debug_uartd_device.dev.platform_data))->mapbase;
429         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
430
431         /* Clock enable for the debug channel */
432         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
433                 rate = ((struct plat_serial8250_port *)(
434                         debug_uartd_device.dev.platform_data))->uartclk;
435                 pr_info("The debug console clock name is %s\n",
436                                                 debug_uart_clk->name);
437                 c = tegra_get_clock_by_name("pll_p");
438                 if (IS_ERR_OR_NULL(c))
439                         pr_err("Not getting the parent clock pll_p\n");
440                 else
441                         clk_set_parent(debug_uart_clk, c);
442
443                 clk_enable(debug_uart_clk);
444                 clk_set_rate(debug_uart_clk, rate);
445         } else {
446                 pr_err("Not getting the clock %s for debug console\n",
447                                 debug_uart_clk->name);
448         }
449 }
450
451 static void __init enterprise_uart_init(void)
452 {
453         int i;
454         struct clk *c;
455
456         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
457                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
458                 if (IS_ERR_OR_NULL(c)) {
459                         pr_err("Not able to get the clock for %s\n",
460                                                 uart_parent_clk[i].name);
461                         continue;
462                 }
463                 uart_parent_clk[i].parent_clk = c;
464                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
465         }
466         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
467         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
468         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
469         enterprise_loopback_uart_pdata.parent_clk_count =
470                                                 ARRAY_SIZE(uart_parent_clk);
471         enterprise_loopback_uart_pdata.is_loopback = true;
472         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
473         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
474         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
475         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
476         /* UARTE is used for loopback test purpose */
477         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
478
479         /* Register low speed only if it is selected */
480         if (!is_tegra_debug_uartport_hs())
481                 uart_debug_init();
482
483         platform_add_devices(enterprise_uart_devices,
484                                 ARRAY_SIZE(enterprise_uart_devices));
485 }
486
487
488
489 static struct resource tegra_rtc_resources[] = {
490         [0] = {
491                 .start = TEGRA_RTC_BASE,
492                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
493                 .flags = IORESOURCE_MEM,
494         },
495         [1] = {
496                 .start = INT_RTC,
497                 .end = INT_RTC,
498                 .flags = IORESOURCE_IRQ,
499         },
500 };
501
502 static struct platform_device tegra_rtc_device = {
503         .name = "tegra_rtc",
504         .id   = -1,
505         .resource = tegra_rtc_resources,
506         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
507 };
508
509 static struct platform_device tegra_camera = {
510         .name = "tegra_camera",
511         .id = -1,
512 };
513
514 static struct tegra_max98088_platform_data enterprise_audio_pdata = {
515         .gpio_spkr_en           = -1,
516         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
517         .gpio_hp_mute           = -1,
518         .gpio_int_mic_en        = -1,
519         .gpio_ext_mic_en        = -1,
520         .audio_port_id          = {
521                 [HIFI_CODEC] = 0,
522                 [BASEBAND] = 2,
523                 [BT_SCO] = 3,
524         },
525         .baseband_param         = {
526                 .rate = 8000,
527                 .channels = 1,
528         },
529 };
530
531 static struct platform_device enterprise_audio_device = {
532         .name   = "tegra-snd-max98088",
533         .id     = 0,
534         .dev    = {
535                 .platform_data  = &enterprise_audio_pdata,
536         },
537 };
538
539 static struct platform_device *enterprise_devices[] __initdata = {
540         &tegra_pmu_device,
541         &tegra_rtc_device,
542         &tegra_udc_device,
543 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
544         &tegra_smmu_device,
545 #endif
546         &tegra_wdt_device,
547 #if defined(CONFIG_TEGRA_AVP)
548         &tegra_avp_device,
549 #endif
550         &tegra_camera,
551         &tegra_spi_device4,
552         &tegra_hda_device,
553 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
554         &tegra_se_device,
555 #endif
556 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
557         &tegra_aes_device,
558 #endif
559 };
560
561 #define MXT_CONFIG_CRC 0x62F903
562 /*
563  * Config converted from memory-mapped cfg-file with
564  * following version information:
565  *
566  *
567  *
568  *      FAMILY_ID=128
569  *      VARIANT=1
570  *      VERSION=32
571  *      BUILD=170
572  *      VENDOR_ID=255
573  *      PRODUCT_ID=TBD
574  *      CHECKSUM=0xC189B6
575  *
576  *
577  */
578
579 static const u8 config[] = {
580         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
581         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
582         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
583         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
584         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
585         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
586         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
587         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
588         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
589         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
590         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
591         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
592         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
593         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
594         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
595         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
596         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
597         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
598         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
599         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
600         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
601         0x00
602 };
603
604 static struct mxt_platform_data atmel_mxt_info = {
605         .x_line         = 19,
606         .y_line         = 11,
607         .x_size         = 960,
608         .y_size         = 540,
609         .blen           = 0x10,
610         .threshold      = 0x32,
611         .voltage        = 3300000,              /* 3.3V */
612         .orient         = 3,
613         .config         = config,
614         .config_length  = 168,
615         .config_crc     = MXT_CONFIG_CRC,
616         .irqflags       = IRQF_TRIGGER_FALLING,
617 /*      .read_chg       = &read_chg, */
618         .read_chg       = NULL,
619 };
620
621 static struct i2c_board_info __initdata atmel_i2c_info[] = {
622         {
623                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
624                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH6),
625                 .platform_data = &atmel_mxt_info,
626         }
627 };
628
629 static int __init enterprise_touch_init(void)
630 {
631         tegra_gpio_enable(TEGRA_GPIO_PH6);
632         tegra_gpio_enable(TEGRA_GPIO_PF5);
633
634         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
635         gpio_direction_input(TEGRA_GPIO_PH6);
636
637         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
638         gpio_direction_output(TEGRA_GPIO_PF5, 0);
639         msleep(1);
640         gpio_set_value(TEGRA_GPIO_PF5, 1);
641         msleep(100);
642
643         i2c_register_board_info(1, atmel_i2c_info, 1);
644
645         return 0;
646 }
647
648 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
649         [0] = {
650                         .instance = 0,
651                         .vbus_gpio = -1,
652                         .vbus_reg_supply = "usb_vbus",
653                         .vbus_irq = ENT_TPS80031_IRQ_BASE +
654                                                         TPS80031_INT_VBUS_DET,
655         },
656         [1] = {
657                         .instance = 1,
658                         .vbus_gpio = -1,
659         },
660         [2] = {
661                         .instance = 2,
662                         .vbus_gpio = -1,
663         },
664 };
665
666
667 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
668         [0] = {
669                         .phy_config = &utmi_phy_config[0],
670                         .operating_mode = TEGRA_USB_HOST,
671                         .power_down_on_bus_suspend = 1,
672         },
673         [1] = {
674                         .phy_config = &utmi_phy_config[1],
675                         .operating_mode = TEGRA_USB_HOST,
676                         .power_down_on_bus_suspend = 1,
677         },
678         [2] = {
679                         .phy_config = &utmi_phy_config[2],
680                         .operating_mode = TEGRA_USB_HOST,
681                         .power_down_on_bus_suspend = 1,
682         },
683 };
684
685 static struct tegra_otg_platform_data tegra_otg_pdata = {
686         .ehci_device = &tegra_ehci1_device,
687         .ehci_pdata = &tegra_ehci_pdata[0],
688 };
689
690 static void enterprise_usb_init(void)
691 {
692         struct  fsl_usb2_platform_data *udc_pdata;
693
694         tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
695
696         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
697         platform_device_register(&tegra_otg_device);
698
699         udc_pdata = tegra_udc_device.dev.platform_data;
700 }
701
702 static struct platform_device *enterprise_audio_devices[] __initdata = {
703         &tegra_ahub_device,
704         &tegra_dam_device0,
705         &tegra_dam_device1,
706         &tegra_dam_device2,
707         &tegra_i2s_device2,
708         &tegra_i2s_device3,
709         &tegra_spdif_device,
710         &spdif_dit_device,
711         &bluetooth_dit_device,
712         &baseband_dit_device,
713         &tegra_pcm_device,
714         &enterprise_audio_device,
715 };
716
717 static void enterprise_audio_init(void)
718 {
719         struct board_info board_info;
720
721         tegra_get_board_info(&board_info);
722         if (board_info.board_id == BOARD_E1197) {
723                 platform_device_register(&tegra_i2s_device1);
724                 enterprise_audio_pdata.audio_port_id[HIFI_CODEC] = 1;
725         } else
726                 platform_device_register(&tegra_i2s_device0);
727
728         platform_add_devices(enterprise_audio_devices,
729                         ARRAY_SIZE(enterprise_audio_devices));
730 }
731
732 static void enterprise_gps_init(void)
733 {
734         tegra_gpio_enable(TEGRA_GPIO_PE4);
735         tegra_gpio_enable(TEGRA_GPIO_PE5);
736 }
737
738 static void enterprise_baseband_init(void)
739 {
740         int modem_id = tegra_get_modem_id();
741
742         switch (modem_id) {
743         case 1: /* PH450 ULPI */
744                 enterprise_modem_init();
745                 break;
746         case 2: /* 6260 HSIC */
747                 break;
748         }
749 }
750
751 static void enterprise_nfc_init(void)
752 {
753         tegra_gpio_enable(TEGRA_GPIO_PS4);
754         tegra_gpio_enable(TEGRA_GPIO_PM6);
755 }
756
757 static void __init tegra_enterprise_init(void)
758 {
759         tegra_thermal_init(&thermal_data);
760         tegra_clk_init_from_table(enterprise_clk_init_table);
761         enterprise_pinmux_init();
762         enterprise_i2c_init();
763         enterprise_uart_init();
764         enterprise_usb_init();
765         enterprise_tsensor_init();
766         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
767         enterprise_regulator_init();
768         enterprise_sdhci_init();
769 #ifdef CONFIG_TEGRA_EDP_LIMITS
770         enterprise_edp_init();
771 #endif
772         enterprise_kbc_init();
773         enterprise_touch_init();
774         enterprise_audio_init();
775         enterprise_gps_init();
776         enterprise_baseband_init();
777         enterprise_panel_init();
778         enterprise_bt_rfkill();
779         enterprise_setup_bluesleep();
780         enterprise_emc_init();
781         enterprise_sensors_init();
782         enterprise_suspend_init();
783         enterprise_bpc_mgmt_init();
784         tegra_release_bootloader_fb();
785         enterprise_nfc_init();
786 }
787
788 static void __init tegra_enterprise_reserve(void)
789 {
790 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
791         tegra_reserve(0, SZ_4M, SZ_8M);
792 #else
793         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
794 #endif
795 }
796
797 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
798         .boot_params    = 0x80000100,
799         .map_io         = tegra_map_common_io,
800         .reserve        = tegra_enterprise_reserve,
801         .init_early     = tegra_init_early,
802         .init_irq       = tegra_init_irq,
803         .timer          = &tegra_timer,
804         .init_machine   = tegra_enterprise_init,
805 MACHINE_END