ARM: tegra: integration of slave mode support.
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/memblock.h>
40 #include <linux/rfkill-gpio.h>
41
42 #include <linux/nfc/pn544.h>
43 #include <sound/max98088.h>
44
45 #include <mach/clk.h>
46 #include <mach/iomap.h>
47 #include <mach/irqs.h>
48 #include <mach/pinmux.h>
49 #include <mach/iomap.h>
50 #include <mach/io.h>
51 #include <mach/io_dpd.h>
52 #include <asm/mach-types.h>
53 #include <asm/mach/arch.h>
54 #include <mach/usb_phy.h>
55 #include <mach/i2s.h>
56 #include <mach/tegra_asoc_pdata.h>
57 #include <mach/thermal.h>
58 #include <mach/tegra-bb-power.h>
59 #include <mach/tegra_fiq_debugger.h>
60 #include "board.h"
61 #include "clock.h"
62 #include "board-enterprise.h"
63 #include "baseband-xmm-power.h"
64 #include "devices.h"
65 #include "gpio-names.h"
66 #include "fuse.h"
67 #include "pm.h"
68
69 static struct balanced_throttle throttle_list[] = {
70         {
71                 .id = BALANCED_THROTTLE_ID_TJ,
72                 .throt_tab_size = 10,
73                 .throt_tab = {
74                         {      0, 1000 },
75                         { 640000, 1000 },
76                         { 640000, 1000 },
77                         { 640000, 1000 },
78                         { 640000, 1000 },
79                         { 640000, 1000 },
80                         { 760000, 1000 },
81                         { 760000, 1050 },
82                         {1000000, 1050 },
83                         {1000000, 1100 },
84                 },
85         },
86 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
87         {
88                 .id = BALANCED_THROTTLE_ID_SKIN,
89                 .throt_tab_size = 6,
90                 .throt_tab = {
91                         { 640000, 1200 },
92                         { 640000, 1200 },
93                         { 760000, 1200 },
94                         { 760000, 1200 },
95                         {1000000, 1200 },
96                         {1000000, 1200 },
97                 },
98         },
99 #endif
100 };
101
102 /* All units are in millicelsius */
103 static struct tegra_thermal_data thermal_data = {
104         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
105         .temp_shutdown = 90000,
106 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
107         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
108 #endif
109 #ifdef CONFIG_TEGRA_EDP_LIMITS
110         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
111         .hysteresis_edp = 3000,
112 #endif
113 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
114         .temp_throttle = 85000,
115         .tc1 = 0,
116         .tc2 = 1,
117         .passive_delay = 2000,
118 #endif
119 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
120         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
121         .temp_throttle_skin = 43000,
122 #endif
123 };
124
125 static struct rfkill_gpio_platform_data enterprise_bt_rfkill_pdata[] = {
126         {
127                 .name           = "bt_rfkill",
128                 .shutdown_gpio  = TEGRA_GPIO_PE6,
129                 .reset_gpio     = TEGRA_GPIO_INVALID,
130                 .type           = RFKILL_TYPE_BLUETOOTH,
131         },
132 };
133
134 static struct platform_device enterprise_bt_rfkill_device = {
135         .name = "rfkill_gpio",
136         .id             = -1,
137         .dev = {
138                 .platform_data = &enterprise_bt_rfkill_pdata,
139         },
140 };
141
142 static struct resource enterprise_bluesleep_resources[] = {
143         [0] = {
144                 .name = "gpio_host_wake",
145                         .start  = TEGRA_GPIO_PS2,
146                         .end    = TEGRA_GPIO_PS2,
147                         .flags  = IORESOURCE_IO,
148         },
149         [1] = {
150                 .name = "gpio_ext_wake",
151                         .start  = TEGRA_GPIO_PE7,
152                         .end    = TEGRA_GPIO_PE7,
153                         .flags  = IORESOURCE_IO,
154         },
155         [2] = {
156                 .name = "host_wake",
157                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
158                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
159                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
160         },
161 };
162
163 static struct platform_device enterprise_bluesleep_device = {
164         .name           = "bluesleep",
165         .id             = -1,
166         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
167         .resource       = enterprise_bluesleep_resources,
168 };
169
170 static void __init enterprise_setup_bluesleep(void)
171 {
172         platform_device_register(&enterprise_bluesleep_device);
173         return;
174 }
175
176 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
177         /* name         parent          rate            enabled */
178         { "pll_m",      NULL,           0,              false},
179         { "hda",        "pll_p",        108000000,      false},
180         { "hda2codec_2x","pll_p",       48000000,       false},
181         { "pwm",        "pll_p",        3187500,        false},
182         { "blink",      "clk_32k",      32768,          true},
183         { "i2s0",       "pll_a_out0",   0,              false},
184         { "i2s1",       "pll_a_out0",   0,              false},
185         { "i2s2",       "pll_a_out0",   0,              false},
186         { "i2s3",       "pll_a_out0",   0,              false},
187         { "spdif_out",  "pll_a_out0",   0,              false},
188         { "d_audio",    "clk_m",        12000000,       false},
189         { "dam0",       "clk_m",        12000000,       false},
190         { "dam1",       "clk_m",        12000000,       false},
191         { "dam2",       "clk_m",        12000000,       false},
192         { "audio0",     "i2s0_sync",    0,              false},
193         { "audio1",     "i2s1_sync",    0,              false},
194         { "audio2",     "i2s2_sync",    0,              false},
195         { "audio3",     "i2s3_sync",    0,              false},
196         { "vi",         "pll_p",        0,              false},
197         { "vi_sensor",  "pll_p",        0,              false},
198         { NULL,         NULL,           0,              0},
199 };
200
201 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
202         .adapter_nr     = 0,
203         .bus_count      = 1,
204         .bus_clk_rate   = { 100000, 0 },
205         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
206         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
207         .arb_recovery = arb_lost_recovery,
208 };
209
210 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
211         .adapter_nr     = 1,
212         .bus_count      = 1,
213         .bus_clk_rate   = { 400000, 0 },
214         .is_clkon_always = true,
215         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
216         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
217         .arb_recovery = arb_lost_recovery,
218 };
219
220 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
221         .adapter_nr     = 2,
222         .bus_count      = 1,
223         .bus_clk_rate   = { 271000, 0 },
224         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
225         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
226         .arb_recovery = arb_lost_recovery,
227 };
228
229 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
230         .adapter_nr     = 3,
231         .bus_count      = 1,
232         .bus_clk_rate   = { 10000, 0 },
233         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
234         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
235         .arb_recovery = arb_lost_recovery,
236 };
237
238 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
239         .adapter_nr     = 4,
240         .bus_count      = 1,
241         .bus_clk_rate   = { 400000, 0 },
242         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
243         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
244         .arb_recovery = arb_lost_recovery,
245 };
246
247 /* Equalizer filter coefs generated from the MAXIM MAX98088
248  * evkit software tool */
249 static struct max98088_eq_cfg max98088_eq_cfg[] = {
250         {
251                 .name = "FLAT",
252                 .rate = 44100,
253                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
254                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
255                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
256                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
257                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
258         },
259         {
260                 .name = "LOWPASS1K",
261                 .rate = 44100,
262                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
263                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
264                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
265                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
266                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
267         },
268         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
269                 .name = "HIBOOST",
270                 .rate = 44100,
271                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
272                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
273                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
274                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
275                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
276         },
277         { /* BASS=12dB, TREBLE=+12dB */
278                 .name = "LOUD12DB",
279                 .rate = 44100,
280                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
281                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
282                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
283                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
284                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
285         },
286         {
287                 .name = "FLAT",
288                 .rate = 16000,
289                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
290                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
291                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
292                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
293                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
294         },
295         {
296                 .name = "LOWPASS1K",
297                 .rate = 16000,
298                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
299                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
300                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
301                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
302                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
303         },
304         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
305                 .name = "HIBOOST",
306                 .rate = 16000,
307                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
308                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
309                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
310                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
311                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
312         },
313         { /* BASS=12dB, TREBLE=+12dB */
314                 .name = "LOUD12DB",
315                 .rate = 16000,
316                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
317                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
318                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
319                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
320                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
321         },
322 };
323
324
325 static struct max98088_pdata enterprise_max98088_pdata = {
326         /* equalizer configuration */
327         .eq_cfg = max98088_eq_cfg,
328         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
329
330         /* debounce time */
331         .debounce_time_ms = 200,
332
333         /* microphone configuration */
334         .digmic_left_mode = 1,
335         .digmic_right_mode = 1,
336
337         /* receiver output configuration */
338         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
339 };
340
341 static struct pn544_i2c_platform_data nfc_pdata = {
342                 .irq_gpio = TEGRA_GPIO_PS4,
343                 .ven_gpio = TEGRA_GPIO_PM6,
344                 .firm_gpio = 0,
345 };
346
347
348 static struct i2c_board_info __initdata max98088_board_info = {
349         I2C_BOARD_INFO("max98088", 0x10),
350         .platform_data = &enterprise_max98088_pdata,
351         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
352 };
353
354 static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
355         I2C_BOARD_INFO("aic3262-codec", 0x18),
356         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
357 };
358
359 static struct i2c_board_info __initdata nfc_board_info = {
360         I2C_BOARD_INFO("pn544", 0x28),
361         .platform_data = &nfc_pdata,
362         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS4),
363 };
364
365 static void enterprise_i2c_init(void)
366 {
367         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
368         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
369         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
370         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
371         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
372
373         platform_device_register(&tegra_i2c_device5);
374         platform_device_register(&tegra_i2c_device4);
375         platform_device_register(&tegra_i2c_device3);
376         platform_device_register(&tegra_i2c_device2);
377         platform_device_register(&tegra_i2c_device1);
378
379         i2c_register_board_info(0, &max98088_board_info, 1);
380         i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
381         i2c_register_board_info(0, &nfc_board_info, 1);
382 }
383
384 static struct platform_device *enterprise_uart_devices[] __initdata = {
385         &tegra_uarta_device,
386         &tegra_uartb_device,
387         &tegra_uartc_device,
388         &tegra_uartd_device,
389         &tegra_uarte_device,
390 };
391
392 static struct uart_clk_parent uart_parent_clk[] = {
393         [0] = {.name = "clk_m"},
394         [1] = {.name = "pll_p"},
395 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
396         [2] = {.name = "pll_m"},
397 #endif
398 };
399 static struct tegra_uart_platform_data enterprise_uart_pdata;
400 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
401
402 static void __init uart_debug_init(void)
403 {
404         unsigned long rate;
405         struct clk *c;
406
407         /* UARTD is the debug port. */
408         pr_info("Selecting UARTD as the debug console\n");
409         enterprise_uart_devices[3] = &debug_uartd_device;
410         debug_uart_port_base = ((struct plat_serial8250_port *)(
411                         debug_uartd_device.dev.platform_data))->mapbase;
412         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
413
414         /* Clock enable for the debug channel */
415         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
416                 rate = ((struct plat_serial8250_port *)(
417                         debug_uartd_device.dev.platform_data))->uartclk;
418                 pr_info("The debug console clock name is %s\n",
419                                                 debug_uart_clk->name);
420                 c = tegra_get_clock_by_name("pll_p");
421                 if (IS_ERR_OR_NULL(c))
422                         pr_err("Not getting the parent clock pll_p\n");
423                 else
424                         clk_set_parent(debug_uart_clk, c);
425
426                 clk_enable(debug_uart_clk);
427                 clk_set_rate(debug_uart_clk, rate);
428         } else {
429                 pr_err("Not getting the clock %s for debug console\n",
430                                 debug_uart_clk->name);
431         }
432 }
433
434 static void __init enterprise_uart_init(void)
435 {
436         int i;
437         struct clk *c;
438
439         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
440                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
441                 if (IS_ERR_OR_NULL(c)) {
442                         pr_err("Not able to get the clock for %s\n",
443                                                 uart_parent_clk[i].name);
444                         continue;
445                 }
446                 uart_parent_clk[i].parent_clk = c;
447                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
448         }
449         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
450         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
451         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
452         enterprise_loopback_uart_pdata.parent_clk_count =
453                                                 ARRAY_SIZE(uart_parent_clk);
454         enterprise_loopback_uart_pdata.is_loopback = true;
455         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
456         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
457         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
458         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
459         /* UARTE is used for loopback test purpose */
460         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
461
462         /* Register low speed only if it is selected */
463         if (!is_tegra_debug_uartport_hs())
464                 uart_debug_init();
465
466         platform_add_devices(enterprise_uart_devices,
467                                 ARRAY_SIZE(enterprise_uart_devices));
468 }
469
470 static struct resource tegra_rtc_resources[] = {
471         [0] = {
472                 .start = TEGRA_RTC_BASE,
473                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
474                 .flags = IORESOURCE_MEM,
475         },
476         [1] = {
477                 .start = INT_RTC,
478                 .end = INT_RTC,
479                 .flags = IORESOURCE_IRQ,
480         },
481 };
482
483 static struct platform_device tegra_rtc_device = {
484         .name = "tegra_rtc",
485         .id   = -1,
486         .resource = tegra_rtc_resources,
487         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
488 };
489
490 static struct platform_device tegra_camera = {
491         .name = "tegra_camera",
492         .id = -1,
493 };
494
495 static struct tegra_asoc_platform_data enterprise_audio_pdata = {
496         .gpio_spkr_en           = -1,
497         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
498         .gpio_hp_mute           = -1,
499         .gpio_int_mic_en        = -1,
500         .gpio_ext_mic_en        = -1,
501         .debounce_time_hp       = -1,
502         /*defaults for Enterprise board*/
503         .i2s_param[HIFI_CODEC]  = {
504                 .audio_port_id  = 0,
505                 .is_i2s_master  = 1,
506                 .i2s_mode       = TEGRA_DAIFMT_I2S,
507                 .sample_size    = 16,
508         },
509         .i2s_param[BASEBAND]    = {
510                 .audio_port_id  = 2,
511                 .is_i2s_master  = 1,
512                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
513                 .sample_size    = 16,
514                 .rate           = 8000,
515                 .channels       = 1,
516         },
517         .i2s_param[BT_SCO]      = {
518                 .audio_port_id  = 3,
519                 .is_i2s_master  = 1,
520                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
521                 .sample_size    = 16,
522         },
523 };
524
525 static struct platform_device enterprise_audio_device = {
526         .name   = "tegra-snd-max98088",
527         .id     = 0,
528         .dev    = {
529                 .platform_data  = &enterprise_audio_pdata,
530         },
531 };
532
533 static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
534         .gpio_spkr_en           = -1,
535         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
536         .gpio_hp_mute           = -1,
537         .gpio_int_mic_en        = -1,
538         .gpio_ext_mic_en        = -1,
539         /*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
540         .i2s_param[HIFI_CODEC]  = {
541                 .audio_port_id  = 0,
542                 .is_i2s_master  = 1,
543                 .i2s_mode       = TEGRA_DAIFMT_I2S,
544                 .sample_size    = 16,
545         },
546         .i2s_param[BASEBAND]    = {
547                 .audio_port_id  = 2,
548                 .is_i2s_master  = 1,
549                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
550                 .sample_size    = 16,
551                 .rate           = 8000,
552                 .channels       = 1,
553         },
554         .i2s_param[BT_SCO]      = {
555                 .sample_size    = 16,
556                 .audio_port_id  = 3,
557                 .is_i2s_master  = 1,
558                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
559         },
560 };
561
562 static struct platform_device enterprise_audio_aic326x_device = {
563         .name   = "tegra-snd-aic326x",
564         .id     = 0,
565         .dev    = {
566                 .platform_data  = &enterprise_audio_aic326x_pdata,
567         },
568 };
569
570 static struct platform_device *enterprise_devices[] __initdata = {
571         &tegra_pmu_device,
572         &tegra_rtc_device,
573         &tegra_udc_device,
574 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
575         &tegra_smmu_device,
576 #endif
577         &tegra_wdt0_device,
578         &tegra_wdt1_device,
579         &tegra_wdt2_device,
580 #if defined(CONFIG_TEGRA_AVP)
581         &tegra_avp_device,
582 #endif
583         &tegra_camera,
584         &enterprise_bt_rfkill_device,
585         &tegra_spi_device4,
586         &tegra_hda_device,
587 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
588         &tegra_se_device,
589 #endif
590 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
591         &tegra_aes_device,
592 #endif
593 };
594
595 #define MXT_CONFIG_CRC 0x62F903
596 /*
597  * Config converted from memory-mapped cfg-file with
598  * following version information:
599  *
600  *
601  *
602  *      FAMILY_ID=128
603  *      VARIANT=1
604  *      VERSION=32
605  *      BUILD=170
606  *      VENDOR_ID=255
607  *      PRODUCT_ID=TBD
608  *      CHECKSUM=0xC189B6
609  *
610  *
611  */
612
613 static const u8 config[] = {
614         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
615         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
616         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
617         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
618         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
619         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
620         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
621         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
622         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
623         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
624         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
625         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
626         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
627         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
628         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
629         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
630         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
631         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
632         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
633         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
634         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
635         0x00
636 };
637
638 static struct mxt_platform_data atmel_mxt_info = {
639         .x_line         = 19,
640         .y_line         = 11,
641         .x_size         = 960,
642         .y_size         = 540,
643         .blen           = 0x10,
644         .threshold      = 0x32,
645         .voltage        = 3300000,              /* 3.3V */
646         .orient         = 3,
647         .config         = config,
648         .config_length  = 168,
649         .config_crc     = MXT_CONFIG_CRC,
650         .irqflags       = IRQF_TRIGGER_FALLING,
651 /*      .read_chg       = &read_chg, */
652         .read_chg       = NULL,
653 };
654
655 static struct i2c_board_info __initdata atmel_i2c_info[] = {
656         {
657                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
658                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH6),
659                 .platform_data = &atmel_mxt_info,
660         }
661 };
662
663 static int __init enterprise_touch_init(void)
664 {
665         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
666         gpio_direction_input(TEGRA_GPIO_PH6);
667
668         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
669         gpio_direction_output(TEGRA_GPIO_PF5, 0);
670         msleep(1);
671         gpio_set_value(TEGRA_GPIO_PF5, 1);
672         msleep(100);
673
674         i2c_register_board_info(1, atmel_i2c_info, 1);
675
676         return 0;
677 }
678
679 static void enterprise_usb_hsic_postsupend(void)
680 {
681         pr_debug("%s\n", __func__);
682 #ifdef CONFIG_TEGRA_BB_XMM_POWER
683         baseband_xmm_set_power_status(BBXMM_PS_L2);
684 #endif
685 }
686
687 static void enterprise_usb_hsic_preresume(void)
688 {
689         pr_debug("%s\n", __func__);
690 #ifdef CONFIG_TEGRA_BB_XMM_POWER
691         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
692 #endif
693 }
694
695 static void enterprise_usb_hsic_phy_power(void)
696 {
697         pr_debug("%s\n", __func__);
698 #ifdef CONFIG_TEGRA_BB_XMM_POWER
699         baseband_xmm_set_power_status(BBXMM_PS_L0);
700 #endif
701 }
702
703 static void enterprise_usb_hsic_post_phy_off(void)
704 {
705         pr_debug("%s\n", __func__);
706 #ifdef CONFIG_TEGRA_BB_XMM_POWER
707         baseband_xmm_set_power_status(BBXMM_PS_L2);
708 #endif
709 }
710
711 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
712         .post_suspend = enterprise_usb_hsic_postsupend,
713         .pre_resume = enterprise_usb_hsic_preresume,
714         .port_power = enterprise_usb_hsic_phy_power,
715         .post_phy_off = enterprise_usb_hsic_post_phy_off,
716 };
717
718 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
719         .port_otg = false,
720         .has_hostpc = true,
721         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
722         .op_mode        = TEGRA_USB_OPMODE_HOST,
723         .u_data.host = {
724                 .vbus_gpio = -1,
725                 .hot_plug = false,
726                 .remote_wakeup_supported = false,
727                 .power_off_on_suspend = false,
728         },
729         .u_cfg.hsic = {
730                 .sync_start_delay = 9,
731                 .idle_wait_delay = 17,
732                 .term_range_adj = 0,
733                 .elastic_underrun_limit = 16,
734                 .elastic_overrun_limit = 16,
735         },
736         .ops = &hsic_xmm_plat_ops,
737 };
738
739
740
741 static struct tegra_usb_platform_data tegra_udc_pdata = {
742         .port_otg = true,
743         .has_hostpc = true,
744         .builtin_host_disabled = true,
745         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
746         .op_mode = TEGRA_USB_OPMODE_DEVICE,
747         .u_data.dev = {
748                 .vbus_pmu_irq = ENT_TPS80031_IRQ_BASE +
749                                 TPS80031_INT_VBUS_DET,
750                 .vbus_gpio = -1,
751                 .charging_supported = false,
752                 .remote_wakeup_supported = false,
753         },
754         .u_cfg.utmi = {
755                 .hssync_start_delay = 0,
756                 .elastic_limit = 16,
757                 .idle_wait_delay = 17,
758                 .term_range_adj = 6,
759                 .xcvr_setup = 8,
760                 .xcvr_lsfslew = 2,
761                 .xcvr_lsrslew = 2,
762                 .xcvr_setup_offset = 0,
763                 .xcvr_use_fuses = 1,
764         },
765 };
766
767 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
768         .port_otg = true,
769         .has_hostpc = true,
770         .builtin_host_disabled = true,
771         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
772         .op_mode = TEGRA_USB_OPMODE_HOST,
773         .u_data.host = {
774                 .vbus_gpio = -1,
775                 .vbus_reg = "usb_vbus",
776                 .hot_plug = true,
777                 .remote_wakeup_supported = true,
778                 .power_off_on_suspend = true,
779         },
780         .u_cfg.utmi = {
781                 .hssync_start_delay = 0,
782                 .elastic_limit = 16,
783                 .idle_wait_delay = 17,
784                 .term_range_adj = 6,
785                 .xcvr_setup = 15,
786                 .xcvr_lsfslew = 2,
787                 .xcvr_lsrslew = 2,
788                 .xcvr_setup_offset = 0,
789                 .xcvr_use_fuses = 1,
790         },
791 };
792
793 static struct tegra_usb_otg_data tegra_otg_pdata = {
794         .ehci_device = &tegra_ehci1_device,
795         .ehci_pdata = &tegra_ehci1_utmi_pdata,
796 };
797
798 struct platform_device *tegra_usb_hsic_host_register(void)
799 {
800         struct platform_device *pdev;
801         int val;
802
803         pdev = platform_device_alloc(tegra_ehci2_device.name,
804                 tegra_ehci2_device.id);
805         if (!pdev)
806                 return NULL;
807
808         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
809                 tegra_ehci2_device.num_resources);
810         if (val)
811                 goto error;
812
813         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
814         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
815
816         val = platform_device_add_data(pdev, &tegra_ehci2_hsic_xmm_pdata,
817                         sizeof(struct tegra_usb_platform_data));
818         if (val)
819                 goto error;
820
821         val = platform_device_add(pdev);
822         if (val)
823                 goto error;
824
825         return pdev;
826
827 error:
828         pr_err("%s: failed to add the host contoller device\n", __func__);
829         platform_device_put(pdev);
830         return NULL;
831 }
832
833 void tegra_usb_hsic_host_unregister(struct platform_device *pdev)
834 {
835         platform_device_unregister(pdev);
836 }
837
838 static void enterprise_usb_init(void)
839 {
840         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
841
842         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
843         platform_device_register(&tegra_otg_device);
844 }
845
846 static struct platform_device *enterprise_audio_devices[] __initdata = {
847         &tegra_ahub_device,
848         &tegra_dam_device0,
849         &tegra_dam_device1,
850         &tegra_dam_device2,
851         &tegra_i2s_device0,
852         &tegra_i2s_device1,
853         &tegra_i2s_device2,
854         &tegra_i2s_device3,
855         &tegra_spdif_device,
856         &spdif_dit_device,
857         &bluetooth_dit_device,
858         &baseband_dit_device,
859         &tegra_pcm_device,
860         &enterprise_audio_device,
861         &enterprise_audio_aic326x_device,
862 };
863
864 static void enterprise_audio_init(void)
865 {
866         struct board_info board_info;
867
868         tegra_get_board_info(&board_info);
869
870         if (board_info.board_id == BOARD_E1197)
871                 enterprise_audio_pdata.i2s_param[HIFI_CODEC].audio_port_id = 1;
872
873         platform_add_devices(enterprise_audio_devices,
874                         ARRAY_SIZE(enterprise_audio_devices));
875 }
876
877
878 static struct baseband_power_platform_data tegra_baseband_power_data = {
879         .baseband_type = BASEBAND_XMM,
880         .modem = {
881                 .xmm = {
882                         .bb_rst = XMM_GPIO_BB_RST,
883                         .bb_on = XMM_GPIO_BB_ON,
884                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
885                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
886                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
887                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
888                 },
889         },
890 };
891
892 static struct platform_device tegra_baseband_power_device = {
893         .name = "baseband_xmm_power",
894         .id = -1,
895         .dev = {
896                 .platform_data = &tegra_baseband_power_data,
897         },
898 };
899
900 static struct platform_device tegra_baseband_power2_device = {
901         .name = "baseband_xmm_power2",
902         .id = -1,
903         .dev = {
904                 .platform_data = &tegra_baseband_power_data,
905         },
906 };
907
908 #ifdef CONFIG_TEGRA_BB_M7400
909 static union tegra_bb_gpio_id m7400_gpio_id = {
910         .m7400 = {
911                 .pwr_status = GPIO_BB_RESET,
912                 .pwr_on = GPIO_BB_PWRON,
913                 .uart_awr = GPIO_BB_APACK,
914                 .uart_cwr = GPIO_BB_CPACK,
915                 .usb_awr = GPIO_BB_APACK2,
916                 .usb_cwr = GPIO_BB_CPACK2,
917                 .service = GPIO_BB_RSVD2,
918                 .resout2 = GPIO_BB_RSVD1,
919         },
920 };
921
922 static struct tegra_bb_pdata m7400_pdata = {
923         .id = &m7400_gpio_id,
924         .device = &tegra_ehci2_device,
925         .ehci_register = tegra_usb_hsic_host_register,
926         .ehci_unregister = tegra_usb_hsic_host_unregister,
927         .bb_id = TEGRA_BB_M7400,
928 };
929
930 static struct platform_device tegra_baseband_m7400_device = {
931         .name = "tegra_baseband_power",
932         .id = -1,
933         .dev = {
934                 .platform_data = &m7400_pdata,
935         },
936 };
937 #endif
938
939 static void enterprise_baseband_init(void)
940 {
941         int modem_id = tegra_get_modem_id();
942
943         switch (modem_id) {
944         case TEGRA_BB_PH450: /* PH450 ULPI */
945                 enterprise_modem_init();
946                 break;
947         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
948                 /* baseband-power.ko will register ehci2 device */
949                 tegra_ehci2_device.dev.platform_data =
950                                         &tegra_ehci2_hsic_xmm_pdata;
951                 tegra_baseband_power_data.hsic_register =
952                                                 &tegra_usb_hsic_host_register;
953                 tegra_baseband_power_data.hsic_unregister =
954                                                 &tegra_usb_hsic_host_unregister;
955
956                 platform_device_register(&tegra_baseband_power_device);
957                 platform_device_register(&tegra_baseband_power2_device);
958                 break;
959 #ifdef CONFIG_TEGRA_BB_M7400
960         case TEGRA_BB_M7400: /* M7400 HSIC */
961                 tegra_ehci2_hsic_xmm_pdata.u_data.host.power_off_on_suspend = 0;
962                 tegra_ehci2_device.dev.platform_data
963                         = &tegra_ehci2_hsic_xmm_pdata;
964                 platform_device_register(&tegra_baseband_m7400_device);
965                 break;
966 #endif
967         }
968 }
969 static void enterprise_nfc_init(void)
970 {
971         struct board_info bi;
972
973         /* Enable firmware GPIO PX7 for board E1205 */
974         tegra_get_board_info(&bi);
975         if (bi.board_id == BOARD_E1205 && bi.fab >= BOARD_FAB_A03) {
976                 nfc_pdata.firm_gpio = TEGRA_GPIO_PX7;
977         }
978 }
979
980 static void __init tegra_enterprise_init(void)
981 {
982         tegra_thermal_init(&thermal_data,
983                                 throttle_list,
984                                 ARRAY_SIZE(throttle_list));
985         tegra_clk_init_from_table(enterprise_clk_init_table);
986         enterprise_pinmux_init();
987         enterprise_i2c_init();
988         enterprise_uart_init();
989         enterprise_usb_init();
990         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
991         tegra_ram_console_debug_init();
992         enterprise_regulator_init();
993         tegra_io_dpd_init();
994         enterprise_sdhci_init();
995 #ifdef CONFIG_TEGRA_EDP_LIMITS
996         enterprise_edp_init();
997 #endif
998         enterprise_kbc_init();
999         enterprise_nfc_init();
1000         enterprise_touch_init();
1001         enterprise_audio_init();
1002         enterprise_baseband_init();
1003         enterprise_panel_init();
1004         enterprise_setup_bluesleep();
1005         enterprise_emc_init();
1006         enterprise_sensors_init();
1007         enterprise_suspend_init();
1008         enterprise_bpc_mgmt_init();
1009         tegra_release_bootloader_fb();
1010         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1011 }
1012
1013 static void __init tegra_enterprise_reserve(void)
1014 {
1015 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1016         tegra_reserve(0, SZ_4M, SZ_8M);
1017 #else
1018         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
1019 #endif
1020         tegra_ram_console_debug_reserve(SZ_1M);
1021 }
1022
1023 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
1024         .boot_params    = 0x80000100,
1025         .map_io         = tegra_map_common_io,
1026         .reserve        = tegra_enterprise_reserve,
1027         .init_early     = tegra_init_early,
1028         .init_irq       = tegra_init_irq,
1029         .timer          = &tegra_timer,
1030         .init_machine   = tegra_enterprise_init,
1031 MACHINE_END