arm: tegra: E1239: Fix LP0 audio stop issue
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/memblock.h>
40 #include <linux/rfkill-gpio.h>
41 #include <linux/mfd/tlv320aic3262-registers.h>
42 #include <linux/mfd/tlv320aic3262-core.h>
43
44 #include <linux/nfc/pn544.h>
45 #include <sound/max98088.h>
46
47 #include <mach/clk.h>
48 #include <mach/iomap.h>
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/io_dpd.h>
54 #include <asm/mach-types.h>
55 #include <asm/mach/arch.h>
56 #include <mach/usb_phy.h>
57 #include <mach/i2s.h>
58 #include <mach/tegra_asoc_pdata.h>
59 #include <mach/thermal.h>
60 #include <mach/tegra-bb-power.h>
61 #include <mach/tegra_fiq_debugger.h>
62 #include "board.h"
63 #include "clock.h"
64 #include "board-enterprise.h"
65 #include "baseband-xmm-power.h"
66 #include "devices.h"
67 #include "gpio-names.h"
68 #include "fuse.h"
69 #include "pm.h"
70
71 static struct balanced_throttle throttle_list[] = {
72         {
73                 .id = BALANCED_THROTTLE_ID_TJ,
74                 .throt_tab_size = 10,
75                 .throt_tab = {
76                         {      0, 1000 },
77                         { 640000, 1000 },
78                         { 640000, 1000 },
79                         { 640000, 1000 },
80                         { 640000, 1000 },
81                         { 640000, 1000 },
82                         { 760000, 1000 },
83                         { 760000, 1050 },
84                         {1000000, 1050 },
85                         {1000000, 1100 },
86                 },
87         },
88 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
89         {
90                 .id = BALANCED_THROTTLE_ID_SKIN,
91                 .throt_tab_size = 6,
92                 .throt_tab = {
93                         { 640000, 1200 },
94                         { 640000, 1200 },
95                         { 760000, 1200 },
96                         { 760000, 1200 },
97                         {1000000, 1200 },
98                         {1000000, 1200 },
99                 },
100         },
101 #endif
102 };
103
104 /* All units are in millicelsius */
105 static struct tegra_thermal_data thermal_data = {
106         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
107         .temp_shutdown = 90000,
108 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
109         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
110 #endif
111 #ifdef CONFIG_TEGRA_EDP_LIMITS
112         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
113         .hysteresis_edp = 3000,
114 #endif
115 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
116         .temp_throttle = 85000,
117         .tc1 = 0,
118         .tc2 = 1,
119         .passive_delay = 2000,
120 #endif
121 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
122         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
123         .temp_throttle_skin = 43000,
124 #endif
125 };
126
127 static struct rfkill_gpio_platform_data enterprise_bt_rfkill_pdata[] = {
128         {
129                 .name           = "bt_rfkill",
130                 .shutdown_gpio  = TEGRA_GPIO_PE6,
131                 .reset_gpio     = TEGRA_GPIO_INVALID,
132                 .type           = RFKILL_TYPE_BLUETOOTH,
133         },
134 };
135
136 static struct platform_device enterprise_bt_rfkill_device = {
137         .name = "rfkill_gpio",
138         .id             = -1,
139         .dev = {
140                 .platform_data = &enterprise_bt_rfkill_pdata,
141         },
142 };
143
144 static struct resource enterprise_bluesleep_resources[] = {
145         [0] = {
146                 .name = "gpio_host_wake",
147                         .start  = TEGRA_GPIO_PS2,
148                         .end    = TEGRA_GPIO_PS2,
149                         .flags  = IORESOURCE_IO,
150         },
151         [1] = {
152                 .name = "gpio_ext_wake",
153                         .start  = TEGRA_GPIO_PE7,
154                         .end    = TEGRA_GPIO_PE7,
155                         .flags  = IORESOURCE_IO,
156         },
157         [2] = {
158                 .name = "host_wake",
159                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
160                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
161                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
162         },
163 };
164
165 static struct platform_device enterprise_bluesleep_device = {
166         .name           = "bluesleep",
167         .id             = -1,
168         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
169         .resource       = enterprise_bluesleep_resources,
170 };
171
172 static void __init enterprise_setup_bluesleep(void)
173 {
174         platform_device_register(&enterprise_bluesleep_device);
175         return;
176 }
177
178 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
179         /* name         parent          rate            enabled */
180         { "pll_m",      NULL,           0,              false},
181         { "hda",        "pll_p",        108000000,      false},
182         { "hda2codec_2x","pll_p",       48000000,       false},
183         { "pwm",        "pll_p",        3187500,        false},
184         { "blink",      "clk_32k",      32768,          true},
185         { "i2s0",       "pll_a_out0",   0,              false},
186         { "i2s1",       "pll_a_out0",   0,              false},
187         { "i2s3",       "pll_a_out0",   0,              false},
188         { "spdif_out",  "pll_a_out0",   0,              false},
189         { "d_audio",    "clk_m",        12000000,       false},
190         { "dam0",       "clk_m",        12000000,       false},
191         { "dam1",       "clk_m",        12000000,       false},
192         { "dam2",       "clk_m",        12000000,       false},
193         { "audio0",     "i2s0_sync",    0,              false},
194         { "audio1",     "i2s1_sync",    0,              false},
195         { "audio2",     "i2s2_sync",    0,              false},
196         { "audio3",     "i2s3_sync",    0,              false},
197         { "vi",         "pll_p",        0,              false},
198         { "vi_sensor",  "pll_p",        0,              false},
199         { "i2c5",       "pll_p",        3200000,        false},
200         { NULL,         NULL,           0,              0},
201 };
202
203 static __initdata struct tegra_clk_init_table enterprise_clk_i2s2_table[] = {
204         /* name         parent          rate            enabled */
205         { "i2s2",       "pll_a_out0",   0,              false},
206         { NULL,         NULL,           0,              0},
207 };
208
209 static __initdata struct tegra_clk_init_table enterprise_clk_i2s4_table[] = {
210         /* name         parent          rate            enabled */
211         { "i2s4",       "pll_a_out0",   0,              false},
212         { NULL,         NULL,           0,              0},
213 };
214
215 static struct aic3262_gpio_setup aic3262_gpio[] = {
216         /* GPIO 1*/
217         {
218                 .used           = 1,
219                 .in             = 0,
220                 .value          = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
221         },
222         /* GPIO 2*/
223         {
224                 .used           = 1,
225                 .in             = 0,
226                 .value          = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
227         },
228         /* GPIO 1 */
229         {
230                 .used           = 0,
231         },
232         {// GPI2
233                 .used           = 1,
234                 .in             = 1,
235                 .in_reg         = AIC3262_DMIC_INPUT_CNTL,
236                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
237                 .in_reg_shift   = AIC3262_DMIC_CONFIGURE_SHIFT,
238                 .value          = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
239         },
240         {// GPO1
241                 .used           = 0,
242                 .value          = AIC3262_GPO1_FUNC_DISABLED,
243         },
244 };
245
246 static struct aic3262_pdata aic3262_codec_pdata = {
247         .gpio_irq       = 1,
248         .gpio_reset     = TEGRA_GPIO_CODEC_RST,
249         .gpio           = aic3262_gpio,
250         .naudint_irq    = TEGRA_GPIO_HP_DET,
251         .irq_base       = AIC3262_CODEC_IRQ_BASE,
252 };
253
254 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
255         .adapter_nr     = 0,
256         .bus_count      = 1,
257         .bus_clk_rate   = { 100000, 0 },
258         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
259         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
260         .arb_recovery = arb_lost_recovery,
261 };
262
263 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
264         .adapter_nr     = 1,
265         .bus_count      = 1,
266         .bus_clk_rate   = { 400000, 0 },
267         .is_clkon_always = true,
268         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
269         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
270         .arb_recovery = arb_lost_recovery,
271 };
272
273 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
274         .adapter_nr     = 2,
275         .bus_count      = 1,
276         .bus_clk_rate   = { 271000, 0 },
277         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
278         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
279         .arb_recovery = arb_lost_recovery,
280 };
281
282 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
283         .adapter_nr     = 3,
284         .bus_count      = 1,
285         .bus_clk_rate   = { 10000, 0 },
286         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
287         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
288         .arb_recovery = arb_lost_recovery,
289 };
290
291 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
292         .adapter_nr     = 4,
293         .bus_count      = 1,
294         .bus_clk_rate   = { 390000, 0 },
295         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
296         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
297         .arb_recovery = arb_lost_recovery,
298 };
299
300 /* Equalizer filter coefs generated from the MAXIM MAX98088
301  * evkit software tool */
302 static struct max98088_eq_cfg max98088_eq_cfg[] = {
303         {
304                 .name = "FLAT",
305                 .rate = 44100,
306                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
307                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
308                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
309                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
310                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
311         },
312         {
313                 .name = "LOWPASS1K",
314                 .rate = 44100,
315                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
316                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
317                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
318                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
319                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
320         },
321         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
322                 .name = "HIBOOST",
323                 .rate = 44100,
324                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
325                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
326                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
327                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
328                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
329         },
330         { /* BASS=12dB, TREBLE=+12dB */
331                 .name = "LOUD12DB",
332                 .rate = 44100,
333                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
334                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
335                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
336                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
337                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
338         },
339         {
340                 .name = "FLAT",
341                 .rate = 16000,
342                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
343                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
344                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
345                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
346                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
347         },
348         {
349                 .name = "LOWPASS1K",
350                 .rate = 16000,
351                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
352                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
353                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
354                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
355                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
356         },
357         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
358                 .name = "HIBOOST",
359                 .rate = 16000,
360                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
361                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
362                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
363                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
364                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
365         },
366         { /* BASS=12dB, TREBLE=+12dB */
367                 .name = "LOUD12DB",
368                 .rate = 16000,
369                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
370                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
371                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
372                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
373                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
374         },
375 };
376
377
378 static struct max98088_pdata enterprise_max98088_pdata = {
379         /* equalizer configuration */
380         .eq_cfg = max98088_eq_cfg,
381         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
382
383         /* debounce time */
384         .debounce_time_ms = 200,
385
386         /* microphone configuration */
387         .digmic_left_mode = 1,
388         .digmic_right_mode = 1,
389
390         /* receiver output configuration */
391         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
392 };
393
394 static struct pn544_i2c_platform_data nfc_pdata = {
395                 .irq_gpio = TEGRA_GPIO_PS4,
396                 .ven_gpio = TEGRA_GPIO_PM6,
397                 .firm_gpio = 0,
398 };
399
400
401 static struct i2c_board_info __initdata max98088_board_info = {
402         I2C_BOARD_INFO("max98088", 0x10),
403         .platform_data = &enterprise_max98088_pdata,
404         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
405 };
406
407 static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
408         I2C_BOARD_INFO("tlv320aic3262", 0x18),
409         .platform_data = &aic3262_codec_pdata,
410         .irq = TEGRA_GPIO_HP_DET,
411 };
412
413 static struct i2c_board_info __initdata nfc_board_info = {
414         I2C_BOARD_INFO("pn544", 0x28),
415         .platform_data = &nfc_pdata,
416         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS4),
417 };
418
419 static void enterprise_i2c_init(void)
420 {
421         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
422         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
423         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
424         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
425         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
426
427         platform_device_register(&tegra_i2c_device5);
428         platform_device_register(&tegra_i2c_device4);
429         platform_device_register(&tegra_i2c_device3);
430         platform_device_register(&tegra_i2c_device2);
431         platform_device_register(&tegra_i2c_device1);
432
433         i2c_register_board_info(0, &max98088_board_info, 1);
434         i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
435         i2c_register_board_info(0, &nfc_board_info, 1);
436 }
437
438 static struct platform_device *enterprise_uart_devices[] __initdata = {
439         &tegra_uarta_device,
440         &tegra_uartb_device,
441         &tegra_uartc_device,
442         &tegra_uartd_device,
443         &tegra_uarte_device,
444 };
445
446 static struct uart_clk_parent uart_parent_clk[] = {
447         [0] = {.name = "clk_m"},
448         [1] = {.name = "pll_p"},
449 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
450         [2] = {.name = "pll_m"},
451 #endif
452 };
453 static struct tegra_uart_platform_data enterprise_uart_pdata;
454 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
455
456 static void __init uart_debug_init(void)
457 {
458         unsigned long rate;
459         struct clk *c;
460
461         /* UARTD is the debug port. */
462         pr_info("Selecting UARTD as the debug console\n");
463         enterprise_uart_devices[3] = &debug_uartd_device;
464         debug_uart_port_base = ((struct plat_serial8250_port *)(
465                         debug_uartd_device.dev.platform_data))->mapbase;
466         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
467
468         /* Clock enable for the debug channel */
469         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
470                 rate = ((struct plat_serial8250_port *)(
471                         debug_uartd_device.dev.platform_data))->uartclk;
472                 pr_info("The debug console clock name is %s\n",
473                                                 debug_uart_clk->name);
474                 c = tegra_get_clock_by_name("pll_p");
475                 if (IS_ERR_OR_NULL(c))
476                         pr_err("Not getting the parent clock pll_p\n");
477                 else
478                         clk_set_parent(debug_uart_clk, c);
479
480                 clk_enable(debug_uart_clk);
481                 clk_set_rate(debug_uart_clk, rate);
482         } else {
483                 pr_err("Not getting the clock %s for debug console\n",
484                                 debug_uart_clk->name);
485         }
486 }
487
488 static void __init enterprise_uart_init(void)
489 {
490         int i;
491         struct clk *c;
492
493         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
494                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
495                 if (IS_ERR_OR_NULL(c)) {
496                         pr_err("Not able to get the clock for %s\n",
497                                                 uart_parent_clk[i].name);
498                         continue;
499                 }
500                 uart_parent_clk[i].parent_clk = c;
501                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
502         }
503         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
504         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
505         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
506         enterprise_loopback_uart_pdata.parent_clk_count =
507                                                 ARRAY_SIZE(uart_parent_clk);
508         enterprise_loopback_uart_pdata.is_loopback = true;
509         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
510         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
511         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
512         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
513         /* UARTE is used for loopback test purpose */
514         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
515
516         /* Register low speed only if it is selected */
517         if (!is_tegra_debug_uartport_hs())
518                 uart_debug_init();
519
520         platform_add_devices(enterprise_uart_devices,
521                                 ARRAY_SIZE(enterprise_uart_devices));
522 }
523
524 static struct resource tegra_rtc_resources[] = {
525         [0] = {
526                 .start = TEGRA_RTC_BASE,
527                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
528                 .flags = IORESOURCE_MEM,
529         },
530         [1] = {
531                 .start = INT_RTC,
532                 .end = INT_RTC,
533                 .flags = IORESOURCE_IRQ,
534         },
535 };
536
537 static struct platform_device tegra_rtc_device = {
538         .name = "tegra_rtc",
539         .id   = -1,
540         .resource = tegra_rtc_resources,
541         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
542 };
543
544 static struct platform_device tegra_camera = {
545         .name = "tegra_camera",
546         .id = -1,
547 };
548
549 static struct tegra_asoc_platform_data enterprise_audio_pdata = {
550         .gpio_spkr_en           = -1,
551         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
552         .gpio_hp_mute           = -1,
553         .gpio_int_mic_en        = -1,
554         .gpio_ext_mic_en        = -1,
555         .debounce_time_hp       = -1,
556         /*defaults for Enterprise board*/
557         .i2s_param[HIFI_CODEC]  = {
558                 .audio_port_id  = 0,
559                 .is_i2s_master  = 0,
560                 .i2s_mode       = TEGRA_DAIFMT_I2S,
561                 .sample_size    = 16,
562         },
563         .i2s_param[BASEBAND]    = {
564                 .is_i2s_master  = 1,
565                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
566                 .sample_size    = 16,
567                 .rate           = 8000,
568                 .channels       = 1,
569         },
570         .i2s_param[BT_SCO]      = {
571                 .audio_port_id  = 3,
572                 .is_i2s_master  = 1,
573                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
574                 .sample_size    = 16,
575         },
576 };
577
578 static struct platform_device enterprise_audio_device = {
579         .name   = "tegra-snd-max98088",
580         .id     = 0,
581         .dev    = {
582                 .platform_data  = &enterprise_audio_pdata,
583         },
584 };
585
586 static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
587         .gpio_spkr_en           = -1,
588         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
589         .gpio_hp_mute           = -1,
590         .gpio_int_mic_en        = -1,
591         .gpio_ext_mic_en        = -1,
592         /*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
593         .i2s_param[HIFI_CODEC]  = {
594                 .audio_port_id  = 0,
595                 .is_i2s_master  = 1,
596                 .i2s_mode       = TEGRA_DAIFMT_I2S,
597                 .sample_size    = 16,
598         },
599         .i2s_param[BASEBAND]    = {
600                 .audio_port_id  = 2,
601                 .is_i2s_master  = 1,
602                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
603                 .sample_size    = 16,
604                 .rate           = 8000,
605                 .channels       = 1,
606         },
607         .i2s_param[BT_SCO]      = {
608                 .sample_size    = 16,
609                 .audio_port_id  = 3,
610                 .is_i2s_master  = 1,
611                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
612         },
613 };
614
615 static struct platform_device enterprise_audio_aic326x_device = {
616         .name   = "tegra-snd-aic326x",
617         .id     = 0,
618         .dev    = {
619                 .platform_data  = &enterprise_audio_aic326x_pdata,
620         },
621 };
622
623 static struct platform_device *enterprise_devices[] __initdata = {
624         &tegra_pmu_device,
625         &tegra_rtc_device,
626         &tegra_udc_device,
627 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
628         &tegra_smmu_device,
629 #endif
630         &tegra_wdt0_device,
631         &tegra_wdt1_device,
632         &tegra_wdt2_device,
633 #if defined(CONFIG_TEGRA_AVP)
634         &tegra_avp_device,
635 #endif
636         &tegra_camera,
637         &enterprise_bt_rfkill_device,
638         &tegra_spi_device4,
639         &tegra_hda_device,
640 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
641         &tegra_se_device,
642 #endif
643 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
644         &tegra_aes_device,
645 #endif
646 };
647
648 #define MXT_CONFIG_CRC 0x62F903
649 /*
650  * Config converted from memory-mapped cfg-file with
651  * following version information:
652  *
653  *
654  *
655  *      FAMILY_ID=128
656  *      VARIANT=1
657  *      VERSION=32
658  *      BUILD=170
659  *      VENDOR_ID=255
660  *      PRODUCT_ID=TBD
661  *      CHECKSUM=0xC189B6
662  *
663  *
664  */
665
666 static const u8 config[] = {
667         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
668         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
669         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
670         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
671         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
672         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
673         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
674         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
675         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
676         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
677         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
678         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
679         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
680         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
681         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
682         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
683         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
684         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
685         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
686         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
687         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
688         0x00
689 };
690
691 static struct mxt_platform_data atmel_mxt_info = {
692         .x_line         = 19,
693         .y_line         = 11,
694         .x_size         = 960,
695         .y_size         = 540,
696         .blen           = 0x10,
697         .threshold      = 0x32,
698         .voltage        = 3300000,              /* 3.3V */
699         .orient         = 3,
700         .config         = config,
701         .config_length  = 168,
702         .config_crc     = MXT_CONFIG_CRC,
703         .irqflags       = IRQF_TRIGGER_FALLING,
704 /*      .read_chg       = &read_chg, */
705         .read_chg       = NULL,
706 };
707
708 static struct i2c_board_info __initdata atmel_i2c_info[] = {
709         {
710                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
711                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH6),
712                 .platform_data = &atmel_mxt_info,
713         }
714 };
715
716 static int __init enterprise_touch_init(void)
717 {
718         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
719         gpio_direction_input(TEGRA_GPIO_PH6);
720
721         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
722         gpio_direction_output(TEGRA_GPIO_PF5, 0);
723         msleep(1);
724         gpio_set_value(TEGRA_GPIO_PF5, 1);
725         msleep(100);
726
727         i2c_register_board_info(1, atmel_i2c_info, 1);
728
729         return 0;
730 }
731
732 static void enterprise_usb_hsic_postsupend(void)
733 {
734         pr_debug("%s\n", __func__);
735 #ifdef CONFIG_TEGRA_BB_XMM_POWER
736         baseband_xmm_set_power_status(BBXMM_PS_L2);
737 #endif
738 }
739
740 static void enterprise_usb_hsic_preresume(void)
741 {
742         pr_debug("%s\n", __func__);
743 #ifdef CONFIG_TEGRA_BB_XMM_POWER
744         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
745 #endif
746 }
747
748 static void enterprise_usb_hsic_phy_power(void)
749 {
750         pr_debug("%s\n", __func__);
751 #ifdef CONFIG_TEGRA_BB_XMM_POWER
752         baseband_xmm_set_power_status(BBXMM_PS_L0);
753 #endif
754 }
755
756 static void enterprise_usb_hsic_post_phy_off(void)
757 {
758         pr_debug("%s\n", __func__);
759 #ifdef CONFIG_TEGRA_BB_XMM_POWER
760         baseband_xmm_set_power_status(BBXMM_PS_L2);
761 #endif
762 }
763
764 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
765         .post_suspend = enterprise_usb_hsic_postsupend,
766         .pre_resume = enterprise_usb_hsic_preresume,
767         .port_power = enterprise_usb_hsic_phy_power,
768         .post_phy_on = enterprise_usb_hsic_phy_power,
769         .post_phy_off = enterprise_usb_hsic_post_phy_off,
770 };
771
772 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
773         .port_otg = false,
774         .has_hostpc = true,
775         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
776         .op_mode        = TEGRA_USB_OPMODE_HOST,
777         .u_data.host = {
778                 .vbus_gpio = -1,
779                 .hot_plug = false,
780                 .remote_wakeup_supported = false,
781                 .power_off_on_suspend = false,
782         },
783         .ops = &hsic_xmm_plat_ops,
784 };
785
786 static struct tegra_usb_platform_data tegra_udc_pdata = {
787         .port_otg = true,
788         .has_hostpc = true,
789         .builtin_host_disabled = true,
790         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
791         .op_mode = TEGRA_USB_OPMODE_DEVICE,
792         .u_data.dev = {
793                 .vbus_pmu_irq = ENT_TPS80031_IRQ_BASE +
794                                 TPS80031_INT_VBUS_DET,
795                 .vbus_gpio = -1,
796                 .charging_supported = false,
797                 .remote_wakeup_supported = false,
798         },
799         .u_cfg.utmi = {
800                 .hssync_start_delay = 0,
801                 .elastic_limit = 16,
802                 .idle_wait_delay = 17,
803                 .term_range_adj = 6,
804                 .xcvr_setup = 8,
805                 .xcvr_lsfslew = 2,
806                 .xcvr_lsrslew = 2,
807                 .xcvr_setup_offset = 0,
808                 .xcvr_use_fuses = 1,
809         },
810 };
811
812 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
813         .port_otg = true,
814         .has_hostpc = true,
815         .builtin_host_disabled = true,
816         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
817         .op_mode = TEGRA_USB_OPMODE_HOST,
818         .u_data.host = {
819                 .vbus_gpio = -1,
820                 .vbus_reg = "usb_vbus",
821                 .hot_plug = true,
822                 .remote_wakeup_supported = true,
823                 .power_off_on_suspend = true,
824         },
825         .u_cfg.utmi = {
826                 .hssync_start_delay = 0,
827                 .elastic_limit = 16,
828                 .idle_wait_delay = 17,
829                 .term_range_adj = 6,
830                 .xcvr_setup = 15,
831                 .xcvr_lsfslew = 2,
832                 .xcvr_lsrslew = 2,
833                 .xcvr_setup_offset = 0,
834                 .xcvr_use_fuses = 1,
835         },
836 };
837
838 static struct tegra_usb_otg_data tegra_otg_pdata = {
839         .ehci_device = &tegra_ehci1_device,
840         .ehci_pdata = &tegra_ehci1_utmi_pdata,
841 };
842
843 struct platform_device *tegra_usb_hsic_host_register(void)
844 {
845         struct platform_device *pdev;
846         int val;
847
848         pdev = platform_device_alloc(tegra_ehci2_device.name,
849                 tegra_ehci2_device.id);
850         if (!pdev)
851                 return NULL;
852
853         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
854                 tegra_ehci2_device.num_resources);
855         if (val)
856                 goto error;
857
858         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
859         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
860
861         val = platform_device_add_data(pdev, &tegra_ehci2_hsic_xmm_pdata,
862                         sizeof(struct tegra_usb_platform_data));
863         if (val)
864                 goto error;
865
866         val = platform_device_add(pdev);
867         if (val)
868                 goto error;
869
870         return pdev;
871
872 error:
873         pr_err("%s: failed to add the host contoller device\n", __func__);
874         platform_device_put(pdev);
875         return NULL;
876 }
877
878 void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
879 {
880         struct platform_device *pdev = *platdev;
881
882         if (pdev && &pdev->dev) {
883                 platform_device_unregister(pdev);
884                 *platdev = NULL;
885         } else
886                 pr_err("%s: no platform device\n", __func__);
887 }
888
889 static void enterprise_usb_init(void)
890 {
891         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
892
893         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
894         platform_device_register(&tegra_otg_device);
895 }
896
897 static struct platform_device *enterprise_audio_devices[] __initdata = {
898         &tegra_ahub_device,
899         &tegra_dam_device0,
900         &tegra_dam_device1,
901         &tegra_dam_device2,
902         &tegra_i2s_device0,
903         &tegra_i2s_device1,
904         &tegra_i2s_device3,
905         &tegra_spdif_device,
906         &spdif_dit_device,
907         &bluetooth_dit_device,
908         &baseband_dit_device,
909         &tegra_pcm_device,
910         &enterprise_audio_device,
911         &enterprise_audio_aic326x_device,
912 };
913
914 static void enterprise_audio_init(void)
915 {
916         struct board_info board_info;
917
918         tegra_get_board_info(&board_info);
919
920         if (board_info.board_id == BOARD_E1239) {
921                 enterprise_audio_aic326x_pdata.i2s_param[BASEBAND].
922                                         audio_port_id = 4;
923                 enterprise_audio_aic326x_pdata.i2s_param[BASEBAND].
924                                         i2s_mode        = TEGRA_DAIFMT_I2S;
925                 enterprise_audio_aic326x_pdata.i2s_param[BASEBAND].
926                                         channels        = 2;
927                 platform_device_register(&tegra_i2s_device4);
928         } else {
929                 if (board_info.board_id == BOARD_E1197)
930                         enterprise_audio_pdata.i2s_param[HIFI_CODEC].
931                                         audio_port_id = 1;
932                 else if (board_info.fab == BOARD_FAB_A04) {
933                         enterprise_audio_pdata.i2s_param[BASEBAND].
934                                         audio_port_id = 4;
935                         platform_device_register(&tegra_i2s_device4);
936                 } else {
937                         enterprise_audio_pdata.i2s_param[BASEBAND].
938                                         audio_port_id = 2;
939                         platform_device_register(&tegra_i2s_device2);
940                 }
941
942         }
943         platform_add_devices(enterprise_audio_devices,
944                 ARRAY_SIZE(enterprise_audio_devices));
945 }
946
947
948 static struct baseband_power_platform_data tegra_baseband_power_data = {
949         .baseband_type = BASEBAND_XMM,
950         .modem = {
951                 .xmm = {
952                         .bb_rst = XMM_GPIO_BB_RST,
953                         .bb_on = XMM_GPIO_BB_ON,
954                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
955                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
956                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
957                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
958                 },
959         },
960 };
961
962 static struct platform_device tegra_baseband_power_device = {
963         .name = "baseband_xmm_power",
964         .id = -1,
965         .dev = {
966                 .platform_data = &tegra_baseband_power_data,
967         },
968 };
969
970 static struct platform_device tegra_baseband_power2_device = {
971         .name = "baseband_xmm_power2",
972         .id = -1,
973         .dev = {
974                 .platform_data = &tegra_baseband_power_data,
975         },
976 };
977
978 #ifdef CONFIG_TEGRA_BB_M7400
979 static union tegra_bb_gpio_id m7400_gpio_id = {
980         .m7400 = {
981                 .pwr_status = GPIO_BB_RESET,
982                 .pwr_on = GPIO_BB_PWRON,
983                 .uart_awr = GPIO_BB_APACK,
984                 .uart_cwr = GPIO_BB_CPACK,
985                 .usb_awr = GPIO_BB_APACK2,
986                 .usb_cwr = GPIO_BB_CPACK2,
987                 .service = GPIO_BB_RSVD2,
988                 .resout2 = GPIO_BB_RSVD1,
989         },
990 };
991
992 static struct tegra_bb_pdata m7400_pdata = {
993         .id = &m7400_gpio_id,
994         .device = &tegra_ehci2_device,
995         .ehci_register = tegra_usb_hsic_host_register,
996         .ehci_unregister = tegra_usb_hsic_host_unregister,
997         .bb_id = TEGRA_BB_M7400,
998 };
999
1000 static struct platform_device tegra_baseband_m7400_device = {
1001         .name = "tegra_baseband_power",
1002         .id = -1,
1003         .dev = {
1004                 .platform_data = &m7400_pdata,
1005         },
1006 };
1007 #endif
1008
1009 static void enterprise_baseband_init(void)
1010 {
1011         struct board_info board_info;
1012
1013         int modem_id = tegra_get_modem_id();
1014
1015         tegra_get_board_info(&board_info);
1016
1017         switch (modem_id) {
1018         case TEGRA_BB_PH450: /* PH450 ULPI */
1019                 enterprise_modem_init();
1020                 break;
1021         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
1022                 /* baseband-power.ko will register ehci2 device */
1023                 tegra_ehci2_device.dev.platform_data =
1024                                         &tegra_ehci2_hsic_xmm_pdata;
1025                 tegra_baseband_power_data.hsic_register =
1026                                                 &tegra_usb_hsic_host_register;
1027                 tegra_baseband_power_data.hsic_unregister =
1028                                                 &tegra_usb_hsic_host_unregister;
1029                 if ((board_info.board_id == BOARD_E1239) &&
1030                         (board_info.fab <= BOARD_FAB_A02)) {
1031                         tegra_baseband_power_data.modem.
1032                                 xmm.ipc_hsic_active  = BB_GPIO_LCD_PWR2;
1033                         tegra_baseband_power_data.modem.
1034                                 xmm.ipc_hsic_sus_req = BB_GPIO_LCD_PWR1;
1035                 }
1036                 platform_device_register(&tegra_baseband_power_device);
1037                 platform_device_register(&tegra_baseband_power2_device);
1038                 break;
1039 #ifdef CONFIG_TEGRA_BB_M7400
1040         case TEGRA_BB_M7400: /* M7400 HSIC */
1041                 tegra_ehci2_hsic_xmm_pdata.u_data.host.power_off_on_suspend = 0;
1042                 tegra_ehci2_device.dev.platform_data
1043                         = &tegra_ehci2_hsic_xmm_pdata;
1044                 platform_device_register(&tegra_baseband_m7400_device);
1045                 break;
1046 #endif
1047         }
1048 }
1049 static void enterprise_nfc_init(void)
1050 {
1051         struct board_info bi;
1052
1053         /* Enable firmware GPIO PX7 for board E1205 */
1054         tegra_get_board_info(&bi);
1055         if (bi.board_id == BOARD_E1205 && bi.fab >= BOARD_FAB_A03) {
1056                 nfc_pdata.firm_gpio = TEGRA_GPIO_PX7;
1057         } else if (bi.board_id == BOARD_E1239) {
1058                 nfc_pdata.firm_gpio = TEGRA_GPIO_PN6;
1059         }
1060 }
1061
1062 static void __init tegra_enterprise_init(void)
1063 {
1064         struct board_info board_info;
1065         tegra_get_board_info(&board_info);
1066         if (board_info.fab == BOARD_FAB_A04)
1067                 tegra_clk_init_from_table(enterprise_clk_i2s4_table);
1068         else
1069                 tegra_clk_init_from_table(enterprise_clk_i2s2_table);
1070
1071         tegra_thermal_init(&thermal_data,
1072                                 throttle_list,
1073                                 ARRAY_SIZE(throttle_list));
1074         tegra_clk_init_from_table(enterprise_clk_init_table);
1075         enterprise_pinmux_init();
1076         enterprise_i2c_init();
1077         enterprise_uart_init();
1078         enterprise_usb_init();
1079         if (board_info.board_id == BOARD_E1239)
1080                 enterprise_bt_rfkill_pdata[0].shutdown_gpio = TEGRA_GPIO_PF4;
1081
1082         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
1083         tegra_ram_console_debug_init();
1084         enterprise_regulator_init();
1085         tegra_io_dpd_init();
1086         enterprise_sdhci_init();
1087 #ifdef CONFIG_TEGRA_EDP_LIMITS
1088         enterprise_edp_init();
1089 #endif
1090         enterprise_kbc_init();
1091         enterprise_nfc_init();
1092         enterprise_touch_init();
1093         enterprise_audio_init();
1094         enterprise_baseband_init();
1095         enterprise_panel_init();
1096         enterprise_setup_bluesleep();
1097         enterprise_emc_init();
1098         enterprise_sensors_init();
1099         enterprise_suspend_init();
1100         enterprise_bpc_mgmt_init();
1101         tegra_release_bootloader_fb();
1102         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1103 }
1104
1105 static void __init tegra_enterprise_reserve(void)
1106 {
1107 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1108         tegra_reserve(0, SZ_4M, SZ_8M);
1109 #else
1110         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
1111 #endif
1112         tegra_ram_console_debug_reserve(SZ_1M);
1113 }
1114
1115 static const char *enterprise_dt_board_compat[] = {
1116         "nvidia,enterprise",
1117         NULL
1118 };
1119
1120 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
1121         .boot_params    = 0x80000100,
1122         .map_io         = tegra_map_common_io,
1123         .reserve        = tegra_enterprise_reserve,
1124         .init_early     = tegra_init_early,
1125         .init_irq       = tegra_init_irq,
1126         .timer          = &tegra_timer,
1127         .init_machine   = tegra_enterprise_init,
1128         .dt_compat      = enterprise_dt_board_compat,
1129 MACHINE_END