ARM: tegra: wdt: Replace legacy WDT with CPU WDTs
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/memblock.h>
40 #include <linux/rfkill-gpio.h>
41 #include <linux/nfc/pn544.h>
42
43 #include <sound/max98088.h>
44
45 #include <asm/hardware/gic.h>
46
47 #include <mach/clk.h>
48 #include <mach/iomap.h>
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/usb_phy.h>
54 #include <mach/i2s.h>
55 #include <mach/tegra_asoc_pdata.h>
56 #include <mach/thermal.h>
57 #include <mach/tegra-bb-power.h>
58 #include <mach/gpio-tegra.h>
59
60 #include <asm/mach-types.h>
61 #include <asm/hardware/gic.h>
62 #include <asm/mach/arch.h>
63
64 #include "board.h"
65 #include "clock.h"
66 #include "board-enterprise.h"
67 #include "baseband-xmm-power.h"
68 #include "devices.h"
69 #include "gpio-names.h"
70 #include "fuse.h"
71 #include "pm.h"
72 #include "common.h"
73
74 static struct balanced_throttle throttle_list[] = {
75         {
76                 .id = BALANCED_THROTTLE_ID_TJ,
77                 .throt_tab_size = 10,
78                 .throt_tab = {
79                         {      0, 1000 },
80                         { 640000, 1000 },
81                         { 640000, 1000 },
82                         { 640000, 1000 },
83                         { 640000, 1000 },
84                         { 640000, 1000 },
85                         { 760000, 1000 },
86                         { 760000, 1050 },
87                         {1000000, 1050 },
88                         {1000000, 1100 },
89                 },
90         },
91 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
92         {
93                 .id = BALANCED_THROTTLE_ID_SKIN,
94                 .throt_tab_size = 6,
95                 .throt_tab = {
96                         { 640000, 1200 },
97                         { 640000, 1200 },
98                         { 760000, 1200 },
99                         { 760000, 1200 },
100                         {1000000, 1200 },
101                         {1000000, 1200 },
102                 },
103         },
104 #endif
105 };
106
107 /* All units are in millicelsius */
108 static struct tegra_thermal_data thermal_data = {
109         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
110         .temp_shutdown = 90000,
111 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
112         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
113 #endif
114 #ifdef CONFIG_TEGRA_EDP_LIMITS
115         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
116         .hysteresis_edp = 3000,
117 #endif
118 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
119         .temp_throttle = 85000,
120         .tc1 = 0,
121         .tc2 = 1,
122         .passive_delay = 2000,
123 #endif
124 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
125         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
126         .temp_throttle_skin = 43000,
127 #endif
128 };
129
130 static struct rfkill_gpio_platform_data enterprise_bt_rfkill_pdata[] = {
131         {
132                 .name           = "bt_rfkill",
133                 .shutdown_gpio  = TEGRA_GPIO_PE6,
134                 .reset_gpio     = TEGRA_GPIO_INVALID,
135                 .type           = RFKILL_TYPE_BLUETOOTH,
136         },
137 };
138
139 static struct platform_device enterprise_bt_rfkill_device = {
140         .name = "rfkill_gpio",
141         .id             = -1,
142         .dev = {
143                 .platform_data = &enterprise_bt_rfkill_pdata,
144         },
145 };
146
147 static struct resource enterprise_bluesleep_resources[] = {
148         [0] = {
149                 .name = "gpio_host_wake",
150                         .start  = TEGRA_GPIO_PS2,
151                         .end    = TEGRA_GPIO_PS2,
152                         .flags  = IORESOURCE_IO,
153         },
154         [1] = {
155                 .name = "gpio_ext_wake",
156                         .start  = TEGRA_GPIO_PE7,
157                         .end    = TEGRA_GPIO_PE7,
158                         .flags  = IORESOURCE_IO,
159         },
160         [2] = {
161                 .name = "host_wake",
162                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
163         },
164 };
165
166 static struct platform_device enterprise_bluesleep_device = {
167         .name           = "bluesleep",
168         .id             = -1,
169         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
170         .resource       = enterprise_bluesleep_resources,
171 };
172
173 static void __init enterprise_setup_bluesleep(void)
174 {
175         enterprise_bluesleep_resources[2].start =
176                 enterprise_bluesleep_resources[2].end =
177                         gpio_to_irq(TEGRA_GPIO_PS2);
178         platform_device_register(&enterprise_bluesleep_device);
179         return;
180 }
181
182 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
183         /* name         parent          rate            enabled */
184         { "pll_m",      NULL,           0,              false},
185         { "hda",        "pll_p",        108000000,      false},
186         { "hda2codec_2x","pll_p",       48000000,       false},
187         { "pwm",        "pll_p",        3187500,        false},
188         { "blink",      "clk_32k",      32768,          true},
189         { "i2s0",       "pll_a_out0",   0,              false},
190         { "i2s1",       "pll_a_out0",   0,              false},
191         { "i2s2",       "pll_a_out0",   0,              false},
192         { "i2s3",       "pll_a_out0",   0,              false},
193         { "spdif_out",  "pll_a_out0",   0,              false},
194         { "d_audio",    "clk_m",        12000000,       false},
195         { "dam0",       "clk_m",        12000000,       false},
196         { "dam1",       "clk_m",        12000000,       false},
197         { "dam2",       "clk_m",        12000000,       false},
198         { "audio0",     "i2s0_sync",    0,              false},
199         { "audio1",     "i2s1_sync",    0,              false},
200         { "audio2",     "i2s2_sync",    0,              false},
201         { "audio3",     "i2s3_sync",    0,              false},
202         { "vi",         "pll_p",        0,              false},
203         { "vi_sensor",  "pll_p",        0,              false},
204         { NULL,         NULL,           0,              0},
205 };
206
207 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
208         .adapter_nr     = 0,
209         .bus_count      = 1,
210         .bus_clk_rate   = { 100000, 0 },
211         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
212         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
213         .arb_recovery = arb_lost_recovery,
214 };
215
216 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
217         .adapter_nr     = 1,
218         .bus_count      = 1,
219         .bus_clk_rate   = { 400000, 0 },
220         .is_clkon_always = true,
221         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
222         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
223         .arb_recovery = arb_lost_recovery,
224 };
225
226 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
227         .adapter_nr     = 2,
228         .bus_count      = 1,
229         .bus_clk_rate   = { 271000, 0 },
230         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
231         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
232         .arb_recovery = arb_lost_recovery,
233 };
234
235 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
236         .adapter_nr     = 3,
237         .bus_count      = 1,
238         .bus_clk_rate   = { 10000, 0 },
239         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
240         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
241         .arb_recovery = arb_lost_recovery,
242 };
243
244 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
245         .adapter_nr     = 4,
246         .bus_count      = 1,
247         .bus_clk_rate   = { 400000, 0 },
248         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
249         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
250         .arb_recovery = arb_lost_recovery,
251 };
252
253 /* Equalizer filter coefs generated from the MAXIM MAX98088
254  * evkit software tool */
255 static struct max98088_eq_cfg max98088_eq_cfg[] = {
256         {
257                 .name = "FLAT",
258                 .rate = 44100,
259                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
260                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
261                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
262                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
263                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
264         },
265         {
266                 .name = "LOWPASS1K",
267                 .rate = 44100,
268                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
269                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
270                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
271                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
272                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
273         },
274         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
275                 .name = "HIBOOST",
276                 .rate = 44100,
277                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
278                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
279                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
280                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
281                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
282         },
283         { /* BASS=12dB, TREBLE=+12dB */
284                 .name = "LOUD12DB",
285                 .rate = 44100,
286                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
287                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
288                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
289                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
290                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
291         },
292         {
293                 .name = "FLAT",
294                 .rate = 16000,
295                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
296                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
297                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
298                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
299                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
300         },
301         {
302                 .name = "LOWPASS1K",
303                 .rate = 16000,
304                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
305                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
306                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
307                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
308                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
309         },
310         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
311                 .name = "HIBOOST",
312                 .rate = 16000,
313                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
314                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
315                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
316                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
317                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
318         },
319         { /* BASS=12dB, TREBLE=+12dB */
320                 .name = "LOUD12DB",
321                 .rate = 16000,
322                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
323                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
324                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
325                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
326                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
327         },
328 };
329
330
331 static struct max98088_pdata enterprise_max98088_pdata = {
332         /* equalizer configuration */
333         .eq_cfg = max98088_eq_cfg,
334         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
335
336         /* debounce time */
337         .debounce_time_ms = 200,
338
339         /* microphone configuration */
340         .digmic_left_mode = 1,
341         .digmic_right_mode = 1,
342
343         /* receiver output configuration */
344         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
345 };
346
347 static struct pn544_i2c_platform_data nfc_pdata = {
348                 .irq_gpio = TEGRA_GPIO_PS4,
349                 .ven_gpio = TEGRA_GPIO_PM6,
350                 .firm_gpio = 0,
351 };
352
353
354 static struct i2c_board_info __initdata max98088_board_info = {
355         I2C_BOARD_INFO("max98088", 0x10),
356         .platform_data = &enterprise_max98088_pdata,
357 };
358
359 static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
360         I2C_BOARD_INFO("aic3262-codec", 0x18),
361 };
362
363 static struct i2c_board_info __initdata nfc_board_info = {
364         I2C_BOARD_INFO("pn544", 0x28),
365         .platform_data = &nfc_pdata,
366 };
367
368 static void enterprise_i2c_init(void)
369 {
370         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
371         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
372         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
373         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
374         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
375
376         platform_device_register(&tegra_i2c_device5);
377         platform_device_register(&tegra_i2c_device4);
378         platform_device_register(&tegra_i2c_device3);
379         platform_device_register(&tegra_i2c_device2);
380         platform_device_register(&tegra_i2c_device1);
381
382         max98088_board_info.irq = enterprise_codec_aic326x_info.irq =
383                 gpio_to_irq(TEGRA_GPIO_HP_DET);
384         i2c_register_board_info(0, &max98088_board_info, 1);
385         i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
386         nfc_board_info.irq = gpio_to_irq(TEGRA_GPIO_PS4);
387         i2c_register_board_info(0, &nfc_board_info, 1);
388 }
389
390 static struct platform_device *enterprise_uart_devices[] __initdata = {
391         &tegra_uarta_device,
392         &tegra_uartb_device,
393         &tegra_uartc_device,
394         &tegra_uartd_device,
395         &tegra_uarte_device,
396 };
397
398 static struct uart_clk_parent uart_parent_clk[] = {
399         [0] = {.name = "clk_m"},
400         [1] = {.name = "pll_p"},
401 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
402         [2] = {.name = "pll_m"},
403 #endif
404 };
405 static struct tegra_uart_platform_data enterprise_uart_pdata;
406 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
407
408 static void __init uart_debug_init(void)
409 {
410         unsigned long rate;
411         struct clk *c;
412
413         /* UARTD is the debug port. */
414         pr_info("Selecting UARTD as the debug console\n");
415         enterprise_uart_devices[3] = &debug_uartd_device;
416         debug_uart_port_base = ((struct plat_serial8250_port *)(
417                         debug_uartd_device.dev.platform_data))->mapbase;
418         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
419
420         /* Clock enable for the debug channel */
421         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
422                 rate = ((struct plat_serial8250_port *)(
423                         debug_uartd_device.dev.platform_data))->uartclk;
424                 pr_info("The debug console clock name is %s\n",
425                                                 debug_uart_clk->name);
426                 c = tegra_get_clock_by_name("pll_p");
427                 if (IS_ERR_OR_NULL(c))
428                         pr_err("Not getting the parent clock pll_p\n");
429                 else
430                         clk_set_parent(debug_uart_clk, c);
431
432                 clk_enable(debug_uart_clk);
433                 clk_set_rate(debug_uart_clk, rate);
434         } else {
435                 pr_err("Not getting the clock %s for debug console\n",
436                                 debug_uart_clk->name);
437         }
438 }
439
440 static void __init enterprise_uart_init(void)
441 {
442         int i;
443         struct clk *c;
444
445         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
446                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
447                 if (IS_ERR_OR_NULL(c)) {
448                         pr_err("Not able to get the clock for %s\n",
449                                                 uart_parent_clk[i].name);
450                         continue;
451                 }
452                 uart_parent_clk[i].parent_clk = c;
453                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
454         }
455         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
456         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
457         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
458         enterprise_loopback_uart_pdata.parent_clk_count =
459                                                 ARRAY_SIZE(uart_parent_clk);
460         enterprise_loopback_uart_pdata.is_loopback = true;
461         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
462         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
463         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
464         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
465         /* UARTE is used for loopback test purpose */
466         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
467
468         /* Register low speed only if it is selected */
469         if (!is_tegra_debug_uartport_hs())
470                 uart_debug_init();
471
472         platform_add_devices(enterprise_uart_devices,
473                                 ARRAY_SIZE(enterprise_uart_devices));
474 }
475
476
477
478 static struct resource tegra_rtc_resources[] = {
479         [0] = {
480                 .start = TEGRA_RTC_BASE,
481                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
482                 .flags = IORESOURCE_MEM,
483         },
484         [1] = {
485                 .start = INT_RTC,
486                 .end = INT_RTC,
487                 .flags = IORESOURCE_IRQ,
488         },
489 };
490
491 static struct platform_device tegra_rtc_device = {
492         .name = "tegra_rtc",
493         .id   = -1,
494         .resource = tegra_rtc_resources,
495         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
496 };
497
498 static struct platform_device tegra_camera = {
499         .name = "tegra_camera",
500         .id = -1,
501 };
502
503 static struct tegra_asoc_platform_data enterprise_audio_pdata = {
504         .gpio_spkr_en           = -1,
505         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
506         .gpio_hp_mute           = -1,
507         .gpio_int_mic_en        = -1,
508         .gpio_ext_mic_en        = -1,
509         .debounce_time_hp = -1,
510         /*defaults for Enterprise board*/
511         .audio_port_id          = {
512                 [HIFI_CODEC] = 0,
513                 [BASEBAND] = 2,
514                 [BT_SCO] = 3,
515         },
516         .baseband_param         = {
517                 .rate = 8000,
518                 .channels = 1,
519         },
520 };
521
522 static struct platform_device enterprise_audio_device = {
523         .name   = "tegra-snd-max98088",
524         .id     = 0,
525         .dev    = {
526                 .platform_data  = &enterprise_audio_pdata,
527         },
528 };
529
530 static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
531         .gpio_spkr_en           = -1,
532         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
533         .gpio_hp_mute           = -1,
534         .gpio_int_mic_en        = -1,
535         .gpio_ext_mic_en        = -1,
536         /*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
537         .audio_port_id          = {
538                 [HIFI_CODEC] = 0,
539                 [BASEBAND] = 2,
540                 [BT_SCO] = 3,
541         },
542         .baseband_param         = {
543                 .rate = 8000,
544                 .channels = 1,
545                 .bit_format = TEGRA_DAIFMT_DSP_A,
546         },
547 };
548
549 static struct platform_device enterprise_audio_aic326x_device = {
550         .name   = "tegra-snd-aic326x",
551         .id     = 0,
552         .dev    = {
553                 .platform_data  = &enterprise_audio_aic326x_pdata,
554         },
555 };
556
557 static struct platform_device *enterprise_devices[] __initdata = {
558         &tegra_pmu_device,
559         &tegra_rtc_device,
560         &tegra_udc_device,
561 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
562         &tegra_smmu_device,
563 #endif
564         &tegra_wdt0_device,
565         &tegra_wdt1_device,
566         &tegra_wdt2_device,
567 #if defined(CONFIG_TEGRA_AVP)
568         &tegra_avp_device,
569 #endif
570         &tegra_camera,
571         &enterprise_bt_rfkill_device,
572         &tegra_spi_device4,
573         &tegra_hda_device,
574 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
575         &tegra_se_device,
576 #endif
577 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
578         &tegra_aes_device,
579 #endif
580 };
581
582 #define MXT_CONFIG_CRC 0x62F903
583 /*
584  * Config converted from memory-mapped cfg-file with
585  * following version information:
586  *
587  *
588  *
589  *      FAMILY_ID=128
590  *      VARIANT=1
591  *      VERSION=32
592  *      BUILD=170
593  *      VENDOR_ID=255
594  *      PRODUCT_ID=TBD
595  *      CHECKSUM=0xC189B6
596  *
597  *
598  */
599
600 static const u8 config[] = {
601         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
602         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
603         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
604         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
605         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
606         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
607         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
608         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
609         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
610         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
611         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
612         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
613         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
614         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
615         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
616         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
617         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
618         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
619         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
620         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
621         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
622         0x00
623 };
624
625 static struct mxt_platform_data atmel_mxt_info = {
626         .x_line         = 19,
627         .y_line         = 11,
628         .x_size         = 960,
629         .y_size         = 540,
630         .blen           = 0x10,
631         .threshold      = 0x32,
632         .voltage        = 3300000,              /* 3.3V */
633         .orient         = 3,
634         .config         = config,
635         .config_length  = 168,
636         .config_crc     = MXT_CONFIG_CRC,
637         .irqflags       = IRQF_TRIGGER_FALLING,
638 /*      .read_chg       = &read_chg, */
639         .read_chg       = NULL,
640 };
641
642 static struct i2c_board_info __initdata atmel_i2c_info[] = {
643         {
644                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
645                 .platform_data = &atmel_mxt_info,
646         }
647 };
648
649 static int __init enterprise_touch_init(void)
650 {
651         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
652         gpio_direction_input(TEGRA_GPIO_PH6);
653
654         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
655         gpio_direction_output(TEGRA_GPIO_PF5, 0);
656         msleep(1);
657         gpio_set_value(TEGRA_GPIO_PF5, 1);
658         msleep(100);
659
660         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH6);
661         i2c_register_board_info(1, atmel_i2c_info, 1);
662
663         return 0;
664 }
665
666 static void enterprise_usb_hsic_postsupend(void)
667 {
668         pr_debug("%s\n", __func__);
669 #ifdef CONFIG_TEGRA_BB_XMM_POWER
670         baseband_xmm_set_power_status(BBXMM_PS_L2);
671 #endif
672 }
673
674 static void enterprise_usb_hsic_preresume(void)
675 {
676         pr_debug("%s\n", __func__);
677 #ifdef CONFIG_TEGRA_BB_XMM_POWER
678         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
679 #endif
680 }
681
682 static void enterprise_usb_hsic_phy_power(void)
683 {
684         pr_debug("%s\n", __func__);
685 #ifdef CONFIG_TEGRA_BB_XMM_POWER
686         baseband_xmm_set_power_status(BBXMM_PS_L0);
687 #endif
688 }
689
690 static void enterprise_usb_hsic_post_phy_off(void)
691 {
692         pr_debug("%s\n", __func__);
693 #ifdef CONFIG_TEGRA_BB_XMM_POWER
694         baseband_xmm_set_power_status(BBXMM_PS_L2);
695 #endif
696 }
697
698 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
699         .post_suspend = enterprise_usb_hsic_postsupend,
700         .pre_resume = enterprise_usb_hsic_preresume,
701         .port_power = enterprise_usb_hsic_phy_power,
702         .post_phy_off = enterprise_usb_hsic_post_phy_off,
703 };
704
705 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
706         .port_otg = false,
707         .has_hostpc = true,
708         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
709         .op_mode        = TEGRA_USB_OPMODE_HOST,
710         .u_data.host = {
711                 .vbus_gpio = -1,
712                 .hot_plug = false,
713                 .remote_wakeup_supported = false,
714                 .power_off_on_suspend = false,
715         },
716         .u_cfg.hsic = {
717                 .sync_start_delay = 9,
718                 .idle_wait_delay = 17,
719                 .term_range_adj = 0,
720                 .elastic_underrun_limit = 16,
721                 .elastic_overrun_limit = 16,
722         },
723         .ops = &hsic_xmm_plat_ops,
724 };
725
726
727
728 static struct tegra_usb_platform_data tegra_udc_pdata = {
729         .port_otg = true,
730         .has_hostpc = true,
731         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
732         .op_mode = TEGRA_USB_OPMODE_DEVICE,
733         .u_data.dev = {
734                 .vbus_pmu_irq = ENT_TPS80031_IRQ_BASE +
735                                 TPS80031_INT_VBUS_DET,
736                 .vbus_gpio = -1,
737                 .charging_supported = false,
738                 .remote_wakeup_supported = false,
739         },
740         .u_cfg.utmi = {
741                 .hssync_start_delay = 0,
742                 .elastic_limit = 16,
743                 .idle_wait_delay = 17,
744                 .term_range_adj = 6,
745                 .xcvr_setup = 8,
746                 .xcvr_lsfslew = 2,
747                 .xcvr_lsrslew = 2,
748                 .xcvr_setup_offset = 0,
749                 .xcvr_use_fuses = 1,
750         },
751 };
752
753 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
754         .port_otg = true,
755         .has_hostpc = true,
756         .builtin_host_disabled = true,
757         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
758         .op_mode = TEGRA_USB_OPMODE_HOST,
759         .u_data.host = {
760                 .vbus_gpio = -1,
761                 .vbus_reg = "usb_vbus",
762                 .hot_plug = true,
763                 .remote_wakeup_supported = true,
764                 .power_off_on_suspend = true,
765         },
766         .u_cfg.utmi = {
767                 .hssync_start_delay = 0,
768                 .elastic_limit = 16,
769                 .idle_wait_delay = 17,
770                 .term_range_adj = 6,
771                 .xcvr_setup = 15,
772                 .xcvr_lsfslew = 2,
773                 .xcvr_lsrslew = 2,
774                 .xcvr_setup_offset = 0,
775                 .xcvr_use_fuses = 1,
776         },
777 };
778
779 static struct tegra_usb_otg_data tegra_otg_pdata = {
780         .ehci_device = &tegra_ehci1_device,
781         .ehci_pdata = &tegra_ehci1_utmi_pdata,
782 };
783
784 struct platform_device *tegra_usb_hsic_host_register(void)
785 {
786         struct platform_device *pdev;
787         int val;
788
789         pdev = platform_device_alloc(tegra_ehci2_device.name,
790                 tegra_ehci2_device.id);
791         if (!pdev)
792                 return NULL;
793
794         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
795                 tegra_ehci2_device.num_resources);
796         if (val)
797                 goto error;
798
799         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
800         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
801
802         val = platform_device_add_data(pdev, &tegra_ehci2_hsic_xmm_pdata,
803                         sizeof(struct tegra_usb_platform_data));
804         if (val)
805                 goto error;
806
807         val = platform_device_add(pdev);
808         if (val)
809                 goto error;
810
811         return pdev;
812
813 error:
814         pr_err("%s: failed to add the host contoller device\n", __func__);
815         platform_device_put(pdev);
816         return NULL;
817 }
818
819 void tegra_usb_hsic_host_unregister(struct platform_device *pdev)
820 {
821         platform_device_unregister(pdev);
822 }
823
824 static void enterprise_usb_init(void)
825 {
826         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
827
828         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
829         platform_device_register(&tegra_otg_device);
830 }
831
832 static struct platform_device *enterprise_audio_devices[] __initdata = {
833         &tegra_ahub_device,
834         &tegra_dam_device0,
835         &tegra_dam_device1,
836         &tegra_dam_device2,
837         &tegra_i2s_device0,
838         &tegra_i2s_device1,
839         &tegra_i2s_device2,
840         &tegra_i2s_device3,
841         &tegra_spdif_device,
842         &spdif_dit_device,
843         &bluetooth_dit_device,
844         &baseband_dit_device,
845         &tegra_pcm_device,
846         &enterprise_audio_device,
847         &enterprise_audio_aic326x_device,
848 };
849
850 static void enterprise_audio_init(void)
851 {
852         struct board_info board_info;
853
854         tegra_get_board_info(&board_info);
855
856         if (board_info.board_id == BOARD_E1197)
857                 enterprise_audio_pdata.audio_port_id[HIFI_CODEC] = 1;
858
859         platform_add_devices(enterprise_audio_devices,
860                         ARRAY_SIZE(enterprise_audio_devices));
861 }
862
863
864 static struct baseband_power_platform_data tegra_baseband_power_data = {
865         .baseband_type = BASEBAND_XMM,
866         .modem = {
867                 .xmm = {
868                         .bb_rst = XMM_GPIO_BB_RST,
869                         .bb_on = XMM_GPIO_BB_ON,
870                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
871                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
872                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
873                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
874                 },
875         },
876 };
877
878 static struct platform_device tegra_baseband_power_device = {
879         .name = "baseband_xmm_power",
880         .id = -1,
881         .dev = {
882                 .platform_data = &tegra_baseband_power_data,
883         },
884 };
885
886 static struct platform_device tegra_baseband_power2_device = {
887         .name = "baseband_xmm_power2",
888         .id = -1,
889         .dev = {
890                 .platform_data = &tegra_baseband_power_data,
891         },
892 };
893
894 #ifdef CONFIG_TEGRA_BB_M7400
895 static union tegra_bb_gpio_id m7400_gpio_id = {
896         .m7400 = {
897                 .pwr_status = GPIO_BB_RESET,
898                 .pwr_on = GPIO_BB_PWRON,
899                 .uart_awr = GPIO_BB_APACK,
900                 .uart_cwr = GPIO_BB_CPACK,
901                 .usb_awr = GPIO_BB_APACK2,
902                 .usb_cwr = GPIO_BB_CPACK2,
903                 .service = GPIO_BB_RSVD2,
904                 .resout2 = GPIO_BB_RSVD1,
905         },
906 };
907
908 static struct tegra_bb_pdata m7400_pdata = {
909         .id = &m7400_gpio_id,
910         .device = &tegra_ehci2_device,
911         .ehci_register = tegra_usb_hsic_host_register,
912         .ehci_unregister = tegra_usb_hsic_host_unregister,
913         .bb_id = TEGRA_BB_M7400,
914 };
915
916 static struct platform_device tegra_baseband_m7400_device = {
917         .name = "tegra_baseband_power",
918         .id = -1,
919         .dev = {
920                 .platform_data = &m7400_pdata,
921         },
922 };
923 #endif
924
925 static void enterprise_baseband_init(void)
926 {
927         int modem_id = tegra_get_modem_id();
928
929         switch (modem_id) {
930         case TEGRA_BB_PH450: /* PH450 ULPI */
931                 enterprise_modem_init();
932                 break;
933         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
934                 /* baseband-power.ko will register ehci2 device */
935                 tegra_ehci2_device.dev.platform_data =
936                                         &tegra_ehci2_hsic_xmm_pdata;
937                 tegra_baseband_power_data.hsic_register =
938                                                 &tegra_usb_hsic_host_register;
939                 tegra_baseband_power_data.hsic_unregister =
940                                                 &tegra_usb_hsic_host_unregister;
941
942                 platform_device_register(&tegra_baseband_power_device);
943                 platform_device_register(&tegra_baseband_power2_device);
944                 break;
945 #ifdef CONFIG_TEGRA_BB_M7400
946         case TEGRA_BB_M7400: /* M7400 HSIC */
947                 tegra_ehci2_hsic_xmm_pdata.u_data.host.power_off_on_suspend = 0;
948                 tegra_ehci2_device.dev.platform_data
949                         = &tegra_ehci2_hsic_xmm_pdata;
950                 platform_device_register(&tegra_baseband_m7400_device);
951                 break;
952 #endif
953         }
954 }
955 static void enterprise_nfc_init(void)
956 {
957         struct board_info bi;
958
959         /* Enable firmware GPIO PX7 for board E1205 */
960         tegra_get_board_info(&bi);
961         if (bi.board_id == BOARD_E1205 && bi.fab >= BOARD_FAB_A03) {
962                 nfc_pdata.firm_gpio = TEGRA_GPIO_PX7;
963         }
964 }
965
966 static void __init tegra_enterprise_init(void)
967 {
968         tegra_thermal_init(&thermal_data,
969                                 throttle_list,
970                                 ARRAY_SIZE(throttle_list));
971         tegra_clk_init_from_table(enterprise_clk_init_table);
972         tegra_enable_pinmux();
973         enterprise_pinmux_init();
974         enterprise_i2c_init();
975         enterprise_uart_init();
976         enterprise_usb_init();
977         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
978         tegra_ram_console_debug_init();
979         enterprise_regulator_init();
980         enterprise_sdhci_init();
981 #ifdef CONFIG_TEGRA_EDP_LIMITS
982         enterprise_edp_init();
983 #endif
984         enterprise_kbc_init();
985         enterprise_nfc_init();
986         enterprise_touch_init();
987         enterprise_audio_init();
988         enterprise_baseband_init();
989         enterprise_panel_init();
990         enterprise_setup_bluesleep();
991         enterprise_emc_init();
992         enterprise_sensors_init();
993         enterprise_suspend_init();
994         enterprise_bpc_mgmt_init();
995         tegra_release_bootloader_fb();
996 }
997
998 static void __init tegra_enterprise_reserve(void)
999 {
1000 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1001         tegra_reserve(0, SZ_4M, SZ_8M);
1002 #else
1003         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
1004 #endif
1005         tegra_ram_console_debug_reserve(SZ_1M);
1006 }
1007
1008 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
1009         .atag_offset    = 0x100,
1010         .soc            = &tegra_soc_desc,
1011         .map_io         = tegra_map_common_io,
1012         .reserve        = tegra_enterprise_reserve,
1013         .init_early     = tegra30_init_early,
1014         .init_irq       = tegra_init_irq,
1015         .handle_irq     = gic_handle_irq,
1016         .timer          = &tegra_timer,
1017         .init_machine   = tegra_enterprise_init,
1018         .restart        = tegra_assert_system_reset,
1019 MACHINE_END