a53326850550465a45fb7aa18db7070e9f720491
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/memblock.h>
40
41 #include <linux/nfc/pn544.h>
42 #include <sound/max98088.h>
43
44 #include <mach/clk.h>
45 #include <mach/iomap.h>
46 #include <mach/irqs.h>
47 #include <mach/pinmux.h>
48 #include <mach/iomap.h>
49 #include <mach/io.h>
50 #include <asm/mach-types.h>
51 #include <asm/mach/arch.h>
52 #include <mach/usb_phy.h>
53 #include <mach/i2s.h>
54 #include <mach/tegra_asoc_pdata.h>
55 #include <mach/thermal.h>
56 #include <mach/tegra-bb-power.h>
57 #include "board.h"
58 #include "clock.h"
59 #include "board-enterprise.h"
60 #include "baseband-xmm-power.h"
61 #include "devices.h"
62 #include "gpio-names.h"
63 #include "fuse.h"
64 #include "pm.h"
65
66 /* All units are in millicelsius */
67 static struct tegra_thermal_data thermal_data = {
68         .temp_throttle = 85000,
69         .temp_shutdown = 90000,
70         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
71 #ifdef CONFIG_TEGRA_EDP_LIMITS
72         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
73         .hysteresis_edp = 3000,
74 #endif
75 #ifdef CONFIG_TEGRA_THERMAL_SYSFS
76         .tc1 = 0,
77         .tc2 = 1,
78         .passive_delay = 2000,
79 #else
80         .hysteresis_throttle = 1000,
81 #endif
82 };
83
84 /* !!!TODO: Change for enterprise (Taken from Cardhu) */
85 static struct tegra_utmip_config utmi_phy_config[] = {
86         [0] = {
87                         .hssync_start_delay = 0,
88                         .idle_wait_delay = 17,
89                         .elastic_limit = 16,
90                         .term_range_adj = 6,
91                         .xcvr_setup = 15,
92                         .xcvr_setup_offset = 0,
93                         .xcvr_use_fuses = 1,
94                         .xcvr_lsfslew = 2,
95                         .xcvr_lsrslew = 2,
96         },
97         [1] = {
98                         .hssync_start_delay = 0,
99                         .idle_wait_delay = 17,
100                         .elastic_limit = 16,
101                         .term_range_adj = 6,
102                         .xcvr_setup = 15,
103                         .xcvr_setup_offset = 0,
104                         .xcvr_use_fuses = 1,
105                         .xcvr_lsfslew = 2,
106                         .xcvr_lsrslew = 2,
107         },
108         [2] = {
109                         .hssync_start_delay = 0,
110                         .idle_wait_delay = 17,
111                         .elastic_limit = 16,
112                         .term_range_adj = 6,
113                         .xcvr_setup = 8,
114                         .xcvr_setup_offset = 0,
115                         .xcvr_use_fuses = 1,
116                         .xcvr_lsfslew = 2,
117                         .xcvr_lsrslew = 2,
118         },
119 };
120
121 static struct resource enterprise_bcm4329_rfkill_resources[] = {
122         {
123                 .name   = "bcm4329_nshutdown_gpio",
124                 .start  = TEGRA_GPIO_PE6,
125                 .end    = TEGRA_GPIO_PE6,
126                 .flags  = IORESOURCE_IO,
127         },
128 };
129
130 static struct platform_device enterprise_bcm4329_rfkill_device = {
131         .name = "bcm4329_rfkill",
132         .id             = -1,
133         .num_resources  = ARRAY_SIZE(enterprise_bcm4329_rfkill_resources),
134         .resource       = enterprise_bcm4329_rfkill_resources,
135 };
136
137 static struct resource enterprise_bluesleep_resources[] = {
138         [0] = {
139                 .name = "gpio_host_wake",
140                         .start  = TEGRA_GPIO_PS2,
141                         .end    = TEGRA_GPIO_PS2,
142                         .flags  = IORESOURCE_IO,
143         },
144         [1] = {
145                 .name = "gpio_ext_wake",
146                         .start  = TEGRA_GPIO_PE7,
147                         .end    = TEGRA_GPIO_PE7,
148                         .flags  = IORESOURCE_IO,
149         },
150         [2] = {
151                 .name = "host_wake",
152                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
153                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
154                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
155         },
156 };
157
158 static struct platform_device enterprise_bluesleep_device = {
159         .name           = "bluesleep",
160         .id             = -1,
161         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
162         .resource       = enterprise_bluesleep_resources,
163 };
164
165 static void __init enterprise_setup_bluesleep(void)
166 {
167         platform_device_register(&enterprise_bluesleep_device);
168         tegra_gpio_enable(TEGRA_GPIO_PS2);
169         tegra_gpio_enable(TEGRA_GPIO_PE7);
170         return;
171 }
172
173 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
174         /* name         parent          rate            enabled */
175         { "pll_m",      NULL,           0,              false},
176         { "hda",        "pll_p",        108000000,      false},
177         { "hda2codec_2x","pll_p",       48000000,       false},
178         { "pwm",        "clk_32k",      32768,          false},
179         { "blink",      "clk_32k",      32768,          true},
180         { "i2s0",       "pll_a_out0",   0,              false},
181         { "i2s1",       "pll_a_out0",   0,              false},
182         { "i2s2",       "pll_a_out0",   0,              false},
183         { "i2s3",       "pll_a_out0",   0,              false},
184         { "spdif_out",  "pll_a_out0",   0,              false},
185         { "d_audio",    "clk_m",        12000000,       false},
186         { "dam0",       "clk_m",        12000000,       false},
187         { "dam1",       "clk_m",        12000000,       false},
188         { "dam2",       "clk_m",        12000000,       false},
189         { "audio0",     "i2s0_sync",    0,              false},
190         { "audio1",     "i2s1_sync",    0,              false},
191         { "audio2",     "i2s2_sync",    0,              false},
192         { "audio3",     "i2s3_sync",    0,              false},
193         { "vi",         "pll_p",        0,              false},
194         { "vi_sensor",  "pll_p",        0,              false},
195         { NULL,         NULL,           0,              0},
196 };
197
198 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
199         .adapter_nr     = 0,
200         .bus_count      = 1,
201         .bus_clk_rate   = { 100000, 0 },
202         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
203         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
204         .arb_recovery = arb_lost_recovery,
205 };
206
207 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
208         .adapter_nr     = 1,
209         .bus_count      = 1,
210         .bus_clk_rate   = { 100000, 0 },
211         .is_clkon_always = true,
212         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
213         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
214         .arb_recovery = arb_lost_recovery,
215 };
216
217 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
218         .adapter_nr     = 2,
219         .bus_count      = 1,
220         .bus_clk_rate   = { 271000, 0 },
221         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
222         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
223         .arb_recovery = arb_lost_recovery,
224 };
225
226 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
227         .adapter_nr     = 3,
228         .bus_count      = 1,
229         .bus_clk_rate   = { 100000, 0 },
230         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
231         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
232         .arb_recovery = arb_lost_recovery,
233 };
234
235 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
236         .adapter_nr     = 4,
237         .bus_count      = 1,
238         .bus_clk_rate   = { 100000, 0 },
239         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
240         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
241         .arb_recovery = arb_lost_recovery,
242 };
243
244 /* Equalizer filter coefs generated from the MAXIM MAX98088
245  * evkit software tool */
246 static struct max98088_eq_cfg max98088_eq_cfg[] = {
247         {
248                 .name = "FLAT",
249                 .rate = 44100,
250                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
251                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
252                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
253                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
254                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
255         },
256         {
257                 .name = "LOWPASS1K",
258                 .rate = 44100,
259                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
260                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
261                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
262                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
263                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
264         },
265         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
266                 .name = "HIBOOST",
267                 .rate = 44100,
268                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
269                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
270                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
271                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
272                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
273         },
274         { /* BASS=12dB, TREBLE=+12dB */
275                 .name = "LOUD12DB",
276                 .rate = 44100,
277                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
278                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
279                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
280                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
281                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
282         },
283         {
284                 .name = "FLAT",
285                 .rate = 16000,
286                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
287                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
288                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
289                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
290                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
291         },
292         {
293                 .name = "LOWPASS1K",
294                 .rate = 16000,
295                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
296                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
297                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
298                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
299                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
300         },
301         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
302                 .name = "HIBOOST",
303                 .rate = 16000,
304                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
305                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
306                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
307                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
308                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
309         },
310         { /* BASS=12dB, TREBLE=+12dB */
311                 .name = "LOUD12DB",
312                 .rate = 16000,
313                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
314                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
315                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
316                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
317                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
318         },
319 };
320
321
322 static struct max98088_pdata enterprise_max98088_pdata = {
323         /* equalizer configuration */
324         .eq_cfg = max98088_eq_cfg,
325         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
326
327         /* debounce time */
328         .debounce_time_ms = 200,
329
330         /* microphone configuration */
331         .digmic_left_mode = 1,
332         .digmic_right_mode = 1,
333
334         /* receiver output configuration */
335         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
336 };
337
338 static struct pn544_i2c_platform_data nfc_pdata = {
339                 .irq_gpio = TEGRA_GPIO_PS4,
340                 .ven_gpio = TEGRA_GPIO_PM6,
341                 .firm_gpio = 0,
342 };
343
344
345 static struct i2c_board_info __initdata max98088_board_info = {
346         I2C_BOARD_INFO("max98088", 0x10),
347         .platform_data = &enterprise_max98088_pdata,
348         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
349 };
350
351 static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
352         I2C_BOARD_INFO("aic3262-codec", 0x18),
353         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
354 };
355
356 static struct i2c_board_info __initdata nfc_board_info = {
357         I2C_BOARD_INFO("pn544", 0x28),
358         .platform_data = &nfc_pdata,
359         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS4),
360 };
361
362 static void enterprise_i2c_init(void)
363 {
364         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
365         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
366         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
367         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
368         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
369
370         platform_device_register(&tegra_i2c_device5);
371         platform_device_register(&tegra_i2c_device4);
372         platform_device_register(&tegra_i2c_device3);
373         platform_device_register(&tegra_i2c_device2);
374         platform_device_register(&tegra_i2c_device1);
375
376         i2c_register_board_info(0, &max98088_board_info, 1);
377         i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
378         i2c_register_board_info(0, &nfc_board_info, 1);
379 }
380
381 static struct platform_device *enterprise_uart_devices[] __initdata = {
382         &tegra_uarta_device,
383         &tegra_uartb_device,
384         &tegra_uartc_device,
385         &tegra_uartd_device,
386         &tegra_uarte_device,
387 };
388
389 static struct uart_clk_parent uart_parent_clk[] = {
390         [0] = {.name = "clk_m"},
391         [1] = {.name = "pll_p"},
392 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
393         [2] = {.name = "pll_m"},
394 #endif
395 };
396 static struct tegra_uart_platform_data enterprise_uart_pdata;
397 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
398
399 static void __init uart_debug_init(void)
400 {
401         unsigned long rate;
402         struct clk *c;
403
404         /* UARTD is the debug port. */
405         pr_info("Selecting UARTD as the debug console\n");
406         enterprise_uart_devices[3] = &debug_uartd_device;
407         debug_uart_port_base = ((struct plat_serial8250_port *)(
408                         debug_uartd_device.dev.platform_data))->mapbase;
409         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
410
411         /* Clock enable for the debug channel */
412         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
413                 rate = ((struct plat_serial8250_port *)(
414                         debug_uartd_device.dev.platform_data))->uartclk;
415                 pr_info("The debug console clock name is %s\n",
416                                                 debug_uart_clk->name);
417                 c = tegra_get_clock_by_name("pll_p");
418                 if (IS_ERR_OR_NULL(c))
419                         pr_err("Not getting the parent clock pll_p\n");
420                 else
421                         clk_set_parent(debug_uart_clk, c);
422
423                 clk_enable(debug_uart_clk);
424                 clk_set_rate(debug_uart_clk, rate);
425         } else {
426                 pr_err("Not getting the clock %s for debug console\n",
427                                 debug_uart_clk->name);
428         }
429 }
430
431 static void __init enterprise_uart_init(void)
432 {
433         int i;
434         struct clk *c;
435
436         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
437                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
438                 if (IS_ERR_OR_NULL(c)) {
439                         pr_err("Not able to get the clock for %s\n",
440                                                 uart_parent_clk[i].name);
441                         continue;
442                 }
443                 uart_parent_clk[i].parent_clk = c;
444                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
445         }
446         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
447         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
448         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
449         enterprise_loopback_uart_pdata.parent_clk_count =
450                                                 ARRAY_SIZE(uart_parent_clk);
451         enterprise_loopback_uart_pdata.is_loopback = true;
452         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
453         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
454         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
455         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
456         /* UARTE is used for loopback test purpose */
457         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
458
459         /* Register low speed only if it is selected */
460         if (!is_tegra_debug_uartport_hs())
461                 uart_debug_init();
462
463         platform_add_devices(enterprise_uart_devices,
464                                 ARRAY_SIZE(enterprise_uart_devices));
465 }
466
467
468
469 static struct resource tegra_rtc_resources[] = {
470         [0] = {
471                 .start = TEGRA_RTC_BASE,
472                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
473                 .flags = IORESOURCE_MEM,
474         },
475         [1] = {
476                 .start = INT_RTC,
477                 .end = INT_RTC,
478                 .flags = IORESOURCE_IRQ,
479         },
480 };
481
482 static struct platform_device tegra_rtc_device = {
483         .name = "tegra_rtc",
484         .id   = -1,
485         .resource = tegra_rtc_resources,
486         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
487 };
488
489 static struct platform_device tegra_camera = {
490         .name = "tegra_camera",
491         .id = -1,
492 };
493
494 static struct tegra_asoc_platform_data enterprise_audio_pdata = {
495         .gpio_spkr_en           = -1,
496         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
497         .gpio_hp_mute           = -1,
498         .gpio_int_mic_en        = -1,
499         .gpio_ext_mic_en        = -1,
500         .debounce_time_hp = -1,
501         .audio_port_id          = {
502                 [HIFI_CODEC] = 0,
503                 [BASEBAND] = 2,
504                 [BT_SCO] = 3,
505         },
506         .baseband_param         = {
507                 .rate = 8000,
508                 .channels = 1,
509         },
510 };
511
512 static struct platform_device enterprise_audio_device = {
513         .name   = "tegra-snd-max98088",
514         .id     = 0,
515         .dev    = {
516                 .platform_data  = &enterprise_audio_pdata,
517         },
518 };
519
520 static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
521         .gpio_spkr_en           = -1,
522         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
523         .gpio_hp_mute           = -1,
524         .gpio_int_mic_en        = -1,
525         .gpio_ext_mic_en        = -1,
526 };
527
528 static struct platform_device enterprise_audio_aic326x_device = {
529         .name   = "tegra-snd-aic326x",
530         .id     = 0,
531         .dev    = {
532                 .platform_data  = &enterprise_audio_aic326x_pdata,
533         },
534 };
535
536 static struct platform_device *enterprise_devices[] __initdata = {
537         &tegra_pmu_device,
538         &tegra_rtc_device,
539         &tegra_udc_device,
540 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
541         &tegra_smmu_device,
542 #endif
543         &tegra_wdt_device,
544 #if defined(CONFIG_TEGRA_AVP)
545         &tegra_avp_device,
546 #endif
547         &tegra_camera,
548         &enterprise_bcm4329_rfkill_device,
549         &tegra_spi_device4,
550         &tegra_hda_device,
551 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
552         &tegra_se_device,
553 #endif
554 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
555         &tegra_aes_device,
556 #endif
557 };
558
559 #define MXT_CONFIG_CRC 0x62F903
560 /*
561  * Config converted from memory-mapped cfg-file with
562  * following version information:
563  *
564  *
565  *
566  *      FAMILY_ID=128
567  *      VARIANT=1
568  *      VERSION=32
569  *      BUILD=170
570  *      VENDOR_ID=255
571  *      PRODUCT_ID=TBD
572  *      CHECKSUM=0xC189B6
573  *
574  *
575  */
576
577 static const u8 config[] = {
578         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
579         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
580         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
581         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
582         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
583         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
584         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
585         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
586         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
587         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
588         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
589         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
590         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
591         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
592         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
593         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
594         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
595         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
596         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
597         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
598         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
599         0x00
600 };
601
602 static struct mxt_platform_data atmel_mxt_info = {
603         .x_line         = 19,
604         .y_line         = 11,
605         .x_size         = 960,
606         .y_size         = 540,
607         .blen           = 0x10,
608         .threshold      = 0x32,
609         .voltage        = 3300000,              /* 3.3V */
610         .orient         = 3,
611         .config         = config,
612         .config_length  = 168,
613         .config_crc     = MXT_CONFIG_CRC,
614         .irqflags       = IRQF_TRIGGER_FALLING,
615 /*      .read_chg       = &read_chg, */
616         .read_chg       = NULL,
617 };
618
619 static struct i2c_board_info __initdata atmel_i2c_info[] = {
620         {
621                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
622                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH6),
623                 .platform_data = &atmel_mxt_info,
624         }
625 };
626
627 static int __init enterprise_touch_init(void)
628 {
629         tegra_gpio_enable(TEGRA_GPIO_PH6);
630         tegra_gpio_enable(TEGRA_GPIO_PF5);
631
632         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
633         gpio_direction_input(TEGRA_GPIO_PH6);
634
635         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
636         gpio_direction_output(TEGRA_GPIO_PF5, 0);
637         msleep(1);
638         gpio_set_value(TEGRA_GPIO_PF5, 1);
639         msleep(100);
640
641         i2c_register_board_info(1, atmel_i2c_info, 1);
642
643         return 0;
644 }
645
646 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
647         [0] = {
648                         .instance = 0,
649                         .vbus_gpio = -1,
650                         .vbus_reg_supply = "usb_vbus",
651                         .vbus_irq = ENT_TPS80031_IRQ_BASE +
652                                                         TPS80031_INT_VBUS_DET,
653         },
654         [1] = {
655                         .instance = 1,
656                         .vbus_gpio = -1,
657         },
658         [2] = {
659                         .instance = 2,
660                         .vbus_gpio = -1,
661         },
662 };
663
664 static struct tegra_uhsic_config uhsic_phy_config = {
665         .enable_gpio = -1,
666         .reset_gpio = -1,
667         .sync_start_delay = 9,
668         .idle_wait_delay = 17,
669         .term_range_adj = 0,
670         .elastic_underrun_limit = 16,
671         .elastic_overrun_limit = 16,
672 };
673
674 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
675         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
676         .phy_config = &uhsic_phy_config,
677         .operating_mode = TEGRA_USB_HOST,
678         .power_down_on_bus_suspend = 1,
679         .default_enable = true,
680 };
681
682 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
683         [0] = {
684                         .phy_config = &utmi_phy_config[0],
685                         .operating_mode = TEGRA_USB_HOST,
686                         .power_down_on_bus_suspend = 1,
687                         .default_enable = false,
688         },
689         [1] = {
690                         .phy_config = &utmi_phy_config[1],
691                         .operating_mode = TEGRA_USB_HOST,
692                         .power_down_on_bus_suspend = 1,
693                         .default_enable = false,
694         },
695         [2] = {
696                         .phy_config = &utmi_phy_config[2],
697                         .operating_mode = TEGRA_USB_HOST,
698                         .power_down_on_bus_suspend = 1,
699                         .default_enable = false,
700         },
701 };
702
703 static struct tegra_otg_platform_data tegra_otg_pdata = {
704         .ehci_device = &tegra_ehci1_device,
705         .ehci_pdata = &tegra_ehci_pdata[0],
706 };
707
708 struct platform_device *tegra_usb_hsic_host_register(void)
709 {
710         struct platform_device *pdev;
711         int val;
712
713         pdev = platform_device_alloc(tegra_ehci2_device.name,
714                 tegra_ehci2_device.id);
715         if (!pdev)
716                 return NULL;
717
718         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
719                 tegra_ehci2_device.num_resources);
720         if (val)
721                 goto error;
722
723         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
724         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
725
726         val = platform_device_add_data(pdev, &tegra_ehci_uhsic_pdata,
727                         sizeof(struct tegra_ehci_platform_data));
728         if (val)
729                 goto error;
730
731         val = platform_device_add(pdev);
732         if (val)
733                 goto error;
734
735         return pdev;
736
737 error:
738         pr_err("%s: failed to add the host contoller device\n", __func__);
739         platform_device_put(pdev);
740         return NULL;
741 }
742
743 void tegra_usb_hsic_host_unregister(struct platform_device *pdev)
744 {
745         platform_device_unregister(pdev);
746 }
747
748 static int enterprise_usb_hsic_postsupend(void)
749 {
750         pr_debug("%s\n", __func__);
751 #ifdef CONFIG_TEGRA_BB_XMM_POWER
752         baseband_xmm_set_power_status(BBXMM_PS_L2);
753 #endif
754         return 0;
755 }
756
757 static int enterprise_usb_hsic_preresume(void)
758 {
759         pr_debug("%s\n", __func__);
760 #ifdef CONFIG_TEGRA_BB_XMM_POWER
761         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
762 #endif
763         return 0;
764 }
765
766 static int enterprise_usb_hsic_phy_ready(void)
767 {
768         pr_debug("%s\n", __func__);
769 #ifdef CONFIG_TEGRA_BB_XMM_POWER
770         baseband_xmm_set_power_status(BBXMM_PS_L0);
771 #endif
772         return 0;
773 }
774
775 static int enterprise_usb_hsic_phy_off(void)
776 {
777         pr_debug("%s\n", __func__);
778 #ifdef CONFIG_TEGRA_BB_XMM_POWER
779         baseband_xmm_set_power_status(BBXMM_PS_L3);
780 #endif
781         return 0;
782 }
783
784 static void enterprise_usb_init(void)
785 {
786         struct  fsl_usb2_platform_data *udc_pdata;
787
788         tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
789
790         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
791         platform_device_register(&tegra_otg_device);
792
793         udc_pdata = tegra_udc_device.dev.platform_data;
794 }
795
796 static struct platform_device *enterprise_audio_devices[] __initdata = {
797         &tegra_ahub_device,
798         &tegra_dam_device0,
799         &tegra_dam_device1,
800         &tegra_dam_device2,
801         &tegra_i2s_device0,
802         &tegra_i2s_device1,
803         &tegra_i2s_device2,
804         &tegra_i2s_device3,
805         &tegra_spdif_device,
806         &spdif_dit_device,
807         &bluetooth_dit_device,
808         &baseband_dit_device,
809         &tegra_pcm_device,
810         &enterprise_audio_device,
811         &enterprise_audio_aic326x_device,
812 };
813
814 static void enterprise_audio_init(void)
815 {
816         struct board_info board_info;
817
818         tegra_get_board_info(&board_info);
819
820         if (board_info.board_id == BOARD_E1197)
821                 enterprise_audio_pdata.audio_port_id[HIFI_CODEC] = 1;
822
823         platform_add_devices(enterprise_audio_devices,
824                         ARRAY_SIZE(enterprise_audio_devices));
825 }
826
827 static void enterprise_gps_init(void)
828 {
829         tegra_gpio_enable(TEGRA_GPIO_PE4);
830         tegra_gpio_enable(TEGRA_GPIO_PE5);
831 }
832
833 static struct baseband_power_platform_data tegra_baseband_power_data = {
834         .baseband_type = BASEBAND_XMM,
835         .modem = {
836                 .xmm = {
837                         .bb_rst = XMM_GPIO_BB_RST,
838                         .bb_on = XMM_GPIO_BB_ON,
839                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
840                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
841                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
842                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
843                 },
844         },
845 };
846
847 static struct platform_device tegra_baseband_power_device = {
848         .name = "baseband_xmm_power",
849         .id = -1,
850         .dev = {
851                 .platform_data = &tegra_baseband_power_data,
852         },
853 };
854
855 static struct platform_device tegra_baseband_power2_device = {
856         .name = "baseband_xmm_power2",
857         .id = -1,
858         .dev = {
859                 .platform_data = &tegra_baseband_power_data,
860         },
861 };
862
863 #ifdef CONFIG_TEGRA_BB_M7400
864 static union tegra_bb_gpio_id m7400_gpio_id = {
865         .m7400 = {
866                 .pwr_status = GPIO_BB_RESET,
867                 .pwr_on = GPIO_BB_PWRON,
868                 .uart_awr = GPIO_BB_APACK,
869                 .uart_cwr = GPIO_BB_CPACK,
870                 .usb_awr = GPIO_BB_APACK2,
871                 .usb_cwr = GPIO_BB_CPACK2,
872                 .service = GPIO_BB_RSVD2,
873                 .resout2 = GPIO_BB_RSVD1,
874         },
875 };
876
877 static struct tegra_bb_pdata m7400_pdata = {
878         .id = &m7400_gpio_id,
879         .device = &tegra_ehci2_device,
880         .ehci_register = tegra_usb_hsic_host_register,
881         .ehci_unregister = tegra_usb_hsic_host_unregister,
882         .bb_id = TEGRA_BB_M7400,
883 };
884
885 static struct platform_device tegra_baseband_m7400_device = {
886         .name = "tegra_baseband_power",
887         .id = -1,
888         .dev = {
889                 .platform_data = &m7400_pdata,
890         },
891 };
892 #endif
893
894 static void enterprise_baseband_init(void)
895 {
896         int modem_id = tegra_get_modem_id();
897
898         switch (modem_id) {
899         case TEGRA_BB_PH450: /* PH450 ULPI */
900                 enterprise_modem_init();
901                 break;
902         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
903                 /* xmm baseband - do not switch off phy during suspend */
904                 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
905                 uhsic_phy_config.postsuspend = enterprise_usb_hsic_postsupend;
906                 uhsic_phy_config.preresume = enterprise_usb_hsic_preresume;
907                 uhsic_phy_config.usb_phy_ready = enterprise_usb_hsic_phy_ready;
908                 uhsic_phy_config.post_phy_off = enterprise_usb_hsic_phy_off;
909                 /* enable XMM6260 baseband gpio(s) */
910                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
911                         .mdm_reset);
912                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
913                         .mdm_on);
914                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
915                         .ap2mdm_ack);
916                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
917                         .mdm2ap_ack);
918                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
919                         .ap2mdm_ack2);
920                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
921                         .mdm2ap_ack2);
922                 tegra_baseband_power_data.hsic_register =
923                                                 &tegra_usb_hsic_host_register;
924                 tegra_baseband_power_data.hsic_unregister =
925                                                 &tegra_usb_hsic_host_unregister;
926                 platform_device_register(&tegra_baseband_power_device);
927                 platform_device_register(&tegra_baseband_power2_device);
928                 break;
929 #ifdef CONFIG_TEGRA_BB_M7400
930         case TEGRA_BB_M7400: /* M7400 HSIC */
931                 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
932                 tegra_ehci2_device.dev.platform_data
933                         = &tegra_ehci_uhsic_pdata;
934                 platform_device_register(&tegra_baseband_m7400_device);
935                 break;
936 #endif
937         }
938 }
939
940 static void enterprise_nfc_init(void)
941 {
942         tegra_gpio_enable(TEGRA_GPIO_PS4);
943         tegra_gpio_enable(TEGRA_GPIO_PM6);
944 }
945
946 static void __init tegra_enterprise_init(void)
947 {
948         tegra_thermal_init(&thermal_data);
949         tegra_clk_init_from_table(enterprise_clk_init_table);
950         enterprise_pinmux_init();
951         enterprise_i2c_init();
952         enterprise_uart_init();
953         enterprise_usb_init();
954         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
955         tegra_ram_console_debug_init();
956         enterprise_regulator_init();
957         enterprise_sdhci_init();
958 #ifdef CONFIG_TEGRA_EDP_LIMITS
959         enterprise_edp_init();
960 #endif
961         enterprise_kbc_init();
962         enterprise_touch_init();
963         enterprise_audio_init();
964         enterprise_gps_init();
965         enterprise_baseband_init();
966         enterprise_panel_init();
967         enterprise_setup_bluesleep();
968         enterprise_emc_init();
969         enterprise_sensors_init();
970         enterprise_suspend_init();
971         enterprise_bpc_mgmt_init();
972         tegra_release_bootloader_fb();
973         enterprise_nfc_init();
974 }
975
976 static void __init tegra_enterprise_reserve(void)
977 {
978 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
979         tegra_reserve(0, SZ_4M, SZ_8M);
980 #else
981         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
982 #endif
983         tegra_ram_console_debug_reserve(SZ_1M);
984 }
985
986 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
987         .boot_params    = 0x80000100,
988         .map_io         = tegra_map_common_io,
989         .reserve        = tegra_enterprise_reserve,
990         .init_early     = tegra_init_early,
991         .init_irq       = tegra_init_irq,
992         .timer          = &tegra_timer,
993         .init_machine   = tegra_enterprise_init,
994 MACHINE_END